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lvzhengyang
sv2v
Commits
fcaca6c3
Commit
fcaca6c3
authored
Feb 09, 2020
by
Zachary Snow
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package item nesting perf tweaks
parent
c876c447
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6 additions
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7 deletions
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-7
src/Convert/NestPI.hs
+6
-7
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src/Convert/NestPI.hs
View file @
fcaca6c3
...
...
@@ -7,13 +7,13 @@
module
Convert.NestPI
(
convert
)
where
import
Control.Monad.Writer
import
Data.List.Unique
(
complex
)
import
qualified
Data.Map.Strict
as
Map
import
qualified
Data.Set
as
Set
import
Convert.Traverse
import
Language.SystemVerilog.AST
type
PIs
=
[(
Identifier
,
PackageItem
)]
type
PIs
=
Map
.
Map
Identifier
PackageItem
type
Idents
=
Set
.
Set
Identifier
convert
::
[
AST
]
->
[
AST
]
...
...
@@ -39,7 +39,7 @@ collectDescriptionM :: Description -> Writer PIs ()
collectDescriptionM
(
PackageItem
item
)
=
do
case
piName
item
of
Nothing
->
return
()
Just
ident
->
tell
[(
ident
,
item
)]
Just
ident
->
tell
$
Map
.
singleton
ident
item
collectDescriptionM
_
=
return
()
-- nests packages items missing from modules
...
...
@@ -56,10 +56,9 @@ convertDescription pis (orig @ Part{}) =
,
collectExprsM
$
collectNestedExprsM
collectIdentsM
]
neededPIs
=
Set
.
difference
(
Set
.
union
usedPIs
imports
)
existingPIs
imports
=
Set
.
fromList
$
map
fst
$
filter
(
isImport
.
snd
)
pis
uniq
l
=
l'
where
(
l'
,
_
,
_
)
=
complex
l
newItems
=
uniq
$
map
MIPackageItem
$
map
snd
$
filter
(
\
(
x
,
_
)
->
Set
.
member
x
neededPIs
)
pis
imports
=
Map
.
keysSet
$
Map
.
filter
isImport
pis
newItems
=
map
MIPackageItem
$
Map
.
elems
$
Map
.
restrictKeys
pis
neededPIs
-- place data declarations at the beginning to obey declaration
-- ordering; everything else can go at the end
newItemsBefore
=
filter
isDecl
newItems
...
...
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