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lvzhengyang
sv2v
Commits
df4244d8
Commit
df4244d8
authored
Feb 09, 2020
by
Zachary Snow
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more aggressive expression simplification
parent
9036bbab
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src/Convert/Simplify.hs
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src/Language/SystemVerilog/AST/Expr.hs
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src/Convert/Simplify.hs
View file @
df4244d8
...
...
@@ -73,6 +73,8 @@ convertExpr info (Mux cc aa bb) =
after
=
simplify
before
convertExpr
_
(
other
@
Repeat
{})
=
traverseNestedExprs
simplify
other
convertExpr
_
(
other
@
Concat
{})
=
simplify
other
convertExpr
_
(
other
@
BinOp
{})
=
simplify
other
convertExpr
_
(
other
@
UniOp
{})
=
simplify
other
convertExpr
_
other
=
other
substitute
::
Info
->
Expr
->
Expr
...
...
src/Language/SystemVerilog/AST/Expr.hs
View file @
df4244d8
...
...
@@ -171,6 +171,7 @@ readNumber n =
readMaybe
n'
::
Maybe
Int
where
n'
=
case
n
of
'3'
:
'2'
:
'
\'
'
:
'd'
:
rest
->
rest
'
\'
'
:
'd'
:
rest
->
rest
_
->
n
...
...
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