allow preproc idents to begin with macro arguments

src/Language/SystemVerilog/Parser/Preprocess.hs

@@ -218,36 +218,39 @@ isIdentChar ch =
 takeIdentifier :: PPS String
 takeIdentifier = do
     str <- getInput
-    let (ident, rest) = span isIdentChar str
-    advancePositions ident
     macroStack <- getMacroStack
-    setInput rest
     if null macroStack
-        then return ident
-        else do
-            identFollow <- takeIdentifierFollow
-            return $ ident ++ identFollow
-takeIdentifierFollow :: PPS String
-takeIdentifierFollow = do
+        then do
+            let (ident, rest) = span isIdentChar str
+            advancePositions ident
+            setInput rest
+            return ident
+        else takeIdentifierFollow True
+takeIdentifierFollow :: Bool -> PPS String
+takeIdentifierFollow firstPass = do
     str <- getInput
     case str of
-        '`' : '`' : '`' : _ ->
+        '`' : '`' : '`' : _ -> do
+            '`' <- takeChar
+            '`' <- takeChar
             process $ handleDirective True
-        '`' : '`' : _ ->
+        '`' : '`' : _ -> do
+            '`' <- takeChar
+            '`' <- takeChar
             process consumeWithSubstitution
-        _ -> return ""
+        _ -> if firstPass
+                then process consumeWithSubstitution
+                else return ""
     where
         process :: (PPS ()) -> PPS String
         process action = do
-            '`' <- takeChar
-            '`' <- takeChar
             outputFollow <- getOutput
             setOutput []
             () <- action
             outputIdent <- getOutput
             setOutput outputFollow
             let ident = reverse $ map fst outputIdent
-            identFollow <- takeIdentifierFollow
+            identFollow <- takeIdentifierFollow False
             return $ ident ++ identFollow
 
 -- read tokens after the name until the first (un-escaped) newline

test/lex/macro_arg_invoke.sv

+module top; endmodule
+`define MODULE(str) module str; initial $display(`"hello str`"); endmodule
+`define MACRO_A(inv, str) `inv(str)
+`define MACRO_B(inv, str) ```inv(str)
+`define MACRO_C(inv1, inv2, str) `inv1``inv2(str)
+`MODULE(example1)
+`MACRO_A(MODULE, example2)
+`MACRO_B(MODULE, example3)
+`MACRO_C(MOD, ULE, example4)
+`MACRO_C(M, ODULE, example5)
+`MACRO_C(, MODULE, example6)

test/lex/macro_arg_invoke.v

+module top; endmodule
+`define MODULE(str) module str; initial $display(`"hello str`"); endmodule
+`MODULE(example1)
+`MODULE(example2)
+`MODULE(example3)
+`MODULE(example4)
+`MODULE(example5)
+`MODULE(example6)