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lvzhengyang
sv2v
Commits
9f0857d6
Commit
9f0857d6
authored
Mar 07, 2019
by
Zachary Snow
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some fixes for 'VTR' targetted conversions
parent
b2b1c9e5
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3 changed files
with
23 additions
and
7 deletions
+23
-7
src/Convert/FuncRet.hs
+3
-1
src/Convert/Logic.hs
+13
-3
src/Convert/Struct.hs
+7
-3
No files found.
src/Convert/FuncRet.hs
View file @
9f0857d6
{- sv2v
- Author: Zachary Snow <zach@zachjs.com>
-
- Conversion which makes function `logic` return types implicit
- Conversion which makes function `logic`
and `reg`
return types implicit
-}
module
Convert.FuncRet
(
convert
)
where
...
...
@@ -13,6 +13,8 @@ convert :: AST -> AST
convert
=
traverseDescriptions
$
traverseModuleItems
convertFunction
convertFunction
::
ModuleItem
->
ModuleItem
convertFunction
(
MIPackageItem
(
Function
ml
(
Reg
r
)
f
decls
stmts
))
=
MIPackageItem
$
Function
ml
(
Implicit
r
)
f
decls
stmts
convertFunction
(
MIPackageItem
(
Function
ml
(
Logic
r
)
f
decls
stmts
))
=
MIPackageItem
$
Function
ml
(
Implicit
r
)
f
decls
stmts
convertFunction
other
=
other
src/Convert/Logic.hs
View file @
9f0857d6
...
...
@@ -25,8 +25,8 @@ convert :: AST -> AST
convert
=
traverseDescriptions
convertDescription
convertDescription
::
Description
->
Description
convertDescription
orig
=
traverseModuleItems
convertModuleItem
orig
convertDescription
(
orig
@
(
Part
Module
_
_
_
))
=
traverseModuleItems
(
traverseDecls
convertDecl
.
convertModuleItem
)
orig
where
idents
=
execWriter
(
collectModuleItemsM
regIdents
orig
)
convertModuleItem
::
ModuleItem
->
ModuleItem
...
...
@@ -34,11 +34,21 @@ convertDescription orig =
MIDecl
$
Variable
dir
(
t
mr
)
ident
a
me
where
t
=
if
Set
.
member
ident
idents
then
Reg
else
Wire
convertModuleItem
other
=
other
-- all other logics (i.e. inside of functions) become regs
convertDecl
::
Decl
->
Decl
convertDecl
(
Variable
d
(
Logic
rs
)
x
a
me
)
=
Variable
d
(
Reg
rs
)
x
a
me
convertDecl
other
=
other
convertDescription
other
=
other
regIdents
::
ModuleItem
->
Writer
RegIdents
()
regIdents
(
AlwaysC
_
stmt
)
=
collectStmtLHSsM
idents
stmt
regIdents
(
AlwaysC
_
stmt
)
=
collectStmtLHSsM
idents
$
traverseNestedStmts
removeTimings
stmt
where
idents
::
LHS
->
Writer
RegIdents
()
idents
(
LHSIdent
vx
)
=
tell
$
Set
.
singleton
vx
idents
_
=
return
()
-- the collector recurses for us
removeTimings
::
Stmt
->
Stmt
removeTimings
(
Timing
_
s
)
=
s
removeTimings
other
=
other
regIdents
_
=
return
()
src/Convert/Struct.hs
View file @
9f0857d6
...
...
@@ -98,6 +98,7 @@ convertType structs t1 =
-- write down the type a declarations
collectDecl
::
Decl
->
Writer
Types
()
collectDecl
(
Variable
_
(
Implicit
[]
)
_
_
_
)
=
return
()
collectDecl
(
Variable
_
t
x
a
_
)
=
-- We add the unpacked dimensions to the type so that our type traversal can
-- correctly match-off the dimensions whenever we see a `Bit` or `Range`
...
...
@@ -186,9 +187,12 @@ convertAsgn structs types (lhs, expr) =
Nothing
->
(
Implicit
[]
,
Ident
x
)
Just
t
->
(
t
,
Ident
x
)
convertSubExpr
(
Access
e
x
)
=
if
Map
.
notMember
structTf
structs
then
(
fieldType
,
Access
e'
x
)
else
(
fieldType
,
Range
e'
r
)
case
subExprType
of
Struct
_
_
_
->
if
Map
.
notMember
structTf
structs
then
(
fieldType
,
Access
e'
x
)
else
(
fieldType
,
Range
e'
r
)
_
->
(
Implicit
[]
,
Access
e'
x
)
where
(
subExprType
,
e'
)
=
convertSubExpr
e
Struct
p
fields
[]
=
subExprType
...
...
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