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sv2v
Commit 540a0c8e by Zachary Snow
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minor readme tweaks

parent e82ff0ca
Showing with 7 additions and 5 deletions
README.md
...@@ -114,12 +114,14 @@ Other: ...@@ -114,12 +114,14 @@ Other:
## Supported Features ## Supported Features
sv2v supports most synthesizable SystemVerilog features. Current notable sv2v supports most synthesizable SystemVerilog features. Current notable
exceptions include `defparam` on interface instances and certain synthesizable exceptions include `defparam` on interface instances, certain synthesizable
usages of parameterized classes. Assertions are also supported, but are simply usages of parameterized classes, and the `bind` keyword. Assertions are also
dropped during conversion. supported, but are simply dropped during conversion.
If you find a bug or have a feature request, please create an issue. Preference If you find a bug or have a feature request, please [create an issue].
will be given to issues which include examples or test cases. Preference will be given to issues which include examples or test cases.
[create an issue]: https://github.com/zachjs/sv2v/issues/new
## SystemVerilog Front End ## SystemVerilog Front End
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