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lvzhengyang
sv2v
Commits
2ee837f7
Commit
2ee837f7
authored
Apr 09, 2019
by
Zachary Snow
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restore port-decl hoisting for cleaner output
parent
dca3a55f
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3 changed files
with
39 additions
and
0 deletions
+39
-0
src/Convert.hs
+2
-0
src/Convert/HoistPortDecls.hs
+36
-0
sv2v.cabal
+1
-0
No files found.
src/Convert.hs
View file @
2ee837f7
...
...
@@ -26,6 +26,7 @@ import qualified Convert.Struct
import
qualified
Convert.Typedef
import
qualified
Convert.UnbasedUnsized
import
qualified
Convert.Unique
import
qualified
Convert.HoistPortDecls
type
Phase
=
AST
->
AST
...
...
@@ -37,6 +38,7 @@ phases excludes =
,
selectExclude
(
Job
.
Logic
,
Convert
.
Logic
.
convert
)
,
Convert
.
FuncRet
.
convert
,
Convert
.
Enum
.
convert
,
Convert
.
HoistPortDecls
.
convert
,
Convert
.
KWArgs
.
convert
,
Convert
.
PackedArray
.
convert
,
Convert
.
StarPort
.
convert
...
...
src/Convert/HoistPortDecls.hs
0 → 100644
View file @
2ee837f7
{- sv2v
- Author: Zachary Snow <zach@zachjs.com>
-
- VCS doesn't like port declarations inside of `generate` blocks, so we hoist
- them out with this conversion. This obviously isn't ideal, but it's
- relatively straightforward, and testing in VCS is important.
-}
module
Convert.HoistPortDecls
(
convert
)
where
import
Data.List
(
partition
)
import
Convert.Traverse
import
Language.SystemVerilog.AST
convert
::
AST
->
AST
convert
=
traverseDescriptions
hoistPortDecls
hoistPortDecls
::
Description
->
Description
hoistPortDecls
(
Part
extern
kw
lifetime
name
ports
items
)
=
Part
extern
kw
lifetime
name
ports
(
concat
$
map
explode
items
)
where
explode
::
ModuleItem
->
[
ModuleItem
]
explode
(
Generate
genItems
)
=
if
null
rest
then
portDecls
else
portDecls
++
[
Generate
rest
]
where
(
wrappedPortDecls
,
rest
)
=
partition
isPortDecl
genItems
portDecls
=
map
(
\
(
GenModuleItem
item
)
->
item
)
wrappedPortDecls
isPortDecl
::
GenItem
->
Bool
isPortDecl
(
GenModuleItem
(
MIDecl
(
Variable
dir
_
_
_
_
)))
=
dir
/=
Local
isPortDecl
_
=
False
explode
other
=
[
other
]
hoistPortDecls
other
=
other
sv2v.cabal
View file @
2ee837f7
...
...
@@ -58,6 +58,7 @@ executable sv2v
Convert.Bits
Convert.Enum
Convert.FuncRet
Convert.HoistPortDecls
Convert.Interface
Convert.KWArgs
Convert.Logic
...
...
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