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lvzhengyang
sv2v
Commits
2d81c647
Commit
2d81c647
authored
Sep 21, 2019
by
Zachary Snow
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prevent genvar conflict without changing scope tree
parent
aa294eaa
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4 changed files
with
42 additions
and
7 deletions
+42
-7
src/Convert/ForDecl.hs
+18
-5
src/Convert/Traverse.hs
+10
-0
test/basic/for_decl.sv
+7
-1
test/basic/for_decl.v
+7
-1
No files found.
src/Convert/ForDecl.hs
View file @
2d81c647
...
...
@@ -24,11 +24,24 @@ convert =
)
convertGenItem
::
GenItem
->
GenItem
convertGenItem
(
GenFor
(
True
,
x
,
e
)
a
b
mx
c
)
=
GenBlock
(
fmap
(
++
"_for_decl"
)
mx
)
[
GenModuleItem
$
Genvar
x
,
GenFor
(
False
,
x
,
e
)
a
b
mx
c
]
convertGenItem
(
GenFor
(
True
,
x
,
e
)
a
b
mbx
c
)
=
GenBlock
Nothing
genItems
where
x'
=
(
maybe
""
(
++
"_"
)
mbx
)
++
x
Generate
genItems
=
traverseNestedModuleItems
converter
$
Generate
$
[
GenModuleItem
$
Genvar
x'
,
GenFor
(
False
,
x
,
e
)
a
b
mbx
c
]
converter
=
(
traverseExprs
$
traverseNestedExprs
convertExpr
)
.
(
traverseLHSs
$
traverseNestedLHSs
convertLHS
)
prefix
::
String
->
String
prefix
ident
=
if
ident
==
x
then
x'
else
ident
convertExpr
(
Ident
ident
)
=
Ident
$
prefix
ident
convertExpr
other
=
other
convertLHS
(
LHSIdent
ident
)
=
LHSIdent
$
prefix
ident
convertLHS
other
=
other
convertGenItem
other
=
other
convertStmt
::
Stmt
->
Stmt
...
...
src/Convert/Traverse.hs
View file @
2d81c647
...
...
@@ -742,7 +742,17 @@ traverseLHSsM' strat mapper item =
Assertion
a'
->
AssertionItem
(
mx
,
a'
)
_
->
error
$
"redirected AssertionItem traverse failed: "
++
show
converted
traverseModuleItemLHSsM
(
Generate
items
)
=
do
items'
<-
mapM
(
traverseNestedGenItemsM
traverGenItemLHSsM
)
items
return
$
Generate
items'
traverseModuleItemLHSsM
other
=
return
other
traverGenItemLHSsM
(
GenFor
(
n1
,
x1
,
e1
)
cc
(
x2
,
op2
,
e2
)
mn
subItems
)
=
do
wrapped_x1'
<-
(
if
n1
then
return
else
mapper
)
$
LHSIdent
x1
wrapped_x2'
<-
mapper
$
LHSIdent
x2
let
LHSIdent
x1'
=
wrapped_x1'
let
LHSIdent
x2'
=
wrapped_x2'
return
$
GenFor
(
n1
,
x1'
,
e1
)
cc
(
x2'
,
op2
,
e2
)
mn
subItems
traverGenItemLHSsM
other
=
return
other
traverseLHSs'
::
TFStrategy
->
Mapper
LHS
->
Mapper
ModuleItem
traverseLHSs'
strat
=
unmonad
$
traverseLHSsM'
strat
...
...
test/basic/for_decl.sv
View file @
2d81c647
...
...
@@ -3,11 +3,13 @@ module top;
wire
[
0
:
31
]
a
;
for
(
genvar
n
=
0
;
n
<
32
;
n
++
)
begin
:
gen_filter
assign
a
[
n
]
=
n
&
1
;
wire
x
;
assign
x
=
a
[
n
]
;
end
wire
[
0
:
31
]
b
;
for
(
genvar
n
=
0
;
n
<
32
;
n
++
)
begin
:
gen_filter_other
assign
b
[
n
]
=
~
a
[
n
]
;
assign
b
[
n
]
=
~
gen_filter
[
n
]
.
x
;
end
initial
...
...
@@ -58,4 +60,8 @@ module top;
for
(
integer
i
=
0
;
i
<
32
;
i
++
)
$
display
(
"8: "
,
a
[
i
]
,
b
[
i
])
;
logic
start
;
assign
start
=
gen_filter
[
0
]
.
x
;
initial
$
display
(
start
)
;
endmodule
test/basic/for_decl.v
View file @
2d81c647
...
...
@@ -5,6 +5,8 @@ module top;
genvar
n
;
for
(
n
=
0
;
n
<
32
;
n
=
n
+
1
)
begin
:
gen_filter
assign
a
[
n
]
=
n
&
1
;
wire
x
;
assign
x
=
a
[
n
]
;
end
endgenerate
...
...
@@ -12,7 +14,7 @@ module top;
generate
genvar
other_n
;
for
(
other_n
=
0
;
other_n
<
32
;
other_n
=
other_n
+
1
)
begin
:
gen_filter_other
assign
b
[
other_n
]
=
~
a
[
other_n
]
;
assign
b
[
other_n
]
=
~
gen_filter
[
other_n
]
.
x
;
end
endgenerate
...
...
@@ -69,4 +71,8 @@ module top;
$
display
(
"8: "
,
a
[
i
]
,
b
[
i
])
;
end
wire
start
;
assign
start
=
gen_filter
[
0
]
.
x
;
initial
$
display
(
start
)
;
endmodule
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