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lvzhengyang
sv2v
Commits
2d7982f8
Commit
2d7982f8
authored
Jun 06, 2020
by
Zachary Snow
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simplify $bits on simple part selects
parent
eb93ba67
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3 changed files
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34 additions
and
0 deletions
+34
-0
src/Convert/DimensionQuery.hs
+7
-0
test/basic/part_select_bits.sv
+13
-0
test/basic/part_select_bits.v
+14
-0
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src/Convert/DimensionQuery.hs
View file @
2d7982f8
...
@@ -136,4 +136,11 @@ convertBits (Right e) =
...
@@ -136,4 +136,11 @@ convertBits (Right e) =
Nothing
->
Number
"32"
Nothing
->
Number
"32"
Just
0
->
Number
"32"
Just
0
->
Number
"32"
Just
idx
->
Number
$
take
idx
n
Just
idx
->
Number
$
take
idx
n
Range
expr
mode
range
->
BinOp
Mul
size
$
convertBits
$
Right
$
Bit
expr
(
Number
"0"
)
where
size
=
case
mode
of
NonIndexed
->
rangeSize
range
IndexedPlus
->
snd
range
IndexedMinus
->
snd
range
_
->
DimsFn
FnBits
$
Left
$
TypeOf
e
_
->
DimsFn
FnBits
$
Left
$
TypeOf
e
test/basic/part_select_bits.sv
0 → 100644
View file @
2d7982f8
module
top
;
parameter
A
=
3
;
parameter
B
=
4
;
logic
[
A
*
B
-
1
:
0
]
arr
;
initial
begin
arr
=
0
;
for
(
integer
i
=
0
;
i
<
A
;
++
i
)
begin
// yes this is silly but it captures an interesting edge case
arr
[
i
*
B
+:
B
]
=
$
bits
(
arr
[
i
*
B
+:
B
])
'
(
i
)
;
end
$
display
(
"%b"
,
arr
)
;
end
endmodule
test/basic/part_select_bits.v
0 → 100644
View file @
2d7982f8
module
top
;
parameter
A
=
3
;
parameter
B
=
4
;
reg
[
A
*
B
-
1
:
0
]
arr
;
initial
begin
:
foo
integer
i
;
arr
=
0
;
for
(
i
=
0
;
i
<
A
;
++
i
)
begin
arr
[
i
*
B
+:
B
]
=
i
;
end
$
display
(
"%b"
,
arr
)
;
end
endmodule
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