This patch adds support to combine:

1) ushr and add into usra, example:

ushr    v0.16b, v0.16b, 2
add     v0.16b, v0.16b, v2.16b
---
usra    v2.16b, v0.16b, 2

2) sshr and add into ssra, example:

sshr    v1.16b, v1.16b, 2
add     v1.16b, v1.16b, v3.16b
---
ssra    v3.16b, v1.16b, 2

Committed on behalf of Sylvia Taylor <sylvia.taylor@arm.com>.
Reviewed-by: <James.greenhalgh@arm.com>

gcc/ChangeLog:


        * config/aarch64/aarch64-simd.md
        (*aarch64_simd_sra<mode>): New.
        * config/aarch64/iterators.md
        (SHIFTRT): New iterator.
        (sra_op): New attribute.

gcc/testsuite/ChangeLog:

        * gcc.target/aarch64/simd/ssra.c: New test.
        * gcc.target/aarch64/simd/usra.c: New test.

From-SVN: r273703