Improve code generation for edge and pixel-compare, specifically avoid
sign and zero extensions on 64-bit and allow such instructions to be
placed in delay slots.

gcc/

	* config/sparc/sparc.md (edge{8,16,32}{,l}): Return Pmode.
	(fcmp{le,ne,gt,eq}{16,32}): Likewise.
	* config/sparc/visintrin.h: Update edge and pixel-compare
	intrinsics to return 'long' instead of 'int'.
	* doc/extend.texi: Update documentation to match.
	* config/sparc/sparc.c (eligible_for_return_delay): When leaf or
	flat, allow any instruction.  Otherwise, when V9 allow parallels
	which consist only of sets to registers outside of %o0 to %o5.
	(sparc_vis_init_builtins): Update VIS builtin types for edge
	and pixel-compare.

gcc/testsuite/

	* gcc.target/sparc/edge.c: Update for new return types.
	* gcc.target/sparc/fcmp.c: Likewise.

From-SVN: r179227