-
sparc.md (*cmp{si,di}_insn): %r0 -> %0. · 9ad2334b* sparc/sparc.md (*cmp{si,di}_insn): %r0 -> %0. (DFmode move split): Ensure registers not extended v9 fp regs. (*mov{sf,df,tf}_cc_reg_sp64): %r3 -> %3. From-SVN: r11437Doug Evans committed
| Name |
Last commit
|
Last update |
|---|---|---|
| gcc | Loading commit data... |