Files · 3b800f71d378c8bfc24cc96160bab8af7a35e676 · lvzhengyang / riscv-gcc-1

mn10300.md (cmpsi): Handle comparing a register with itself by adding zero to the reg. · 3b800f71

        * mn10300/mn10300.md (cmpsi): Handle comparing a register with
        itself by adding zero to the reg.  Z bit for such an insn is
        inverted.
        * mn10300/mn10300.c (notice_update_cc): Handle CC_INVERT.

From-SVN: r13755

committed Mar 20, 1997

3b800f71

Name	Last commit	Last update
gcc		Loading commit data...