PR target/85582 * config/i386/i386.md (*ashl<dwi>3_doubleword_mask, *ashl<dwi>3_doubleword_mask_1, *<shift_insn><dwi>3_doubleword_mask, *<shift_insn><dwi>3_doubleword_mask_1): In condition require that the highest significant bit of the shift count mask is clear. In check whether and[sq]i3 is needed verify that all significant bits of the shift count other than the highest are set. * gcc.c-torture/execute/pr85582-3.c: New test. From-SVN: r259862