Some insns, which operate on SImode operands, output assembler template that comprise of multiple instructions using HImode operands. To access the high word of an SImode operand, an operand selector '%H' is used to offset the operand value by a constant amount. When one of these HImode operands is a memory reference to a post_inc, the address does not need to be offset, since the preceding instruction has already offset the address to the correct value. This fixes an ICE in change_address_1, at emit-rtl.c:2318 for gcc.c-torture/execute/pr20527-1.c in the "-mlarge -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects" configuration. This test generated the following insn, and the attempt to output the high part of the post_inc address caused the ICE. (set (reg:SI 6 R6) (minus:SI (reg:SI 6 R6) (mem:SI (post_inc:PSI (reg:PSI 10 R10)) {subsi3} gcc/ChangeLog: 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com> * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to memory references in %B, %C and %D operand selectors when the inner operand is a post increment address.
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