Commits · ffc2fc06e3cd63d06943baab93c9f8e39a28b14d · lvzhengyang / riscv-gcc-1

24 Apr, 2018 17 commits

__CET__ has been changed by revision 259522:

commit d59cfa9a4064339cf2bd2da828c4c133f13e57f0
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Fri Apr 20 13:30:13 2018 +0000

    Define __CET__ for -fcf-protection and remove -mibt

to

    (__CET__ & 1) != 0: -fcf-protection=branch or -fcf-protection=full
    (__CET__ & 2) != 0: -fcf-protection=return or -fcf-protection=full

We should check (__CET__ & 2) != 0 for shadow stack.

libgcc/

	* config/i386/linux-unwind.h: Add (__CET__ & 2) != 0 check
	when including "config/i386/shadow-stack-unwind.h".

libitm/

	* config/x86/sjlj.S (_ITM_beginTransaction): Add
	(__CET__ & 2) != 0 check for shadow stack.
	(GTM_longjmp): Likewise.

From-SVN: r259621

committed Apr 24, 2018

ffc2fc06 Browse Files

x86/CET: Add -fcf-protection to STAGE4_CFLAGS · e59133c3

Since profiledbootstrap uses

STAGEfeedback_CFLAGS = $(STAGE4_CFLAGS) -fprofile-use

add

STAGE4_CFLAGS += -fcf-protection -mcet

to bootstrap-cet.mk to support profiledbootstrap with CET.

	PR bootstrap/85490
	* bootstrap-cet.mk (STAGE4_CFLAGS): New.

From-SVN: r259620

committed Apr 24, 2018

e59133c3 Browse Files

[AArch64] PR target/85512: Tighten SIMD right shift immediate constraints · 0603375c

In this testcase it is possible to generate an invalid SISD shift of zero:
Error: immediate value out of range 1 to 64 at operand 3 -- `sshr v9.2s,v0.2s,0'

The SSHR and USHR instructions require a shift from 1 up to the element size.
However our constraints on the scalar shifts that generate these patterns
allow a shift amount of zero as well. The pure GP-reg ASR and LSR instructions allow a shift amount of zero.

It is unlikely that a shift of zero will survive till the end of compilation, but it's not impossible, as this PR shows.

The patch tightens up the constraints in the offending patterns by adding two new constraints
that allow shift amounts [1,32] and [1,64] and using them in *aarch64_ashr_sisd_or_int_<mode>3
and *aarch64_lshr_sisd_or_int_<mode>3.
The left-shift SISD instructions SHL and USHL allow a shift amount of zero so don't need adjustment
The vector shift patterns that map down to SSHR and USHR already enforce the correct immediate range. 

        PR target/85512
        * config/aarch64/constraints.md (Usg, Usj): New constraints.
        * config/aarch64/iterators.md (cmode_simd): New mode attribute.
        * config/aarch64/aarch64.md (*aarch64_ashr_sisd_or_int_<mode>3):
        Use the above on operand 2.  Reindent.
        (*aarch64_lshr_sisd_or_int_<mode>3): Likewise.

        * gcc.dg/pr85512.c: New test.

From-SVN: r259614

committed Apr 24, 2018

0603375c Browse Files

x86/CET: Remove the -mcet command-lint option · 231baae2

With revision 259496:

commit b1384095a7c1d06a44b70853372ebe037b2f7867
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Thu Apr 19 15:15:04 2018 +0000

    x86: Enable -fcf-protection with multi-byte NOPs

-fcf-protection no longer depens on -mcet and with revision 259522:

commit d59cfa9a4064339cf2bd2da828c4c133f13e57f0
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Fri Apr 20 13:30:13 2018 +0000

    Define __CET__ for -fcf-protection and remove -mibt

-mcet becomes an alias for -mshstk.  Since all usages of -mcet and
-mno-cet have either been removed or replaced, we can remove the -mcet
command-lint option.

	PR target/85485
	* common/config/i386/i386-common.c (ix86_handle_option): Don't
	handle OPT_mcet.
	* config/i386/i386.opt (mcet): Removed.
	* doc/install.texi: Remove -mcet documentation.
	* doc/invoke.texi: Likewise.

From-SVN: r259613

committed Apr 24, 2018

231baae2 Browse Files

x86/CET tests: Remove -mcet/-mno-cet or replace -mcet with -mshstk · d16d033b

With revision 259496:

commit b1384095a7c1d06a44b70853372ebe037b2f7867
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Thu Apr 19 15:15:04 2018 +0000

    x86: Enable -fcf-protection with multi-byte NOPs

-fcf-protection no longer depens on -mcet and with revision 259522:

commit d59cfa9a4064339cf2bd2da828c4c133f13e57f0
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Fri Apr 20 13:30:13 2018 +0000

    Define __CET__ for -fcf-protection and remove -mibt

-mcet becomes an alias for -mshstk.

We can remove -mcet/-mno-cet where they are unused and replace -mcet
with -mshstk where -mcet is used as an alias for -mshstk.

	PR target/85485
	* g++.dg/cet-notrack-1.C (dg-options): Remove -mcet.
	* g++.dg/torture/pr85334.C (dg-additional-options): Likwise.
	* gcc.dg/pr85388-1.c (dg-options): Likwise.
	* gcc.dg/pr85388-2.c (dg-options): Likwise.
	* gcc.dg/pr85388-3.c (dg-options): Likwise.
	* gcc.dg/pr85388-4.c (dg-options): Likwise.
	* gcc.dg/pr85388-5.c (dg-options): Likwise.
	* gcc.dg/pr85388-6.c (dg-options): Likwise.
	* gcc.dg/torture/pr85397-1.c (dg-additional-options): Likwise.
	* gcc.target/i386/attr-nocf-check-1a.c (dg-options): Likwise.
	* gcc.target/i386/attr-nocf-check-3a.c (dg-options): Likwise.
	* gcc.target/i386/cet-label.c (dg-options): Likwise.
	* gcc.target/i386/cet-label-2.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-1b.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-2a.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-2b.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-3.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-4b.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-5a.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-5b.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-6a.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-6b.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-7.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-icf-2.c (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-icf-4.c (dg-options): Likwise.
	* gcc.target/i386/cet-property-1.c (dg-options): Likwise.
	* gcc.target/i386/cet-property-2.c (dg-options): Likwise.
	* gcc.target/i386/cet-sjlj-1.c (dg-options): Likwise.
	* gcc.target/i386/cet-sjlj-2.c (dg-options): Likwise.
	* gcc.target/i386/cet-sjlj-3.c (dg-options): Likwise.
	* gcc.target/i386/cet-sjlj-4.c (dg-options): Likwise.
	* gcc.target/i386/cet-sjlj-5.c (dg-options): Likwise.
	* gcc.target/i386/cet-sjlj-6a.c (dg-options): Likwise.
	* gcc.target/i386/cet-sjlj-6b.c (dg-options): Likwise.
	* gcc.target/i386/cet-switch-1.c (dg-options): Likwise.
	* gcc.target/i386/cet-switch-2.c (dg-options): Likwise.
	* gcc.target/i386/cet-switch-3.c (dg-options): Likwise.
	* gcc.target/i386/indirect-thunk-11.c (dg-options): Likwise.
	* gcc.target/i386/indirect-thunk-12.c (dg-options): Likwise.
	* gcc.target/i386/indirect-thunk-attr-12.c (dg-options): Likwise.
	* gcc.target/i386/indirect-thunk-attr-13.c (dg-options): Likwise.
	* gcc.target/i386/indirect-thunk-attr-14.c (dg-options): Likwise.
	* gcc.target/i386/indirect-thunk-attr-15.c (dg-options): Likwise.
	* gcc.target/i386/indirect-thunk-attr-16.c (dg-options): Likwise.
	* gcc.target/i386/indirect-thunk-extern-8.c (dg-options): Likwise.
	* gcc.target/i386/indirect-thunk-extern-9.c (dg-options): Likwise.
	* gcc.target/i386/indirect-thunk-extern-10.c (dg-options): Likwise.
	* gcc.target/i386/pr82659-1.c (dg-options): Likwise.
	* gcc.target/i386/pr82659-2.c (dg-options): Likwise.
	* gcc.target/i386/pr82659-3.c (dg-options): Likwise.
	* gcc.target/i386/pr82659-4.c (dg-options): Likwise.
	* gcc.target/i386/pr82659-5.c (dg-options): Likwise.
	* gcc.target/i386/pr82659-6.c (dg-options): Likwise.
	* gcc.target/i386/pr84146.c (dg-options): Likwise.
	* gcc.target/i386/pr85403.c (dg-options): Likwise.
	* gcc.target/i386/pr85404.c (dg-options): Likwise.
	* gcc.target/i386/cet-intrin-3.c (dg-options): Replace -mcet
	with -mshstk.
	* gcc.target/i386/cet-intrin-5.c (dg-options): Likwise.
	* gcc.target/i386/cet-intrin-6.c (dg-options): Likwise.
	* gcc.target/i386/cet-intrin-7.c (dg-options): Likwise.
	* gcc.target/i386/cet-intrin-8.c (dg-options): Likwise.
	* gcc.target/i386/cet-intrin-9.c (dg-options): Likwise.
	* gcc.target/i386/cet-intrin-10.c (dg-options): Likwise.
	* gcc.target/i386/cet-rdssp-1.c (dg-options): Likwise.
	* (dg-options): Likwise.
	* gcc.target/i386/cet-notrack-1a.c (dg-options): Remove
	-mno-cet.
	* gcc.target/i386/cet-notrack-4a.c (dg-options): Likwise.
	* gcc.target/i386/cet-label-3.c: Removed.
	* gcc.target/i386/cet-property-3.c: Likwise.
	* gcc.target/i386/cet-sjlj-7.c: Likwise.

From-SVN: r259612

committed Apr 24, 2018

d16d033b Browse Files

Don't bootstrap GCC with -mcet · 48f64e05

With revision 259496:

commit b1384095a7c1d06a44b70853372ebe037b2f7867
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Thu Apr 19 15:15:04 2018 +0000

    x86: Enable -fcf-protection with multi-byte NOPs

-fcf-protection no longer requires -mcet.

config/

	PR target/85485
	* bootstrap-cet.mk (STAGE2_CFLAGS): Remove -mcet.
	(STAGE3_CFLAGS): Likewise.

gcc/

	PR target/85485
	* doc/install.texi: Remove -mcet from bootstrap-cet.

From-SVN: r259611

committed Apr 24, 2018

48f64e05 Browse Files

Regenerate configure of target libraries · 7b47ecf2
```
	* configure: Regenerated.

From-SVN: r259610
```
H.J. Lu committed Apr 24, 2018
7b47ecf2 Browse Files

re PR target/85511 ([X86] Using __builtin_ia32_writeeflags_u32 in 64-bit mode… · e8ac3359

re PR target/85511 ([X86] Using __builtin_ia32_writeeflags_u32 in 64-bit mode causes internal compiler error)

	PR target/85511
	* config/i386/i386.c (ix86_init_mmx_sse_builtins): Don't define
	__builtin_ia32_readeflags_u32 and __builtin_ia32_writeeflags_u32
	if TARGET_64BIT.

	* gcc.target/i386/pr85511.c: New test.

From-SVN: r259609

committed Apr 24, 2018

e8ac3359 Browse Files

x86/CET: Build target libraries with -mshstk · 8624f868

With revision 259522:

commit d59cfa9a4064339cf2bd2da828c4c133f13e57f0
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Fri Apr 20 13:30:13 2018 +0000

    Define __CET__ for -fcf-protection and remove -mibt

-mcet becomes an alias for -mshstk.

	PR target/85485
	* cet.m4 (GCC_CET_FLAGS): Replace -mcet with -mshstk.

From-SVN: r259608

committed Apr 24, 2018

8624f868 Browse Files

re PR target/85503 (ICE in replace_swapped_load_constant, at… · c61199f2

re PR target/85503 (ICE in replace_swapped_load_constant, at config/rs6000/rs6000-p8swap.c:1853 on powerpc64le-linux-gnu)

	PR target/85503
	* config/rs6000/rs6000-p8swap.c (const_load_sequence_p): Punt if
	const_vector is not CONST_VECTOR or SYMBOL_REF for a constant pool
	containing a CONST_VECTOR.

	* g++.dg/ext/pr85503.C: New test.

From-SVN: r259607

committed Apr 24, 2018

c61199f2 Browse Files

Testsuite fixes for C++11 alignof change. · 7f3c03bf

gcc/testsuite:
	* c-c++-common/attr-aligned-1.c: Use __alignof__ in C++11.
	* g++.dg/cpp0x/alignas4.C: Expect 4-byte alignment on x86.

From-SVN: r259606

committed Apr 24, 2018

7f3c03bf Browse Files

[nvptx] Update newlib dependency. · 8ff02f96
```
	gcc/
	* doc/install.texi: Update newlib dependency for nvptx.

From-SVN: r259596
```
Cesar Philippidis committed Apr 24, 2018
8ff02f96 Browse Files

re PR target/85508 (runtime error in config/i386/i386.c) · 1704194a

	PR target/85508
	* config/i386/i386.c (ix86_expand_vector_init_one_var): Use UINTVAL
	instead of INTVAL when shifting x left.

	* gcc.target/i386/pr85508.c: New test.

From-SVN: r259594

committed Apr 24, 2018

1704194a Browse Files

re PR tree-optimization/85478 (ICE with single element vector) · 062c0a7b

Fix PR85478

gcc/ChangeLog:

2018-04-24  Andreas Krebbel  <krebbel@linux.ibm.com>

	PR tree-optimization/85478
	* tree-vect-loop.c (vect_analyze_loop_2): Do not call
	vect_grouped_store_supported for single element vectors.

gcc/testsuite/ChangeLog:

2018-04-24  Andreas Krebbel  <krebbel@linux.ibm.com>

	PR tree-optimization/85478
	* g++.dg/pr85478.C: New test.

From-SVN: r259593

committed Apr 24, 2018

062c0a7b Browse Files

re PR target/85491 (nbench LU Decomposition test 15% slower than GCC 7, 30% slower than peak) · 4149dd37

2018-04-24  Richard Biener  <rguenther@suse.de>

	PR target/85491
	* config/i386/i386.c (ix86_add_stmt_cost): Restrict strided
	load cost increase to the case of non-constant step.

From-SVN: r259592

committed Apr 24, 2018

4149dd37 Browse Files

re PR target/84828 (ICE in verify_flow_info at gcc/cfghooks.c:265) · b72139ea

	PR target/84828
	* reg-stack.c (move_for_stack_reg): Don't fail assertion about dead
	destination if any_malformed_asm.

From-SVN: r259591

committed Apr 24, 2018

b72139ea Browse Files

Daily bump. · 950ec7e9
```
From-SVN: r259589
```
GCC Administrator committed Apr 24, 2018
950ec7e9 Browse Files

23 Apr, 2018 10 commits

PR c++/69560 - wrong alignof(double) on x86. · aa2b1055

	CWG 1879 - Inadequate definition of alignment requirement.
	* cp-tree.h (ALIGNOF_EXPR_STD_P): New.
	* typeck.c (cxx_sizeof_or_alignof_type): Add std_alignof parm.
	(cxx_sizeof_expr, cxx_sizeof_nowarn, cxx_alignas_expr)
	(cxx_alignof_expr): Pass it.
	* parser.c (cp_parser_unary_expression): Pass it.
	* pt.c (tsubst_copy): Copy it.
	(tsubst_copy_and_build): Pass it.
	* decl.c (fold_sizeof_expr): Pass it.

From-SVN: r259578

committed Apr 23, 2018

aa2b1055 Browse Files

Regenerate .pot files. · 71fbbf65

gcc/po:
	* gcc.pot: Regenerate.

libcpp/po:
	* cpplib.pot: Regenerate.

From-SVN: r259575

committed Apr 23, 2018

71fbbf65 Browse Files

re PR middle-end/85496 (internal compiler error: in emit_move_insn, at expr.c:3722) · a689171e

	PR middle-end/85496
	* expr.c (store_field): In the bitfield case, if the value comes from
	a function call and is returned in registers by means of a PARALLEL,
	do not change the mode of the temporary unless BLKmode and VOIDmode.

From-SVN: r259574

committed Apr 23, 2018

a689171e Browse Files

PR c++/85470 - wrong error with static data member. · 53de8a7e

	* decl.c (check_initializer): Check DECL_INITIALIZED_IN_CLASS_P.
	* typeck2.c (store_init_value): Likewise.

Co-Authored-By: Jason Merrill <jason@redhat.com>

From-SVN: r259571

committed Apr 23, 2018

53de8a7e Browse Files

Add myself to MAINTAINERS. · ae9fb56f
```
* MAINTAINERS (write after approval): Add myself.

From-SVN: r259570
```
Paul Clarke committed Apr 23, 2018
ae9fb56f Browse Files

re PR rtl-optimization/85423 (ICE in code_motion_process_successors, at sel-sched.c:6403) · 99219dba

        PR rtl-optimization/85423

        * sel-sched-ir.c (has_dependence_note_mem_dep): Only discard
        dependencies to debug insns when the previous insn is non-debug.

        * gcc.dg/pr85423.c: New test.

From-SVN: r259563

committed Apr 23, 2018

99219dba Browse Files

x86/cet: Use unsigned integer to unwind shadow stack · 0ef9f21d

Use unsigned integer to unwind shadow stack by replacing jle with jbe and
jg with ja.

	PR target/85489
	* config/x86/sjlj.S (GTM_longjmp): Replace jle/jg with jbe/ja.

From-SVN: r259559

committed Apr 23, 2018

0ef9f21d Browse Files

[ARC] Fix FLS, SETI patterns. · 9ba5e5fc

Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md ("vunspec"): Delete it, unify all the unspec
	enums into a single definition.
	(fls): Fix predicates and printing.
	(seti): Likewise.

From-SVN: r259558

committed Apr 23, 2018

9ba5e5fc Browse Files

[ARC] Update sleep builtin. · 31d2e01a

gcc/
2018-04-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc-protos.h (check_if_valid_sleep_operand): Remove.
	* config/arc/arc.c (arc_expand_builtin): Sleep accepts registers
	and short u6 immediate.
	(check_if_valid_sleep_operand): Remove.
	* config/arc/arc.md (Sleep): Accepts registers and u6 immediates.

changelog

From-SVN: r259557

committed Apr 23, 2018

31d2e01a Browse Files

Daily bump. · 6dfcb0c4
```
From-SVN: r259556
```
GCC Administrator committed Apr 23, 2018
6dfcb0c4 Browse Files

22 Apr, 2018 10 commits

[NDS32] Add new option -malways-save-lp. · 13116651

gcc/
	* config/nds32/nds32.c (nds32_compute_stack_frame): Consider
	flag_always_save_lp condition.
	* config/nds32/nds32.opt (malways-save-lp): New option.

From-SVN: r259553

committed Apr 22, 2018

13116651 Browse Files

[NDS32] Implment USE_LOAD_POST_INCREMENT, USE_LOAD_POST_DECREMENT,… · c411e9aa

[NDS32] Implment USE_LOAD_POST_INCREMENT, USE_LOAD_POST_DECREMENT, USE_STORE_POST_DECREMENT and USE_STORE_POST_INCREMENT.

gcc/
	* config/nds32/nds32-protos.h (nds32_use_load_post_increment): Declare.
	* config/nds32/nds32.c (nds32_use_load_post_increment): New.
	* config/nds32/nds32.h
	(USE_LOAD_POST_INCREMENT, USE_LOAD_POST_DECREMENT): Define.
	(USE_STORE_POST_INCREMENT, USE_STORE_POST_DECREMENT): Define.

From-SVN: r259552

committed Apr 22, 2018

c411e9aa Browse Files

[NDS32] Remove unused function: nds32_ls_333_p(). · 029db20e

gcc/
	* config/nds32/nds32-protos.h (nds32_ls_333_p): Remove.
	* config/nds32/nds32.c (nds32_ls_333_p): Remove.

From-SVN: r259551

committed Apr 22, 2018

029db20e Browse Files

[NDS32] Refine CASE_VECTOR_SHORTEN_MODE to function. · 2f1bb3ca

gcc/
	* config/nds32/nds32-protos.h (nds32_case_vector_shorten_mode):
	Declare.
	* config/nds32/nds32.c (nds32_case_vector_shorten_mode): New function.
	* config/nds32/nds32.h (CASE_VECTOR_SHORTEN_MODE): Modify.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r259550

committed Apr 22, 2018

2f1bb3ca Browse Files

[NDS32] Fix wrong input value of parameter from stack for variable-length function. · 361292be
```
gcc/
	* config/nds32/nds32.c (nds32_compute_stack_frame): Fix wrong value.

From-SVN: r259549
```
Chung-Ju Wu committed Apr 22, 2018
361292be Browse Files

[NDS32] Implement DATA_ALIGNMENT, LOCAL_ALIGNMENT and TARGET_CONSTANT_ALIGNMENT. · 79498ad8

gcc/
	* config/nds32/nds32-protos.h (nds32_data_alignment,
	nds32_local_alignment): Declare.
	* config/nds32/nds32.c (nds32_data_alignment, nds32_constant_alignment,
	nds32_local_alignment): New functions.
	(TARGET_CONSTANT_ALIGNMENT): Define.
	* config/nds32/nds32.h (DATA_ALIGNMENT, LOCAL_ALIGNMENT): Define.

From-SVN: r259548

committed Apr 22, 2018

79498ad8 Browse Files

[NDS32] Move some target hooks to the bottom of nds32.c file. · 50256c75

gcc/
	* config/nds32/nds32.c
	(TARGET_HARD_REGNO_MODE_OK): Move to the bottom of file.
	(TARGET_MODES_TIEABLE_P): Likewise.

From-SVN: r259547

committed Apr 22, 2018

50256c75 Browse Files

[NDS32] Consider -Ofast and -Og in nds32_asm_file_start function. · 10c8bd03
```
gcc/
	* config/nds32/nds32.c (nds32_asm_file_start): Display optimization
	level Ofast and Og.

From-SVN: r259546
```
Chung-Ju Wu committed Apr 22, 2018
10c8bd03 Browse Files

[NDS32] Add unaligned access support. · bc8a8810

gcc/
	* config/nds32/constants.md (unspec_volatile_element): Add enum values
	for unaligned access.
	* config/nds32/nds32-intrinsic.c: Implementation of expanding
	unaligned access.
	* config/nds32/nds32-intrinsic.md: Likewise.
	* config/nds32/nds32_intrinsic.h: Likewise.
	* config/nds32/nds32.h (nds32_builtins): Likewise.
	* config/nds32/nds32.opt (munaligned-access): New option.
	* config/nds32/nds32.c (nds32_asm_file_start): Display
	flag_unaligned_access status.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r259545

committed Apr 22, 2018

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Daily bump. · 020c350c
```
From-SVN: r259544
```
GCC Administrator committed Apr 22, 2018
020c350c Browse Files

21 Apr, 2018 2 commits

RISC-V: Pass --no-relax to linker if -mno-relax is present. · 559fb136

	gcc/
	2018-04-20  Kito Cheng  <kito.cheng@gmail.com>
	* config/riscv/elf.h (LINK_SPEC): Pass --no-relax if
	-mno-relax is present.
	* config/riscv/linux.h (LINK_SPEC): Ditto.

From-SVN: r259540

committed Apr 20, 2018

559fb136 Browse Files

Daily bump. · f046f4b0
```
From-SVN: r259539
```
GCC Administrator committed Apr 21, 2018
f046f4b0 Browse Files

20 Apr, 2018 1 commit

PR c/85365 - -Wrestrict false positives with -fsanitize=undefined · 8cd95cec

gcc/ChangeLog:

	PR c/85365
	* gimple-fold.c (gimple_fold_builtin_strcpy): Suppress -Wrestrict
	for null pointers.
	(gimple_fold_builtin_stxcpy_chk): Same.
	* gimple-ssa-warn-restrict.c (check_bounds_or_overlap): Same.

gcc/testsuite/ChangeLog:

	PR c/85365
	* gcc.dg/Wrestrict-15.c: New test.

From-SVN: r259535

committed Apr 20, 2018

8cd95cec Browse Files