The recent stack_protect_combined_set_insn and
stack_protect_combined_test_insn force recomputing of GOT base, but
need to take into account that in FDPIC mode, the PIC register is
fixed by the ABI (r9).

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

	gcc/
	* config/arm/arm.md (stack_protect_combined_set_insn): Handle
	FDPIC mode.
	(stack_protect_combined_test_insn): Likewise.

From-SVN: r275582

uclibc defines bswap_32, so use a different name in this test.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

	gcc/testsuite/
	* gcc.target/arm/pr43698.c (bswap_32): Rename as my_bswap_32.

From-SVN: r275581

Some tests have the "nonpic" guard, but pass on
arm*-*-uclinuxfdpiceabi because it is in PIE mode by default. Rather
than adding this target to all these tests, add the "pie_enabled"
effective target.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

	gcc/testsuite/
	* g++.dg/cpp0x/noexcept03.C: Add pie_enabled.
	* g++.dg/ipa/devirt-c-7.C: Likewise.
	* g++.dg/ipa/ivinline-1.C: Likewise.
	* g++.dg/ipa/ivinline-2.C: Likewise.
	* g++.dg/ipa/ivinline-3.C: Likewise.
	* g++.dg/ipa/ivinline-4.C: Likewise.
	* g++.dg/ipa/ivinline-5.C: Likewise.
	* g++.dg/ipa/ivinline-7.C: Likewise.
	* g++.dg/ipa/ivinline-8.C: Likewise.
	* g++.dg/ipa/ivinline-9.C: Likewise.
	* g++.dg/tls/pr79288.C: Likewise.
	* gcc.dg/addr_equal-1.c: Likewise.
	* gcc.dg/const-1.c: Likewise.
	* gcc.dg/ipa/pure-const-1.c: Likewise.
	* gcc.dg/noreturn-8.c: Likewise.
	* gcc.dg/pr33826.c: Likewise.
	* gcc.dg/torture/ipa-pta-1.c: Likewise.
	* gcc.dg/tree-ssa/alias-2.c: Likewise.
	* gcc.dg/tree-ssa/ipa-split-5.c: Likewise.
	* gcc.dg/tree-ssa/loadpre6.c: Likewise.
	* gcc.dg/uninit-19.c: Likewise.

From-SVN: r275580

Add *-*-uclinux* to tests that work on this target.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

	gcc/testsuite/
	* g++.dg/abi/forced.C: Add *-*-uclinux*.
	* g++.dg/abi/guard2.C: Likewise.
	* g++.dg/ext/cleanup-10.C: Likewise.
	* g++.dg/ext/cleanup-11.C: Likewise.
	* g++.dg/ext/cleanup-8.C: Likewise.
	* g++.dg/ext/cleanup-9.C: Likewise.
	* g++.dg/ext/sync-4.C: Likewise.
	* g++.dg/ipa/comdat.C: Likewise.
	* gcc.dg/20041106-1.c: Likewise.
	* gcc.dg/cleanup-10.c: Likewise.
	* gcc.dg/cleanup-11.c: Likewise.
	* gcc.dg/cleanup-8.c: Likewise.
	* gcc.dg/cleanup-9.c: Likewise.
	* gcc.dg/fdata-sections-1.c: Likewise.
	* gcc.dg/fdata-sections-2.c: Likewise.
	* gcc.dg/pr39323-1.c: Likewise.
	* gcc.dg/pr39323-2.c: Likewise.
	* gcc.dg/pr39323-3.c: Likewise.
	* gcc.dg/pr65780-1.c: Likewise.
	* gcc.dg/pr65780-2.c: Likewise.
	* gcc.dg/pr67338.c: Likewise.
	* gcc.dg/pr78185.c: Likewise.
	* gcc.dg/pr83100-1.c: Likewise.
	* gcc.dg/pr83100-4.c: Likewise.
	* gcc.dg/strlenopt-12g.c: Likewise.
	* gcc.dg/strlenopt-14g.c: Likewise.
	* gcc.dg/strlenopt-14gf.c: Likewise.
	* gcc.dg/strlenopt-16g.c: Likewise.
	* gcc.dg/strlenopt-17g.c: Likewise.
	* gcc.dg/strlenopt-18g.c: Likewise.
	* gcc.dg/strlenopt-1f.c: Likewise.
	* gcc.dg/strlenopt-22g.c: Likewise.
	* gcc.dg/strlenopt-2f.c: Likewise.
	* gcc.dg/strlenopt-31g.c: Likewise.
	* gcc.dg/strlenopt-33g.c: Likewise.
	* gcc.dg/strlenopt-4g.c: Likewise.
	* gcc.dg/strlenopt-4gf.c: Likewise.
	* gcc.dg/strncmp-2.c: Likewise.
	* gcc.dg/struct-ret-3.c: Likewise.
	* gcc.dg/torture/pr69760.c: Likewise.
	* gcc.target/arm/div64-unwinding.c: Likewise.
	* gcc.target/arm/stack-checking.c: Likewise.
	* gcc.target/arm/synchronize.c: Likewise.
	* gcc.target/arm/pr66912.c: Add arm*-*-uclinuxfdpiceabi.
	* lib/target-supports.exp (check_effective_target_pie): Likewise.
	(check_effective_target_sync_long_long_runtime): Likewise.
	(check_effective_target_sync_int_long): Likewise.
	(check_effective_target_sync_char_short): Likewise.

From-SVN: r275579

Some tests fail on arm*-*-uclinuxfdpiceabi because it generates PIC
code and they don't support it: skip them. They also fail on
arm*-linux* when forcing -fPIC.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

	gcc/testsuite/
	* gcc.target/arm/eliminate.c: Accept only nonpic targets.
	* g++.dg/other/anon5.C: Likewise.

From-SVN: r275578

In FDPIC mode, r9 is saved in addition to other registers, so update
the expected patterns accordingly.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/testsuite/
	* gcc.target/arm/interrupt-1.c: Add scan-assembler pattern for
	arm*-*-uclinuxfdpiceabi.
	* gcc.target/arm/interrupt-2.c: Likewise.
	* gcc.target/arm/pr70830.c: Likewise.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275577

Several tests cannot work on ARM-FDPIC for various reasons: skip them,
or skip some directives.

gcc.dg/20020312-2.c: Skip since it forces -fno-pic.

gcc.target/arm/:
* Skip since r9 is clobbered by assembly code:
  20051215-1.c
  mmx-1.c
  pr61948.c
  pr77933-1.c
  pr77933-2.c

* Skip since the test forces armv5te which is not supported by FDPIC:
  pr40887.c
  pr19599.c

* Skip since FDPIC disables sibcall to external functions:
  sibcall-1.c
  tail-long-call
  vfp-longcall-apcs

* Skip size check since it's different for FDPIC:
  ivopts-2.c
  ivopts-3.c
  ivopts-4.c
  ivopts-5.c
  pr43597.c
  pr43920-2.c

* Disable assembler scanning invalid for FDPIC:
  pr45701-1.c
  pr45701-2.c
  stack-red-zone.c

* gnu2 TLS dialect is not supported by FDPIC:
  tlscall.c

* Test relies on symbols not generated in FDPIC:
  data-rel-2.c
  data-rel-3.c

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/testsuite/
	* gcc.dg/20020312-2.c: Skip on arm*-*-uclinuxfdpiceabi.
	* gcc.target/arm/20051215-1.c: Likewise.
	* gcc.target/arm/mmx-1.c: Likewise.
	* gcc.target/arm/pr19599.c: Likewise.
	* gcc.target/arm/pr40887.c: Likewise.
	* gcc.target/arm/pr61948.c: Likewise.
	* gcc.target/arm/pr77933-1.c: Likewise.
	* gcc.target/arm/pr77933-2.c: Likewise.
	* gcc.target/arm/sibcall-1.c: Likewise.
	* gcc.target/arm/data-rel-2.c: Likewise.
	* gcc.target/arm/data-rel-3.c: Likewise.
	* gcc.target/arm/tail-long-call: Likewise.
	* gcc.target/arm/tlscall.c: Likewise.
	* gcc.target/arm/vfp-longcall-apcs: Likewise.
	* gcc.target/arm/ivopts-2.c: Skip object-size test on
	arm*-*-uclinuxfdpiceabi.
	* gcc.target/arm/ivopts-3.c: Likewise.
	* gcc.target/arm/ivopts-4.c: Likewise.
	* gcc.target/arm/ivopts-5.c: Likewise.
	* gcc.target/arm/pr43597.c: Likewise.
	* gcc.target/arm/pr43920-2.c: Likewise.
	* gcc.target/arm/pr45701-1.c: Skip scan-assembler on
	arm*-*-uclinuxfdpiceabi.
	* gcc.target/arm/pr45701-2.c: Likewise.
	* gcc.target/arm/stack-red-zone.c: Likewise.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275576

Without this, when we are unwinding across a signal frame we can jump
to an even address which leads to an exception.

This is needed in __gnu_persnality_sigframe_fdpic() when restoring the
PC from the signal frame since the PC saved by the kernel has the LSB
bit set to zero.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	libgcc/
	* config/arm/unwind-arm.c (_Unwind_VRS_Set): Handle thumb-only
	architecture.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275575

We call __aeabi_read_tp() to get the thread pointer. Since this is a
function call, we have to restore the FDPIC register afterwards.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config/arm/arm.c (arm_load_tp): Add FDPIC support.
	* config/arm/arm.md (FDPIC_REGNUM): New constant.
	(load_tp_soft_fdpic): New pattern.
	(load_tp_soft): Disable in FDPIC mode.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275574

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	libgcc/
	* unwind-arm-common.inc (ARM_SET_R7_RT_SIGRETURN)
	(THUMB2_SET_R7_RT_SIGRETURN, FDPIC_LDR_R12_WITH_FUNCDESC)
	(FDPIC_LDR_R9_WITH_GOT, FDPIC_LDR_PC_WITH_RESTORER)
	(FDPIC_FUNCDESC_OFFSET, ARM_NEW_RT_SIGFRAME_UCONTEXT)
	(ARM_UCONTEXT_SIGCONTEXT, ARM_SIGCONTEXT_R0, FDPIC_T2_LDR_R12_WITH_FUNCDESC)
	(FDPIC_T2_LDR_R9_WITH_GOT, FDPIC_T2_LDR_PC_WITH_RESTORER): New.
	(__gnu_personality_sigframe_fdpic): New.
	(get_eit_entry): Add FDPIC signal frame support.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275573

Support additional relocations: TLS_GD32_FDPIC, TLS_LDM32_FDPIC, and
TLS_IE32_FDPIC.

We do not support the GNU2 TLS dialect.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config/arm/arm.c (tls_reloc): Add TLS_GD32_FDPIC,
	TLS_LDM32_FDPIC and TLS_IE32_FDPIC.
	(arm_call_tls_get_addr): Add FDPIC support.
	(legitimize_tls_address): Likewise.
	(arm_emit_tls_decoration): Likewise.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275572

In FDPIC mode, the trampoline generated to support pointers to nested
functions looks like:

	   .word	trampoline address
	   .word	trampoline GOT address
	   ldr 		r12, [pc, #8]
	   ldr 		r9, [pc, #8]
	   ldr		pc, [pc, #8]
	   .word	static chain value
	   .word	GOT address
	   .word	function's address

because in FDPIC function pointers are actually pointers to function
descriptors, we have to actually generate a function descriptor for
the trampoline.

2019--09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config/arm/arm.c (arm_asm_trampoline_template): Add FDPIC
	support.
	(arm_trampoline_init): Likewise.
	(arm_trampoline_adjust_address): Likewise.
	* config/arm/arm.h (TRAMPOLINE_SIZE): Likewise.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275571

Use local binding rules to decide whether we can use GOTOFFFUNCDESC to
compute the function address.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config/arm/arm.c (arm_fdpic_local_funcdesc_p): New function.
	(legitimize_pic_address): Enforce binding rules on function
	pointers in FDPIC mode.
	(arm_assemble_integer): Likewise.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275570

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config/arm/arm.h (PIC_REGISTER_MAY_NEED_SAVING): New helper.
	* config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle
	FDPIC.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275569

The main difference with existing support is that function addresses
are function descriptor addresses instead. This means that all code
dealing with function pointers now has to cope with function
descriptors instead.

For the same reason, Linux kernel helpers can no longer be called by
dereferencing their address, so we implement wrappers that directly
call the kernel helpers.

When restoring a function address, we also have to restore the FDPIC
register value (r9).

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* ginclude/unwind-arm-common.h (unwinder_cache): Add reserved5
	field.

	libgcc/
	* config/arm/linux-atomic.c (__kernel_cmpxchg): Add FDPIC support.
	(__kernel_dmb): Likewise.
	(__fdpic_cmpxchg): New function.
	(__fdpic_dmb): New function.
	* config/arm/unwind-arm.h (FDPIC_REGNUM): New define.
	(gnu_Unwind_Find_got): New function.
	(_Unwind_decode_typeinfo_ptr): Add FDPIC support.
	* unwind-arm-common.inc (UCB_PR_GOT): New.
	(funcdesc_t): New struct.
	(get_eit_entry): Add FDPIC support.
	(unwind_phase2): Likewise.
	(unwind_phase2_forced): Likewise.
	(__gnu_Unwind_RaiseException): Likewise.
	(__gnu_Unwind_Resume): Likewise.
	(__gnu_Unwind_Backtrace): Likewise.
	* unwind-pe.h (read_encoded_value_with_base): Likewise.

	libstdc++/
	* libsupc++/eh_personality.cc (get_ttype_entry): Add FDPIC
	support.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275568

In FDPIC, we need to make sure __do_global_dtors_aux and frame_dummy
are referenced by their address, not by pointers to the function
descriptors.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	libgcc/
	* libgcc/crtstuff.c: Add support for FDPIC.


Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275567

The FDPIC register is hard-coded to r9, as defined in the ABI.

We have to disable tailcall optimizations if we don't know if the
target function is in the same module. If not, we have to set r9 to
the value associated with the target module.

When generating a symbol address, we have to take into account whether
it is a pointer to data or to a function, because different
relocations are needed.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config/arm/arm-c.c (__FDPIC__): Define new pre-processor macro
	in FDPIC mode.
	* config/arm/arm-protos.h (arm_load_function_descriptor): Declare
	new function.
	* config/arm/arm.c (arm_option_override): Define pic register to
	FDPIC_REGNUM.
	(arm_function_ok_for_sibcall): Disable sibcall optimization if we
	have no decl or go through PLT.
	(calculate_pic_address_constant): New function.
	(legitimize_pic_address): Call calculate_pic_address_constant.
	(arm_load_pic_register): Handle TARGET_FDPIC.
	(arm_is_segment_info_known): New function.
	(arm_pic_static_addr): Add support for FDPIC.
	(arm_load_function_descriptor): New function.
	(arm_emit_call_insn): Add support for FDPIC.
	(arm_assemble_integer): Add support for FDPIC.
	* config/arm/arm.h (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED):
	Define. (FDPIC_REGNUM): New define.
	* config/arm/arm.md (call): Add support for FDPIC.
	(call_value): Likewise.
	(restore_pic_register_after_call): New pattern.
	(untyped_call): Disable if FDPIC.
	(untyped_return): Likewise.
	* config/arm/unspecs.md (UNSPEC_PIC_RESTORE): New.

	gcc/testsuite/
	* gcc.target/arm/fp16-aapcs-2.c: Adjust scan-assembler-times.
	* gcc.target/arm/fp16-aapcs-4.c: Likewise.



Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275566

In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
-fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
for executables rather than shared libraries by default.

We also make sure to use the --fdpic assembler option, and select the
appropriate linker emulation.

At link time, we also default to -pie, unless we are generating a
shared library or a relocatable file (-r). Note that static link is
not supported as it requires specifying the dynamic linker because the
executable still has to relocate itself at startup.

We also force 'now' binding since lazy binding is not supported.

We should also apply the same behavior for -Wl,-Ur as for -r, but I
couldn't find how to describe that in the specs fragment.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné <mickael.guene@st.com>

	gcc/
	* config.gcc: Handle arm*-*-uclinuxfdpiceabi.
	* config/arm/bpabi.h (TARGET_FDPIC_ASM_SPEC): New.
	(SUBTARGET_EXTRA_ASM_SPEC): Use TARGET_FDPIC_ASM_SPEC.
	* config/arm/linux-eabi.h (FDPIC_CC1_SPEC): New.
	(CC1_SPEC): Use FDPIC_CC1_SPEC.
	(MUSL_DYNAMIC_LINKER): Add -fdpic suffix when needed.
	* config/arm/uclinuxfdpiceabi.h: New file.

	libsanitizer/
	* configure.tgt (arm*-*-*fdpiceabi): Sanitizers are
	unsupported in this configuration.



Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275565

The new arm-uclinuxfdpiceabi target behaves pretty much like
arm-linux-gnueabi. In order to enable the same set of features, we
have to update several configure scripts that generally match targets
like *-*-linux*: in most places, we add *-uclinux* where there is
already *-linux*, or uclinux* when there is already linux*.

In gcc/config.gcc and libgcc/config.host we use *-*-uclinuxfdpiceabi
because there is already a different behaviour for *-*uclinux* target.

In libtool.m4, we use uclinuxfdpiceabi in cases where ELF shared
libraries support is required, as uclinux does not guarantee that.

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>

	config/
	* futex.m4: Handle *-uclinux*.
	* tls.m4 (GCC_CHECK_TLS): Likewise.

	gcc/
	* config.gcc: Handle *-*-uclinuxfdpiceabi.

	libatomic/
	* configure.tgt: Handle arm*-*-uclinux*.
	* configure: Regenerate.

	libgcc/
	* config.host: Handle *-*-uclinuxfdpiceabi.

	libitm/
	* configure.tgt: Handle *-*-uclinux*.
	* configure: Regenerate.

	* libtool.m4: Handle uclinuxfdpiceabi.

From-SVN: r275564

	PR libstdc++/91711
	* testsuite/23_containers/span/get_neg.cc: Avoid ambiguity due to
	0ul being a valid null pointer constant.

From-SVN: r275563

Define partial specializations for std::remove_cv so that
std::remove_const and std::remove_volatile don't need to be
instantiated.

	* include/std/type_traits (__remove_cv_t): New alias template.
	(is_void, is_integral, is_floating_point, is_pointer)
	(is_member_object_pointer, is_member_function_pointer, is_null_pointer)
	(is_member_point), __is_signed_integer, __is_unsigned_integer)
	(__make_unsigned_selector, __make_signed_selector, remove_pointer)
	(__decay_selector): Use __remove_cv_t.
	(remove_cv): Add partial specializations for cv-qualified types.
	(__decay_t): New alias template.
	(__decay_and_strip, __common_type_impl, __result_of_impl): Use
	__decay_t.
	(__enable_if_t): Move earlier in the file.
	(_Require): Use __enable_if_t.
	(swap(T&, T&)): Use _Require.
	(swap(T(&)[N])): Use __enable_if_t.

From-SVN: r275562

2019-09-10  Christophe Lyon  <christophe.lyon@st.com>
	Mickaël Guêné  <mickael.guene@st.com>

	* config/arm/arm.opt: Add -mfdpic option.
	* doc/invoke.texi: Add documentation for -mfdpic.



Co-Authored-By: Mickaël Guêné <mickael.guene@st.com>

From-SVN: r275561

2019-09-09  Edward Smith-Rowland  <3dw4rd@verizon.net>

	Implement C++20 p1424 - 'constexpr' feature macro concerns,
	Issue 3256 - Feature testing macro for constexpr algorithms,
	and Issue 3257 - Missing feature testing macro update from P0858.
	* include/std/version (__cpp_lib_constexpr_algorithms): Bump value.
	* include/bits/algorithmfwd.h: Ditto.
	* include/std/utility: Ditto.
	* testsuite/25_algorithms/constexpr_macro.cc: Ditto.
	* testsuite/25_algorithms/cpp_lib_constexpr.cc: New check for
	__cpp_lib_constexpr macro in <algorith>.
	* testsuite/20_util/exchange/constexpr.cc: Add check for
	__cpp_lib_constexpr macro in <utility>.
	* testsuite/25_algorithms/adjacent_find/constexpr.cc: Remove check for
	__cpp_lib_constexpr_algorithms.
	* testsuite/25_algorithms/all_of/constexpr.cc: Ditto.
	* testsuite/25_algorithms/any_of/constexpr.cc: Ditto.
	* testsuite/25_algorithms/binary_search/constexpr.cc: Ditto.
	* testsuite/25_algorithms/copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/copy_backward/constexpr.cc: Ditto.
	* testsuite/25_algorithms/copy_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/copy_n/constexpr.cc: Ditto.
	* testsuite/25_algorithms/count/constexpr.cc: Ditto.
	* testsuite/25_algorithms/count_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/equal/constexpr.cc: Ditto.
	* testsuite/25_algorithms/equal_range/constexpr.cc: Ditto.
	* testsuite/25_algorithms/fill/constexpr.cc: Ditto.
	* testsuite/25_algorithms/fill_n/constexpr.cc: Ditto.
	* testsuite/25_algorithms/find/constexpr.cc: Ditto.
	* testsuite/25_algorithms/find_end/constexpr.cc: Ditto.
	* testsuite/25_algorithms/find_first_of/constexpr.cc: Ditto.
	* testsuite/25_algorithms/find_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/find_if_not/constexpr.cc: Ditto.
	* testsuite/25_algorithms/for_each/constexpr.cc: Ditto.
	* testsuite/25_algorithms/generate/constexpr.cc: Ditto.
	* testsuite/25_algorithms/generate_n/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_heap/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_heap_until/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_partitioned/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_permutation/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_sorted/constexpr.cc: Ditto.
	* testsuite/25_algorithms/is_sorted_until/constexpr.cc: Ditto.
	* testsuite/25_algorithms/lexicographical_compare/constexpr.cc: Ditto.
	* testsuite/25_algorithms/lower_bound/constexpr.cc: Ditto.
	* testsuite/25_algorithms/merge/constexpr.cc: Ditto.
	* testsuite/25_algorithms/mismatch/constexpr.cc: Ditto.
	* testsuite/25_algorithms/none_of/constexpr.cc: Ditto.
	* testsuite/25_algorithms/partition_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/partition_point/constexpr.cc: Ditto.
	* testsuite/25_algorithms/remove/constexpr.cc: Ditto.
	* testsuite/25_algorithms/remove_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/remove_copy_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/remove_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/replace_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/replace_copy_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/replace_if/constexpr.cc: Ditto.
	* testsuite/25_algorithms/reverse_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/rotate_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/search/constexpr.cc: Ditto.
	* testsuite/25_algorithms/search_n/constexpr.cc: Ditto.
	* testsuite/25_algorithms/set_difference/constexpr.cc: Ditto.
	* testsuite/25_algorithms/set_intersection/constexpr.cc: Ditto.
	* testsuite/25_algorithms/set_symmetric_difference/constexpr.cc: Ditto.
	* testsuite/25_algorithms/set_union/constexpr.cc: Ditto.
	* testsuite/25_algorithms/transform/constexpr.cc: Ditto.
	* testsuite/25_algorithms/unique/constexpr.cc: Ditto.
	* testsuite/25_algorithms/unique_copy/constexpr.cc: Ditto.
	* testsuite/25_algorithms/upper_bound/constexpr.cc: Ditto.

From-SVN: r275560

    
    Also fix the key used to store the ID.
    
    This is a significant speedup in cmd/go run time.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194257

From-SVN: r275559

    
    This relatively minor change increases the number of inlinable
    functions/methods in the standard library from 983 to 2179.
    
    In particular it permits inlining math/bits/RotateLeftNN.  This
    restores the speed of crypto/sha256 back to what it was before the
    update to 1.13beta1.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194340

From-SVN: r275558

	* decl.c (grokdeclarator): Diagnose wrong usage of decltype(auto) in
	a function declaration.

	* g++.dg/cpp1y/auto-fn57.C: New test.

From-SVN: r275557

From-SVN: r275555

    
    They were lost when the files were moved in the update to Go1.13beta1.
    These changes should be made in the master repo for the 1.14 release,
    as riscv64 support is added there.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194343

From-SVN: r275551

    
    The C file has a build tag, but the procedure we use for building C
    files ignores build tags.
    
    This should fix the libgo build on non-x86 systems.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194378

From-SVN: r275544

2019-09-09  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * expmed.c (extract_bit_field): Update function comment
        regarding alt_rtl.
        * expr.c (expand_expr_real): Update function comment
        regarding alt_rtl.
        (expand_misaligned_mem_ref): New helper function.
        (expand_expr_real_2): Use expand_misaligned_mem_ref.
        Remove duplicate assignment to "base" at case MEM_REF.
        Remove a shadowed variable "unsignedp" at case VCE.

From-SVN: r275541

    
    For the main package we add an implicit import of the runtime package,
    to ensure that it is initialized.  That import used the predeclared
    location, which caused various tests, notably Named_type::is_builtin,
    to treat these imported names as builtin.  Start using a real location,
    so that those tests do the right thing.
    
    By the way, this implicit import is a partial cause of golang/go#19773.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194337

From-SVN: r275540

    
    We forgot to ever traverse types of constant expressions.  This rarely
    makes a difference--evidently, since nobody noticed--but it does
    matter when we inline constant expressions: we need to ensure that the
    type is visible to the importing code.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/194317

From-SVN: r275539

We currently maintain global REG_SET versions of fixed_reg_set
and regs_invalidated_by_call.  With bitmap_view, we can instead
operate directly on the underlying HARD_REG_SETs, avoiding the
need to keep the two pieces of data in sync.

I have a series of patches that removes the assumption that there's
a single global ABI for all functions in the translation unit,
which includes not relying on having a global regs_invalidated_by_call.
Removing the REG_SET equivalent is one step to doing that.

Note that the affected DF code is used for EH edges or dumping only,
so shouldn't be performance critical.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* regset.h (regs_invalidated_by_call_regset): Delete.
	(fixed_reg_set_regset): Likewise.
	* reginfo.c (regs_invalidated_by_call_regset): Likewise.
	(fixed_reg_set_regset, persistent_obstack): Likewise.
	(init_reg_sets_1, globalize_reg): Update accordingly.
	* df.h (df_print_regset, df_print_word_regset): Take a const_bitmap
	instead of a bitmap.
	* df-core.c (df_print_regset, df_print_word_regset): Likewise.
	* df-problems.c (df_rd_local_compute): Use regs_invalidated_by_call
	instead of regs_invalidated_by_call_regset.
	(df_lr_confluence_n, df_md_confluence_n): Likewise.
	* df-scan.c (df_scan_start_dump): Likewise.
	* dse.c (copy_fixed_regs): Likewise.
	* config/sh/sh.c (sh_find_equiv_gbr_addr): Likewise.

From-SVN: r275537

This patch adds a bitmap_view<X> class that creates a read-only,
on-stack bitmap representation of an array-like object X.  The main
use case is to allow HARD_REG_SETs to be used in REG_SET (i.e. bitmap)
operations.

For now it only handles constant-sized arrays, but I've tried to
define the types in a way that could handle variable-sized arrays
in future (although less efficiently).  E.g. this might be useful
for combining bitmaps and sbitmaps.

For the read-only view to work as intended, I needed to make
bitmap_bit_p take a const_bitmap instead of a bitmap.  Logically
the bitmap really is read-only, but we update the "current" and
"indx" fields of the bitmap_head after doing a search.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* array-traits.h: New file.
	* coretypes.h (array_traits, bitmap_view): New types.
	* bitmap.h: Include "array-traits.h"
	(bitmap_bit_p): Take a const_bitmap instead of a bitmap.
	(base_bitmap_view, bitmap_view): New classes.
	* bitmap.c (bitmap_bit_p): Take a const_bitmap instead of a bitmap.
	* hard-reg-set.h: Include array-traits.h.
	(array_traits<HARD_REG_SET>): New struct.
	* regset.h (IOR_REG_SET_HRS): New macro.
	* loop-iv.c (simplify_using_initial_values): Use IOR_REG_SET_HRS
	rather than iterating over each hard register.
	* sched-deps.c (sched_analyze_insn): Likewise.
	* sel-sched-ir.c (setup_id_implicit_regs): Likewise.

From-SVN: r275536

This patch makes ior_hard_reg_conflicts take a const_hard_reg_set
rather than a pointer, so that it can be passed a temporary object
in later patches.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* ira-int.h (ior_hard_reg_conflicts): Take a const_hard_reg_set
	instead of a HARD_REG_SET *.
	* ira-build.c (ior_hard_reg_conflicts): Likewise.
	(ira_build): Update call accordingly.
	* ira-emit.c (add_range_and_copies_from_move_list): Likewise.

From-SVN: r275535

Use "x == y" instead of "hard_reg_set_equal_p (x, y)".

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (HARD_REG_SET::operator==): New function.
	(HARD_REG_SET::operator!=): Likewise.
	(hard_reg_set_equal_p): Delete.
	* cfgcleanup.c (old_insns_match_p): Use == instead of
	hard_reg_set_equal_p and != instead of !hard_reg_set_equal_p.
	* ira-color.c (allocno_hard_regs_hasher::equal): Likewise.
	(add_allocno_hard_regs_to_forest): Likewise.
	(setup_allocno_available_regs_num): Likewise.
	* ira.c (setup_pressure_classes): Likewise.
	(setup_allocno_and_important_classes): Likewise.
	(setup_reg_class_relations): Likewise.
	* lra-lives.c (process_bb_lives): Likewise.
	* reg-stack.c (change_stack, convert_regs_1): Likewise.

From-SVN: r275534

Use "x |= ~y" instead of "IOR_COMPL_HARD_REG_SET (x, y)", or just
"x | ~y" if the result is a temporary.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (IOR_COMPL_HARD_REG_SET): Delete.
	* config/aarch64/cortex-a57-fma-steering.c (rename_single_chain):
	Use "|~" instead of IOR_COMPL_HARD_REG_SET.
	* config/aarch64/falkor-tag-collision-avoidance.c (init_unavailable):
	Likewise.
	* ira-build.c (ira_create_object, ira_set_allocno_class): Likewise.
	* ira.c (setup_reg_renumber): Likewise.
	* lra-assigns.c (find_hard_regno_for_1): Likewise.
	* regrename.c (regrename_find_superclass): Likewise.
	* reload1.c (find_reg): Likewise.

From-SVN: r275533

Use "x &= ~y" instead of "AND_COMPL_HARD_REG_SET (x, y)", or just
"x & ~y" if the result is a temporary.  This means that we're splitting
it into two operations, but the compiler should be able to combine them
for reasonable values of FIRST_PSEUDO_REGISTER.

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (AND_COMPL_HARD_REG_SET): Delete.
	* caller-save.c (setup_save_areas): Use "&~" instead of
	AND_COMPL_HARD_REG_SET.
	(save_call_clobbered_regs): Likewise.
	* config/epiphany/epiphany.c (epiphany_conditional_register_usage):
	Likewise.
	* config/frv/frv.c (frv_ifcvt_modify_tests): Likewise.
	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
	* config/i386/i386.c (ix86_conditional_register_usage): Likewise.
	* config/mips/mips.c (mips_class_max_nregs): Likewise.
	(mips_conditional_register_usage): Likewise.
	* config/sh/sh.c (output_stack_adjust): Likewise.
	* ira-color.c (form_allocno_hard_regs_nodes_forest): Likewise.
	(setup_profitable_hard_regs): Likewise.
	(get_conflict_and_start_profitable_regs): Likewise.
	* ira-conflicts.c (print_allocno_conflicts): Likewise.
	(ira_build_conflicts): Likewise.
	* ira-costs.c (restrict_cost_classes): Likewise.
	(setup_regno_cost_classes_by_aclass): Likewise.
	* ira-lives.c (process_bb_node_lives): Likewise.
	* ira.c (setup_class_hard_regs, setup_reg_subclasses): Likewise.
	(setup_class_subset_and_memory_move_costs, setup_pressure_classes)
	(setup_allocno_and_important_classes, setup_class_translate_array)
	(setup_reg_class_relations, setup_prohibited_class_mode_regs):
	Likewise.
	* lra-assigns.c (find_hard_regno_for_1): Likewise.
	* lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise.
	(process_alt_operands, inherit_in_ebb): Likewise.
	* lra-eliminations.c (update_reg_eliminate): Likewise.
	* lra-lives.c (process_bb_lives): Likewise.
	* reload1.c (update_eliminables_and_spill, reload_as_needed): Likewise.
	* resource.c (find_dead_or_set_registers): Likewise.
	(mark_target_live_regs): Likewise.
	* sched-deps.c (get_implicit_reg_pending_clobbers): Likewise.
	* sel-sched.c (mark_unavailable_hard_regs): Likewise.
	(implicit_clobber_conflict_p): Likewise.
	* shrink-wrap.c (requires_stack_frame_p): Likewise.
	(try_shrink_wrapping): Likewise.

From-SVN: r275532

Use "x |= y" instead of "IOR_HARD_REG_SET (x, y)" (or just "x | y"
if the result is a temporary).

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (HARD_REG_SET::operator|): New function.
	(HARD_REG_SET::operator|=): Likewise.
	(IOR_HARD_REG_SET): Delete.
	* config/gcn/gcn.c (gcn_md_reorg): Use "|" instead of
	IOR_HARD_REG_SET.
	* config/m32c/m32c.c (m32c_register_move_cost): Likewise.
	* config/s390/s390.c (s390_adjust_loop_scan_osc): Likewise.
	* final.c (collect_fn_hard_reg_usage): Likewise.
	* hw-doloop.c (scan_loop, optimize_loop): Likewise.
	* ira-build.c (merge_hard_reg_conflicts): Likewise.
	(ior_hard_reg_conflicts, create_cap_allocno, propagate_allocno_info)
	(propagate_some_info_from_allocno): Likewise.
	(copy_info_to_removed_store_destinations): Likewise.
	* ira-color.c (add_allocno_hard_regs_to_forest, assign_hard_reg)
	(allocno_reload_assign, ira_reassign_pseudos): Likewise.
	(fast_allocation): Likewise.
	* ira-conflicts.c (ira_build_conflicts): Likewise.
	* ira-lives.c (make_object_dead, process_single_reg_class_operands)
	(process_bb_node_lives): Likewise.
	* ira.c (setup_pressure_classes, setup_reg_class_relations): Likewise.
	* lra-assigns.c (find_hard_regno_for_1): Likewise.
	(setup_live_pseudos_and_spill_after_risky_transforms): Likewise.
	* lra-constraints.c (process_alt_operands, inherit_in_ebb): Likewise.
	* lra-eliminations.c (spill_pseudos, update_reg_eliminate): Likewise.
	* lra-lives.c (mark_pseudo_dead, check_pseudos_live_through_calls)
	(process_bb_lives): Likewise.
	* lra-spills.c (assign_spill_hard_regs): Likewise.
	* postreload.c (reload_combine): Likewise.
	* reginfo.c (init_reg_sets_1): Likewise.
	* regrename.c (merge_overlapping_regs, find_rename_reg)
	(merge_chains): Likewise.
	* reload1.c (maybe_fix_stack_asms, order_regs_for_reload, find_reg)
	(find_reload_regs, finish_spills, choose_reload_regs_init)
	(emit_reload_insns): Likewise.
	* reorg.c (redundant_insn): Likewise.
	* resource.c (find_dead_or_set_registers, mark_set_resources)
	(mark_target_live_regs): Likewise.
	* rtlanal.c (find_all_hard_reg_sets): Likewise.
	* sched-deps.c (sched_analyze_insn): Likewise.
	* sel-sched.c (mark_unavailable_hard_regs): Likewise.
	(find_best_reg_for_expr): Likewise.
	* shrink-wrap.c (try_shrink_wrapping): Likewise.

From-SVN: r275531

Use "x &= y" instead of "AND_HARD_REG_SET (x, y)" (or just "x & y"
if the result is a temporary).

2019-09-09  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (HARD_REG_SET::operator&): New function.
	(HARD_REG_SET::operator&): Likewise.
	(AND_HARD_REG_SET): Delete.
	* caller-save.c (setup_save_areas): Use "&" instead of
	AND_HARD_REG_SET.
	(save_call_clobbered_regs): Likewise.
	* config/gcn/gcn.c (gcn_md_reorg): Likewise.
	* config/m32c/m32c.c (reduce_class): Likewise.
	* config/rs6000/rs6000.c (rs6000_register_move_cost): Likewise.
	* final.c (get_call_reg_set_usage): Likewise.
	* ira-color.c (add_allocno_hard_regs_to_forest): Likewise.
	(setup_left_conflict_sizes_p): Likewise.
	* ira-conflicts.c (print_allocno_conflicts): Likewise.
	(ira_build_conflicts): Likewise.
	* ira-costs.c (restrict_cost_classes): Likewise.
	* ira.c (setup_stack_reg_pressure_class, setup_class_translate_array)
	(setup_reg_class_relations): Likewise.
	* reginfo.c (init_reg_sets_1, record_subregs_of_mode): Likewise.
	* reload1.c (maybe_fix_stack_asms, finish_spills): Likewise.
	* resource.c (find_dead_or_set_registers): Likewise.
	* sel-sched.c (mark_unavailable_hard_regs): Likewise.

From-SVN: r275530