PR target/79487
	* real.c (real_from_integer): Call real_convert even for decimal.

	* gcc.dg/dfp/pr79487.c: New test.
	* c-c++-common/ubsan/float-cast-overflow-8.c (TEST): Revert
	2017-02-13 change.

From-SVN: r245477

gcc/ChangeLog:

2017-02-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>

	PR target/79421
	* config/s390/s390.c: define TARGET_CUSTOM_FUNCTION_DESCRIPTORS.

From-SVN: r245476

	PR libstdc++/78723
	* include/std/variant (operator<(), operator>(), operator<=(),
	operator>=(), operator==(), operator!=()): Implement P0393R3.
	* testsuite/20_util/variant/compile.cc: Adjust tests.
	* testsuite/20_util/variant/run.cc: Adjust tests.

From-SVN: r245475

	PR libstdc++/79513
	* include/std/variant (visit()): Forward variant types to the return
	type detection code.
	* testsuite/20_util/variant/compile.cc: Add test cases.

From-SVN: r245474

From-SVN: r245464

aarch64-cores.def (thunderx2t99): Move to under 'C" cores and change the partno/implementer to be correct.

2017-02-14  Andrew Pinski  <apinski@cavium.com>

        * config/aarch64/aarch64-cores.def (thunderx2t99): Move to under 'C"
        cores and change the partno/implementer to be correct.
        (thunderx2t99p1): New core which replaces thunderx2t99 and still has
        the 'B" as the implementer.
        * config/aarch64/aarch64-tune.md: Regenerate.

From-SVN: r245461

gcc/ChangeLog:

2017-02-14  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000.c: Add case statement entry to make the
	xvcvuxdsp built-in argument unsigned.
	* config/rs6000/vsx.md: Fix the source and return operand types so they
	match the instruction definitions from the ISA document.  Fix typo
	in the instruction generation for the (define_insn "vsx_xvcvuxdsp"
	statement.

gcc/testsuite/ChangeLog:

2017-01-14  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/vsx-builtin-3.c: Add missing test case for the
	xvcvsxdsp and xvcvuxdsp instructions.

From-SVN: r245460

re PR target/79282 ([7 Regresion] FAIL: gcc.target/arm/neon-for-64bits-1.c scan-assembler-times vshr 0)

2017-02-14  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/79282
	* lra-int.h (struct lra_operand_data, struct lra_insn_reg): Add
	member early_clobber_alts.
	* lra-lives.c (reg_early_clobber_p): New.
	(process_bb_lives): Use it.
	* lra.c (new_insn_reg): New arg early_clobber_alts.  Use it.
	(debug_operand_data): Initialize early_clobber_alts.
	(setup_operand_alternative): Set up early_clobber_alts.
	(collect_non_operand_hard_regs): Ditto.  Pass early clobber
	alternatives to new_insn_reg.
	(add_regs_to_insn_regno_info): Add arg early_clobber_alts.  Use
	it.
	(lra_update_insn_regno_info): Pass the new arg.

From-SVN: r245459

David found the vec-adde{,c}-int128.c testcases fail on AIX.  Those
tests should only run on targets that have int128.

This also changes the non-int128 testcases to check for the hardware
they require.


gcc/testsuite/
	* gcc.target/powerpc/vec-adde-int128.c: Only run if int128 exists.
	* gcc.target/powerpc/vec-addec-int128.c: Ditto.
	* gcc.target/powerpc/vec-adde.c: Require vsx_hw, don't require a
	64-bit default target.
	* gcc.target/powerpc/vec-addec.c: Require p8vector_hw, don't require
	a 64-bit default target.

From-SVN: r245453

	PR middle-end/79505
	* omp-offload.c (free_oacc_loop): Release loop->ifns vector.
	(new_oacc_loop_raw): Don't clear already cleared fields.

From-SVN: r245445

	PR target/79481
	* config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
	_mm512_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
	_mm512_prefetch_i64gather_ps): New inline functions and macros.

	* gcc.target/i386/sse-14.c (test_2vx): Add void return type.
	(test_3vx): Change return type from int to void. 
	(_mm512_prefetch_i32gather_ps, _mm512_prefetch_i32scatter_ps,
	_mm512_prefetch_i64gather_ps, _mm512_prefetch_i64scatter_ps,
	_mm512_prefetch_i32gather_pd, _mm512_prefetch_i32scatter_pd,
	_mm512_prefetch_i64gather_pd, _mm512_prefetch_i64scatter_pd): New
	tests.
	* gcc.target/i386/sse-22.c (test_2vx): Add void return type.
	(test_3vx): Change return type from int to void.
	(_mm512_prefetch_i32gather_ps, _mm512_prefetch_i32scatter_ps,
	_mm512_prefetch_i64gather_ps, _mm512_prefetch_i64scatter_ps,
	_mm512_prefetch_i32gather_pd, _mm512_prefetch_i32scatter_pd,
	_mm512_prefetch_i64gather_pd, _mm512_prefetch_i64scatter_pd): New
	tests.
	* gcc.target/i386/avx512pf-vgatherpf0dpd-1.c: Add non-masked
	intrinsic.  Change scan-assembler-times number from 1 to 2.
	* gcc.target/i386/avx512pf-vgatherpf0dps-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf0qpd-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf0qps-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf1dpd-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf1dps-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf1qpd-1.c: Likewise.
	* gcc.target/i386/avx512pf-vgatherpf1qps-1.c: Likewise.

From-SVN: r245444

	PR middle-end/61225
	* gcc.target/i386/pr49095.c: Add -fno-shrink-wrap to dg-options.
	Use dg-additional-options for ia32 target.  Remove XFAIL.

From-SVN: r245442

	PR target/79495
	* config/i386/i386.md (*movxf_internal): Add (o,rC) alternative.

testsuite/ChangeLog:

2017-02-14  Uros Bizjak  <ubizjak@gmail.com>

	PR target/79495
	* gcc.target/i386/pr79495.c: New test.

From-SVN: r245441

	PR c++/79420
	PR c++/79463
	* parser.c (cp_parser_postfix_dot_deref_expression): Avoid
	clobbering if the postfix expression isn't an EXPR_P.

	* g++.dg/cpp1y/pr79463.C: New.
	* g++.dg/template/incomplete10.C: New.
	* g++.dg/template/incomplete9.C: New.

From-SVN: r245440

When converting TI store with CONST_INT to V1TI store with CONST_VECTOR
in large model, an extra instruction may be needed to load CONST_VECTOR
into a register.  Insert the extra instruction to the right place.

gcc/

	PR target/79498
	* config/i386/i386.c (timode_scalar_chain::convert_insn): Insert
	the extra instruction to the right place to store 128-bit constant
	when needed.

gcc/testsuite/

	PR target/79498
	* gcc.target/i386/pr79498.c: New test.

From-SVN: r245438

gcc/testsuite/ChangeLog:

	PR middle-end/79448
	* gcc.dg/tree-ssa/builtin-snprintf-warn-3.c: New test.
	* gcc.dg/tree-ssa/pr79448-2.c: New test.
	* gcc.dg/tree-ssa/pr79448.c: New test.

gcc/ChangeLog:

	PR middle-end/79448
	* gimple-ssa-sprintf.c (format_directive): Avoid issuing INT_MAX
	  warning for strings of unknown length.

From-SVN: r245437

	PR target/79404
	* ira-costs.c (scan_one_insn): Initialize register move costs
	for pseudos seen in USE/CLOBBER insns.

From-SVN: r245436

power, power2, rios, rios1, rios2, rsc, rsc2 support was removed.
rs64a never was a supported option; it's spelled rs64.
power5+ and powerpc64le are supported options but could not be set as
default.


	* config.gcc (supported_defaults) [powerpc*-*-*]: Update.

From-SVN: r245435

	PR tree-optimization/79095
	* tree-vrp.c (extract_range_from_binary_expr_1): For EXACT_DIV_EXPR,
	if the numerator has the range ~[0,0] make the resultant range ~[0,0].
	(extract_range_from_binary_expr): For MINUS_EXPR with no derived range,
	if the operands are known to be not equal, then the resulting range
	is ~[0,0].
	(intersect_ranges): If the new range is ~[0,0] and the old range is
	wide, then prefer ~[0,0].
	* tree-vrp.c (overflow_comparison_p_1): New function.
	(overflow_comparison_p): New function.
	* tree-vrp.c (register_edge_assert_for_2): Register additional asserts
	if NAME is used in an overflow test.
	(vrp_evaluate_conditional_warnv_with_ops): If the ops represent an
	overflow check that can be expressed as an equality test, then adjust
	ops to be that equality test.

	PR tree-optimization/79095
	* g++.dg/pr79095-1.C: New test
	* g++.dg/pr79095-2.C: New test
	* g++.dg/pr79095-3.C: New test
	* g++.dg/pr79095-4.C: New test
	* g++.dg/pr79095-5.C: New test
	* gcc.c-torture/execute/arith-1.c: Update with more cases.
	* gcc.dg/tree-ssa/pr79095-1.c: New test.

From-SVN: r245434

With the target attribute stuff the only user of the builtin types
flags value has been removed.  So drop that value from the builtin
types list entirely.

gcc/ChangeLog:

2017-02-14  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/s390-builtin-types.def: Remove flags argument.
	* config/s390/s390.c (s390_init_builtins): Likewise.

From-SVN: r245432

2017-02-14  Martin Liska  <mliska@suse.cz>

	* lto.c (do_stream_out): Free LTO file filename string.

From-SVN: r245431

2017-02-14  Martin Liska  <mliska@suse.cz>

	* tree-ssa-loop-unswitch.c (hoist_guard): Release get_loop_body
	vector.  Fix trailing white spaces.

From-SVN: r245430

gcc/

	* config/aarch64/aarch64.c (aarch64_simd_container_mode): Handle
	HFmode.

gcc/testsuite/

	* gcc.target/aarch64/vect_fp16_1.c: New.

From-SVN: r245429

	PR rtl-optimization/68664
	* config/arm/arm.c (arm_sched_can_speculate_insn):
	New function.  Declare prototype.
	(TARGET_SCHED_CAN_SPECULATE_INSN): Define.

From-SVN: r245425

	PR rtl-optimization/68664
	* config/aarch64/aarch64.c (aarch64_sched_can_speculate_insn):
	New function.
	(TARGET_SCHED_CAN_SPECULATE_INSN): Define.

From-SVN: r245424

2017-02-14  Amit Pawar  <amit.pawar@amd.com>

	* config/i386/i386.c (znver1_cost): Fix the alignment for function and
	max skip bytes for function, loop and jump.

From-SVN: r245423

2017-02-14  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	* gimple-pretty-print.c (dump_unary_rhs): Adjust dump format for
	ABS_EXPR for gimple dump.

c/
	* gimpler-parser.c (c_parser_gimple_statement): Handle ABS_EXPR.
	(c_parser_gimple_unary_expression): Likewise.

testsuite/
	* gcc.dg/gimplefe-25.c: New test.

From-SVN: r245422

	PR target/79462
	* config/sh/sh.c (expand_cbranchdi4): Don't clear operands[4].

From-SVN: r245421

	PR tree-optimization/79408
	* tree-vrp.c (simplify_div_or_mod_using_ranges): Handle also the
	case when on TRUNC_MOD_EXPR op0 is INTEGER_CST.
	(simplify_stmt_using_ranges): Call simplify_div_or_mod_using_ranges
	also if rhs1 is INTEGER_CST.

	* gcc.dg/tree-ssa/pr79408-2.c: New test.

From-SVN: r245420

2017-02-14  Richard Biener  <rguenther@suse.de>

	PR middle-end/79432
	* tree-into-ssa.c (insert_phi_nodes): When the function can
	have abnormal edges rewrite SSA names with broken use-def
	dominance out of SSA and register them for PHI insertion.

	* gcc.dg/torture/pr79432.c: New testcase.

From-SVN: r245417

gcc/ChangeLog:

	PR middle-end/79496
	* gimple-ssa-sprintf.c (pass_sprintf_length::handle_gimple_call): Avoid
	clearing info.nowrite flag when snprintf size argument is a range.

gcc/testsuite/ChangeLog:

	PR middle-end/79496
	* gcc.dg/tree-ssa/builtin-snprintf-2.c: New test.

From-SVN: r245415

From-SVN: r245414

	PR sanitizer/79341
	* c-c++-common/ubsan/float-cast-overflow-8.c (TEST): Make min and max
	variables volatile.

From-SVN: r245411

	* constexpr.c (build_data_member_initialization): Ignore
	initialization of a local variable.

From-SVN: r245410

	* cprop.c (cprop_jump): Add missing space in string literal.
	* tree-ssa-structalias.c (rewrite_constraints): Likewise.
	(get_constraint_for_component_ref): Likewise.
	* df-core.c (df_worklist_dataflow_doublequeue): Likewise.
	* tree-outof-ssa.c (insert_partition_copy_on_edge): Likewise.
	* lra-constraints.c (process_alt_operands): Likewise.
	* ipa-inline.c (inline_small_functions): Likewise.
	* tree-ssa-sccvn.c (visit_reference_op_store): Likewise.
	* cgraph.c (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
	* trans-mem.c (diagnose_tm_1_op): Likewise.
	* omp-grid.c (grid_find_single_omp_among_assignments): Likewise.
	(grid_parallel_clauses_gridifiable): Likewise.
c/
	* c-parser.c (c_parser_oacc_declare): Add missing space in
	diagnostics.
fortran/
	* trans-expr.c (gfc_conv_substring): Add missing space in diagnostics.

From-SVN: r245409

	* config/nvptx/mkoffload.c (process): Add space in between
	, and %d.

From-SVN: r245408

	* init.c (warn_placement_new_too_small): Add missing space in
	diagnostics.
	* parser.c (cp_parser_oacc_declare): Likewise.
	* mangle.c (maybe_check_abi_tags): Likewise.

From-SVN: r245407

2017-02-13  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	PR c/79478
	* gimple-parser.c (c_parser_gimple_postfix_expression): Call
	set_c_expr_source_range when parsing ssa-name.

From-SVN: r245406

	* config/i386/i386.h (REG_CLASS_NAMES): Add , in between
	"MOD4_SSE_REGS" and "ALL_REGS".

From-SVN: r245405

From-SVN: r245404