From-SVN: r201217

2013-07-24  Paolo Carlini  <paolo.carlini@oracle.com>

	* include/bits/random.h (random_device): Avoid using the FILE type.
	* include/std/random: Do not include <cstdio>.
	* src/c++11/random.cc: ... include it here.
	(random_device::_M_init, random_device::_M_fini,
	random_device::_M_getval): Cast back and forth void* and FILE*.

From-SVN: r201215

2013-07-24  Tim Shen  <timshen91@gmail.com>

	Reimplment matcher using Depth-first search(backtracking).
	PR libstdc++/53622
	PR libstdc++/57173
	* include/bits/regex.h: regex_match() and regex_search().
	* include/bits/regex_cursor.h: Fix _M_set_pos().
	* include/bits/regex_grep_matcher.h: add _M_dfs_match().
	* include/bits/regex_grep_matcher.tcc: Implement it.
	* testsuite/28_regex/algorithms/regex_match/extended/string_group_01.cc:
	New.
	* testsuite/28_regex/algorithms/regex_match/extended/string_group_02.cc:
	New.
	* testsuite/28_regex/algorithms/regex_search/basic/string_01.cc:
	Remove xfail.

From-SVN: r201213

This way they are compiled on non-GNU/Linux systems.

From-SVN: r201209

2013-07-24  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>
	    Anton Blanchard <anton@au1.ibm.com>

	* vector.md (vec_realign_load_<mode>): Reorder input operands to
	vperm for little endian.
	* rs6000.c (rs6000_expand_builtin): Use lvsr instead of lvsl to
	create the control mask for a vperm for little endian.


Co-Authored-By: Anton Blanchard <anton@au1.ibm.com>

From-SVN: r201208

From Uros Bizjak.

From-SVN: r201206

	Tweak last ChangeLog entry.

From-SVN: r201202

/cp
2013-07-24  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/57942
	* typeck.c (ptr_reasonably_similar): Use COMPARE_STRICT if one of
	the target types is incomplete; return a bool, not an int.
	* cp-tree.h (ptr_reasonably_similar): Adjust declaration.

/testsuite
2013-07-24  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/57942
	* g++.dg/inherit/pr57942.C: New.

From-SVN: r201201

From-SVN: r201200

From-SVN: r201199

2013-07-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
	    Anton Blanchard <anton@au1.ibm.com>

	* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Reverse
	two operands for little-endian.


Co-Authored-By: Anton Blanchard <anton@au1.ibm.com>

From-SVN: r201195

2013-07-23  Steve Ellcey  <sellcey@mips.com>

	* config/mips/mips.c (mips_case_values_threshold): New.
	(TARGET_CASE_VALUES_THRESHOLD): Define.

From-SVN: r201194

rs6000.c (altivec_expand_vec_perm_const): Correct selection of field for vector splat in little endian mode.

2013-07-23  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
	    Anton Blanchard <anton@au1.ibm.com>

	* config/rs6000/rs6000.c (altivec_expand_vec_perm_const): Correct
	selection of field for vector splat in little endian mode.


Co-Authored-By: Anton Blanchard <anton@au1.ibm.com>

From-SVN: r201193

From-SVN: r201188

[gcc]
2013-07-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vector.md (xor<mode>3): Move 128-bit boolean
	expanders to rs6000.md.
	(ior<mode>3): Likewise.
	(and<mode>3): Likewise.
	(one_cmpl<mode>2): Likewise.
	(nor<mode>3): Likewise.
	(andc<mode>3): Likewise.
	(eqv<mode>3): Likewise.
	(nand<mode>3): Likewise.
	(orc<mode>3): Likewise.

	* config/rs6000/rs6000-protos.h (rs6000_split_logical): New
	declaration.

	* config/rs6000/rs6000.c (rs6000_split_logical_inner): Add support
	to split multi-word logical operations.
	(rs6000_split_logical_di): Likewise.
	(rs6000_split_logical): Likewise.

	* config/rs6000/vsx.md (VSX_L2): Delete, no longer used.
	(vsx_and<mode>3_32bit): Move 128-bit logical insns to rs6000.md,
	and allow TImode operations in 32-bit.
	(vsx_and<mode>3_64bit): Likewise.
	(vsx_ior<mode>3_32bit): Likewise.
	(vsx_ior<mode>3_64bit): Likewise.
	(vsx_xor<mode>3_32bit): Likewise.
	(vsx_xor<mode>3_64bit): Likewise.
	(vsx_one_cmpl<mode>2_32bit): Likewise.
	(vsx_one_cmpl<mode>2_64bit): Likewise.
	(vsx_nor<mode>3_32bit): Likewise.
	(vsx_nor<mode>3_64bit): Likewise.
	(vsx_andc<mode>3_32bit): Likewise.
	(vsx_andc<mode>3_64bit): Likewise.
	(vsx_eqv<mode>3_32bit): Likewise.
	(vsx_eqv<mode>3_64bit): Likewise.
	(vsx_nand<mode>3_32bit): Likewise.
	(vsx_nand<mode>3_64bit): Likewise.
	(vsx_orc<mode>3_32bit): Likewise.
	(vsx_orc<mode>3_64bit): Likewise.

	* config/rs6000/rs6000.h (VLOGICAL_REGNO_P): Always allow vector
	logical types in GPRs.

	* config/rs6000/altivec.md (altivec_and<mode>3): Move 128-bit
	logical insns to rs6000.md, and allow TImode operations in
	32-bit.
	(altivec_ior<mode>3): Likewise.
	(altivec_xor<mode>3): Likewise.
	(altivec_one_cmpl<mode>2): Likewise.
	(altivec_nor<mode>3): Likewise.
	(altivec_andc<mode>3): Likewise.

	* config/rs6000/rs6000.md (BOOL_128): New mode iterators and mode
	attributes for moving the 128-bit logical operations into
	rs6000.md.
	(BOOL_REGS_OUTPUT): Likewise.
	(BOOL_REGS_OP1): Likewise.
	(BOOL_REGS_OP2): Likewise.
	(BOOL_REGS_UNARY): Likewise.
	(BOOL_REGS_AND_CR0): Likewise.
	(one_cmpl<mode>2): Add support for DI logical operations on
	32-bit, splitting the operations to 32-bit.
	(anddi3): Likewise.
	(iordi3): Likewise.
	(xordi3): Likewise.
	(and<mode>3, 128-bit types): Rewrite 2013-06-06 logical operator
	changes to combine the 32/64-bit code, allow logical operations on
	TI mode in 32-bit, and to use similar match_operator patterns like
	scalar mode uses.  Combine the Altivec and VSX code for logical
	operations, and move it here.
	(ior<mode>3, 128-bit types): Likewise.
	(xor<mode>3, 128-bit types): Likewise.
	(one_cmpl<mode>3, 128-bit types): Likewise.
	(nor<mode>3, 128-bit types): Likewise.
	(andc<mode>3, 128-bit types): Likewise.
	(eqv<mode>3, 128-bit types): Likewise.
	(nand<mode>3, 128-bit types): Likewise.
	(orc<mode>3, 128-bit types): Likewise.
	(and<mode>3_internal): Likewise.
	(bool<mode>3_internal): Likewise.
	(boolc<mode>3_internal1): Likewise.
	(boolc<mode>3_internal2): Likewise.
	(boolcc<mode>3_internal1): Likewise.
	(boolcc<mode>3_internal2): Likewise.
	(eqv<mode>3_internal1): Likewise.
	(eqv<mode>3_internal2): Likewise.
	(one_cmpl1<mode>3_internal): Likewise.

[gcc/testsuite]
2013-07-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/bool2.h: New file, test the code generation
	of logical operations for power5, altivec, power7, and power8
	systems.
	* gcc.target/powerpc/bool2-p5.c: Likewise.
	* gcc.target/powerpc/bool2-av.c: Likewise.
	* gcc.target/powerpc/bool2-p7.c: Likewise.
	* gcc.target/powerpc/bool2-p8.c: Likewise.
	* gcc.target/powerpc/bool3.h: Likewise.
	* gcc.target/powerpc/bool3-av.c: Likewise.
	* gcc.target/powerpc/bool2-p7.c: Likewise.
	* gcc.target/powerpc/bool2-p8.c: Likewise.

From-SVN: r201187

	* config/microblaze/microblaze.c (microblaze_expand_prologue):
	Rename flag_stack_usage to flag_stack_usage_info.

From-SVN: r201186

	* config/microblaze/microblaze.c: Add microblaze_asm_output_mi_thunk
	and define TARGET_ASM_OUTPUT_MI_THUNK and
	TARGET_ASM_CAN_OUTPUT_MI_THUNK.

From-SVN: r201185

Solaris will use the version in sock_unix.go.

From-SVN: r201183

From-SVN: r201181

This adjusts the extram support to work with gccgo.  There are
some corresponding changes to cgo in
https://codereview.appspot.com/11406047/ .

From-SVN: r201179

From-SVN: r201178

From-SVN: r201177

	* go-backend.c: Don't #include "rtl.h".
	(go_imported_unsafe): Don't call init_varasm_once.
	* Make-lang.in (go/go-backend.o): Don't depend on $(RTL_H).

From-SVN: r201176

[AArch64, ILP32] Add change to gcc.target/aarch64/vect_smlal_1.c that was missed from the previous commit (r201166).

From-SVN: r201175

reload.c (find_reloads): Exit loop once we find this operand cannot be reloaded somehow for this alternative.

2013-07-22  Po-Chun Chang  <pchang9@cs.wisc.edu>

	* reload.c (find_reloads): Exit loop once we find this operand
	cannot be reloaded somehow for this alternative.

	* reload.c (find_reloads): Exit loop once we find a hard register.

	* rtlanal.c (computed_jump_p): Exit loop once we find label
	reference is used.

	* i386.c (ix86_pad_returns): Exit loop after setting replace.

	* cfgloopmanip.c (remove_path): Exit loop after setting
	irred_invalidated.

	* gensupport.c (subst_dup): Avoid loop if code is not
	MATCH_DUP nor MATCH_OP_DUP.

From-SVN: r201174

2013-07-23  Nicklas Bo Jensen  <nbjensen@gmail.com>

	* doc/md.texi (Machine-Specific Peephole Optimizers): Fix a
	typo.

From-SVN: r201173

	* go-lang.c: Don't #include "except.h".
	* Make-lang.in (go/go-lang.o): Don't depend on $(EXCEPT_H).

From-SVN: r201171

gcc/

	* config/aarch64/aarch64.c (aarch64_hard_regno_mode_ok): Also return
	true for SP_REGNUM if mode == ptr_mode.
	* config/aarch64/aarch64.h (ADDITIONAL_REGISTER_NAMES): Add "wsp"
	with value R0_REGNUM + 31.

From-SVN: r201170

2013-07-23  Tim Shen  <timshen91@gmail.com>

	Implement regex_iterator and regex_token_iterator.
	* include/bits/regex.h: regex_iterator and regex_token_iterator.
	* testsuite/28_regex/iterators/regex_iterator/char/string_01.cc:
	New.
	* testsuite/28_regex/iterators/regex_iterator/wchar_t/string_01.cc:
	New.
	* testsuite/28_regex/iterators/regex_token_iterator/char/string_01.cc:
	New.
	* testsuite/28_regex/iterators/regex_token_iterator/wchar_t/string_01.cc:
	New.

From-SVN: r201169

gcc/

	* config/aarch64/aarch64.c (aarch64_pad_arg_upward): In big-endian,
	pad pointer-typed argument downward.

gcc/testsuite/

	* gcc.target/aarch64/test-ptr-arg-on-stack-1.c: New test.

From-SVN: r201168

gcc/

	* config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define _ILP32
	and __ILP32__ when the ILP32 model is in use.

From-SVN: r201167

gcc/testsuite/

	* gcc.dg/20020219-1.c: Skip the test on aarch64*-*-* in ilp32.
	* gcc.target/aarch64/aapcs64/test_18.c (struct y): Change the field
	type from long to long long.
	* gcc.target/aarch64/atomic-op-long.c: Update dg-final directives
	to have effective-target keywords of lp64 and ilp32.
	* gcc.target/aarch64/fcvt_double_int.c: Likewise.
	* gcc.target/aarch64/fcvt_double_long.c: Likewise.
	* gcc.target/aarch64/fcvt_double_uint.c: Likewise.
	* gcc.target/aarch64/fcvt_double_ulong.c: Likewise.
	* gcc.target/aarch64/fcvt_float_int.c: Likewise.
	* gcc.target/aarch64/fcvt_float_long.c: Likewise.
	* gcc.target/aarch64/fcvt_float_uint.c: Likewise.
	* gcc.target/aarch64/fcvt_float_ulong.c: Likewise.
	* gcc.target/aarch64/vect_smlal_1.c: Replace 'long' with 'long long'.

From-SVN: r201166

small PIC addressing models

gcc/

	* config/aarch64/aarch64.c (POINTER_BYTES): New define.
	(aarch64_load_symref_appropriately): In the case of
	SYMBOL_SMALL_ABSOLUTE, use the mode of 'dest' instead of Pmode
	to generate new rtx; likewise to the case of SYMBOL_SMALL_GOT.
	(aarch64_expand_mov_immediate): In the case of SYMBOL_FORCE_TO_MEM,
	change to pass 'ptr_mode' to force_const_mem and zero-extend 'mem'
	if 'mode' doesn't equal to 'ptr_mode'.
	(aarch64_output_mi_thunk): Add an assertion on the alignment of
	'vcall_offset'; change to call aarch64_emit_move differently depending
	on whether 'Pmode' equals to 'ptr_mode' or not; use 'POINTER_BYTES'
	to calculate the upper bound of 'vcall_offset'.
	(aarch64_cannot_force_const_mem): Change to also return true if
	mode != ptr_mode.
	(aarch64_legitimize_reload_address): In the case of large
	displacements, add new local variable 'xmode' and an assertion
	based on it; change to use 'xmode' to generate the new rtx and
	reload.
	(aarch64_asm_trampoline_template): Change to generate the template
	differently depending on TARGET_ILP32 or not; change to use
	'POINTER_BYTES' in the argument passed to assemble_aligned_integer.
	(aarch64_trampoline_size): Removed.
	(aarch64_trampoline_init): Add new local constant 'tramp_code_sz'
	and replace immediate literals with it.  Change to use 'ptr_mode'
	instead of 'DImode' and call convert_memory_address if the mode
	of 'fnaddr' doesn't equal to 'ptr_mode'.
	(aarch64_elf_asm_constructor): Change to use assemble_aligned_integer
	to output symbol.
	(aarch64_elf_asm_destructor): Likewise.
	* config/aarch64/aarch64.h (TRAMPOLINE_SIZE): Change to be dependent
	on TARGET_ILP32 instead of aarch64_trampoline_size.
	* config/aarch64/aarch64.md (movsi_aarch64): Add new alternatives
	of 'mov' between WSP and W registers as well as 'adr' and 'adrp'.
	(loadwb_pair<GPI:mode>_<PTR:mode>): Rename to ...
	(loadwb_pair<GPI:mode>_<P:mode>): ... this.  Replace PTR with P.
	(storewb_pair<GPI:mode>_<PTR:mode>): Likewise; rename to ...
	(storewb_pair<GPI:mode>_<P:mode>): ... this.
	(add_losym): Change to 'define_expand' and call gen_add_losym_<mode>
	depending on the value of 'mode'.
	(add_losym_<mode>): New.
	(ldr_got_small_<mode>): New, based on ldr_got_small.
	(ldr_got_small): Remove.
	(ldr_got_small_sidi): New.
	* config/aarch64/iterators.md (P): New.
	(PTR): Change to 'ptr_mode' in the condition.

From-SVN: r201165

gcc/
	* config.gcc (aarch64*-*-*): Support --with-abi.
	(aarch64*-*-elf): Support --with-multilib-list.
	(aarch64*-*-linux*): Likewise.
	(supported_defaults): Add abi to aarch64*-*-*.
	* configure.ac: Mention AArch64 for --with-multilib-list.
	* configure: Re-generated.
	* config/aarch64/biarchilp32.h: New file.
	* config/aarch64/biarchlp64.h: New file.
	* config/aarch64/aarch64-elf.h (ENDIAN_SPEC): New define.
	(ABI_SPEC): Ditto.
	(MULTILIB_DEFAULTS): Ditto.
	(DRIVER_SELF_SPECS): Ditto.
	(ASM_SPEC): Update to also substitute -mabi.
	* config/aarch64/aarch64-elf-raw.h (LINK_SPEC): Add linker script
	file whose name depends on -mabi= and -mbig-endian.
	* config/aarch64/aarch64.h (LONG_TYPE_SIZE): Change to depend on
	TARGET_ILP32.
	(POINTER_SIZE): New define.
	(POINTERS_EXTEND_UNSIGNED): Ditto.
	(enum aarch64_abi_type): New enumeration tag.
	(AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
	(AARCH64_ABI_DEFAULT): Define to AARCH64_ABI_LP64 if undefined.
	(TARGET_ILP32): New define.
	* config/aarch64/aarch64.opt (mabi): New.
	(aarch64_abi): New.
	(ilp32, lp64): New values for -mabi.
	* config/aarch64/t-aarch64 (comma): New define.
	(MULTILIB_OPTIONS): Ditto.
	(MULTILIB_DIRNAMES): Ditto.
	* config/aarch64/t-aarch64-linux (MULTIARCH_DIRNAME): New define.
	* doc/invoke.texi: Document -mabi for AArch64.

From-SVN: r201164

	* config/avr/avr.md: Explain asm print modifier 'r' for REG.

From-SVN: r201163

2013-07-23   Ondřej Bílka  <neleai@seznam.cz>

        * decl.c: Fix comment typos.
        * interface.c: Likewise.
        * trans-array.c: Likewise.
        * trans.c: Likewise.

From-SVN: r201162

	* config/fpu-387.h (get_fpu_rounding_mode): Read rounding mode
	from SSE mxcsr register on x86_64.

From-SVN: r201161

2013-07-23  Paolo Carlini  <paolo.carlini@oracle.com>

	* include/std/random: Add back <cstdio> include.
	* src/c++11/random.cc: Don't include <cstdio> here.

From-SVN: r201160

	* elf.c (elf_syminfo): Loop over the elf_syminfo_data chain.

From-SVN: r201159

	* elf.c (backtrace_initialize): Pass elf_fileline_fn to
	dl_iterate_phdr callbacks.

From-SVN: r201158