1. 27 Jan, 2018 9 commits
  2. 26 Jan, 2018 31 commits
    • compiler: show readable names in escape analysis messages · cc24ff0d
          
          Call message_name when printing a variable for an escape analysis
          message.  This implies changing the AST dumps, which is fine.
          
          Reviewed-on: https://go-review.googlesource.com/90296
      
      From-SVN: r257113
      Ian Lance Taylor committed
    • Regenerate .pot files. · 6db72443
      gcc/po:
      	* gcc.pot: Regenerate.
      
      libcpp/po:
      	* cpplib.pot: Regenerate.
      
      From-SVN: r257111
      Joseph Myers committed
    • RISC-V: Add --specs=nosys.specs support. · ee61fae2
      	gcc/
      	* config/riscv/elf.h (LIB_SPEC): Don't include -lgloss when nosys.specs
      	specified.
      
      From-SVN: r257109
      Jim Wilson committed
    • rs6000: Fix safe-indirect-jump-[18].c · b5d0b3d2
      This patch merges the safe-indirect-jump-1.c and -8.c testcases,
      since they do the same thing.  On the 64-bit and AIX ABIs the indirect
      call is not a sibcall, since there is code generated after the call
      (the restore of r2).  On the 32-bit non-AIX ABIs it is a sibcall.
      
      
      	* gcc.target/powerpc/safe-indirect-jump-1.c: Build on all targets.
      	Make expected output depend on whether we expect sibcalls or not.
      	* gcc.target/powerpc/safe-indirect-jump-8.c: Delete (merged into
      	safe-indirect-jump-1.c).
      
      From-SVN: r257108
      Segher Boessenkool committed
    • PR c++/83956 - wrong dtor error with anonymous union · 5bb1c2be
      	* method.c (walk_field_subobs): Variant members only affect
      	deletedness.
      	(maybe_explain_implicit_delete): Pass &deleted_p for diagnostic.
      
      From-SVN: r257107
      Jason Merrill committed
    • Partial Failed Images patch · f8862a1b
      Co-Authored-By: Alessandro Fanfarillo <fanfarillo.gcc@gmail.com>
      Co-Authored-By: Soren Rasmussen <s.c.rasmussen@gmail.com>
      
      From-SVN: r257105
      Damian Rouson committed
    • re PR fortran/83998 (ICE in gfc_conv_intrinsic_dot_product, at fortran/trans-intrinsic.c:4403) · deece1aa
      2018-01-26  Steven G. Kargl  <kargl@gcc.gnu.org>
      
      	PR fortran/83998
      	* simplify.c (compute_dot_product):  Initialize result to INTEGER(1) 0
      	or .false.  The summation does the correct type conversion.
      	(gfc_simplify_dot_product): Special case zero-sized arrays.
      
      
      2018-01-26  Steven G. Kargl  <kargl@gcc.gnu.org>
      
      	PR fortran/83998
      	* gfortran.dg/dot_product_4.f90
      
      From-SVN: r257104
      Steven G. Kargl committed
    • [AArch64] Fix gcc.target/aarch64/subs_compare_[12].c · de47f61f
      This patch fixes the testsuite failures gcc.target/aarch64/subs_compare_1.c and subs_compare_2.c
      The tests check that we combine a sequence like:
              sub     w2, w0, w1
              cmp     w0, w1
      
      into
              subs    w2, w0, w1
      
      This is done by a couple of peepholes in aarch64.md.
      
      Unfortunately due to scheduling and other optimisations the SUB and CMP
      can come in a different order:
              cmp     w0, w1
              sub     w0, w0, w1
      
      And the existing peepholes cannot catch that and we fail to combine the two.
      This patch adds a peephole that matches the CMP as the first insn and the SUB as the second
      and outputs a SUBS.  This is almost equivalent to the existing peephole that matches SUB first and CMP second
      except that it doesn't have the restriction that the output register of the SUB has to not be one of the input registers.
      Remember "sub w0, w0, w1 ; cmp w0, w1" is *not* equivalent to: "subs  w0, w0, w1"
      but "cmp w0, w1 ; sub w0, w0, w1" is.
      
      So this is what this patch does. It adds a peephole for the case above and one for the SUB-immediate variant
      (because the SUB-immediate is represented as PLUS-of-negated-immediate and thus has different RTL structure).
      
      Bootstrapped and tested on aarch64-none-linux-gnu.
      
          * config/aarch64/aarch64.md: Add peepholes for CMP + SUB -> SUBS
          and CMP + SUB-immediate -> SUBS.
      
      From-SVN: r257102
      Kyrylo Tkachov committed
    • PR c++/84036 - ICE with variadic capture. · 41d733d9
      	PR c++/82249
      	* pt.c (tsubst_pack_expansion): When optimizing a simple
      	substitution, pull a single pack expansion out of its pack.
      
      From-SVN: r257101
      Jason Merrill committed
    • PR tree-optimization/83896 - ice in get_string_len on a call to strlen with · a011292a
      PR tree-optimization/83896 - ice in get_string_len on a call to strlen with
      non-constant length
      
      gcc/ChangeLog:
      
              PR tree-optimization/83896
              * tree-ssa-strlen.c (get_string_len): Rename...
              (get_string_cst_length): ...to this.  Return HOST_WIDE_INT.
              Avoid assuming length is constant.
              (handle_char_store): Use HOST_WIDE_INT for string length.
      
      gcc/testsuite/ChangeLog:
      
              PR tree-optimization/83896
              * gcc.dg/strlenopt-43.c: New test.
      
      From-SVN: r257100
      Martin Sebor committed
    • * ChangeLog: Fix whitespace. · f91edfc4
      From-SVN: r257098
      Uros Bizjak committed
    • fold-vec-abs-int.c: Remove scan-assembler stanzas. · b211c595
      [testsuite]
      
      2018-01-26  Will Schmidt  <will_schmidt@vnet.ibm.com>
      
      	* gcc.target/powerpc/fold-vec-abs-int.c: Remove scan-assembler stanzas.
      	* gcc.target/powerpc/fold-vec-abs-int-fwrap.c: Same.
      	* gcc.target/powerpc/fold-vec-abs-int.p7.c: New.
      	* gcc.target/powerpc/fold-vec-abs-int.p8.c: New.
      	* gcc.target/powerpc/fold-vec-abs-int.p9.c: New.
      	* gcc.target/powerpc/fold-vec-abs-int-fwrapv.p7.c: New.
      	* gcc.target/powerpc/fold-vec-abs-int-fwrapv.p8.c: New.
      	* gcc.target/powerpc/fold-vec-abs-int-fwrapv.p9.c: New.
      	* gcc.target/powerpc/fold-vec-abs-longlong.c: Remove scan-assembler stanzas.
      	* gcc.target/powerpc/fold-vec-abs-longlong-fwrap.c: Same.
      	* gcc.target/powerpc/fold-vec-abs-longlong.p7.c: New.
      	* gcc.target/powerpc/fold-vec-abs-longlong.p8.c: New.
      	* gcc.target/powerpc/fold-vec-abs-longlong.p9.c: New.
      	* gcc.target/powerpc/fold-vec-abs-longlong-fwrapv.p7.c: New.
      	* gcc.target/powerpc/fold-vec-abs-longlong-fwrapv.p8.c: New.
      	* gcc.target/powerpc/fold-vec-abs-longlong-fwrapv.p9.c: New.
      	* gcc.target/powerpc/fold-vec-abs-short.c: Add xxspltib to valid instruction list.
      	* gcc.target/powerpc/fold-vec-abs-short-fwrapv.c: Same.
      
      From-SVN: r257097
      Will Schmidt committed
    • re PR target/81763 (Issues with BMI on 32bit x86 apps on GCC 7.1+) · 66d617d0
      	PR target/81763
      	* config/i386/i386.md (*andndi3_doubleword): Add earlyclobber
      	to (=&r,r,rm) alternative. Add (=r,0,rm) and (=r,r,0) alternatives.
      
      From-SVN: r257096
      Uros Bizjak committed
    • fold-vec-cmp-int.c: Delete. · f5ef2a14
      [testsuite]
      
      2018-01-24  Will Schmidt  <will_schmidt@vnet.ibm.com>
      
              * gcc.target/powerpc/fold-vec-cmp-int.c: Delete.
              * gcc.target/powerpc/fold-vec-cmp-int.h: New.
              * gcc.target/powerpc/fold-vec-cmp-int.p7.c: New.
              * gcc.target/powerpc/fold-vec-cmp-int.p8.c: New.
              * gcc.target/powerpc/fold-vec-cmp-int.p9.c: New.
              * gcc.target/powerpc/fold-vec-cmp-short.c: Delete.
              * gcc.target/powerpc/fold-vec-cmp-short.h: New.
              * gcc.target/powerpc/fold-vec-cmp-short.p8.c: New.
              * gcc.target/powerpc/fold-vec-cmp-short.p9.c: New.
              * gcc.target/powerpc/fold-vec-cmp-char.c: Delete.
              * gcc.target/powerpc/fold-vec-cmp-char.h: New.
              * gcc.target/powerpc/fold-vec-cmp-char.p8.c: New.
              * gcc.target/powerpc/fold-vec-cmp-char.p9.c: New.
      
      From-SVN: r257095
      Will Schmidt committed
    • Fix ifunc detection. · 98abdf3a
      2018-01-26  Martin Liska  <mliska@suse.cz>
      
      	* lib/target-supports.exp: Return a value, otherwise -Wreturn-type
      	warning is seen.
      
      From-SVN: r257094
      Martin Liska committed
    • PR c++/82514 - ICE with local class in generic lambda. · 373d1f5f
      	* pt.c (regenerated_lambda_fn_p): Remove.
      	(enclosing_instantiation_of): Don't use it.
      	(tsubst_function_decl): Call enclosing_instantiation_of.
      
      	* pt.c (lookup_template_class_1): Add sanity check.
      	* name-lookup.c (do_pushtag): Don't add closures to local_classes.
      
      From-SVN: r257093
      Jason Merrill committed
    • powerpcfold-vec-neg-longlong.h: New. · a9ea161d
      [testsuite]
      
      2018-01-23  Will Schmidt  <will_schmidt@vnet.ibm.com>
      
      	* gcc.target/powerpcfold-vec-neg-longlong.h:  New.
      	* gcc.target/powerpc/fold-vec-neg-longlong.p8.c:  New.
      	* gcc.target/powerpc/fold-vec-neg-longlong.p9.c:  New.
      	* gcc.target/powerpc/fold-vec-neg-longlong.c:  Delete.
      
      	* gcc.target/powerpc/fold-vec-neg-int.c: Remove scan-assembler stanzas.
      	* gcc.target/powerpc/fold-vec-neg-int.p7.c: New.
      	* gcc.target/powerpc/fold-vec-neg-int.p8.c: New.
      	* gcc.target/powerpc/fold-vec-neg-int.p9.c: New.
      
      From-SVN: r257092
      Will Schmidt committed
    • re PR rtl-optimization/84003 (FAIL: g++.dg/torture/pr77745.C with noinline foo) · d7e1f499
      2018-01-26  Richard Biener  <rguenther@suse.de>
      
      	PR rtl-optimization/84003
      	* dse.c (record_store): Only record redundant stores when
      	the earlier store aliases at least all accesses the later one does.
      
      	* g++.dg/torture/pr77745.C: Mark foo noinline to trigger
      	latent bug in DSE if NOINLINE is appropriately defined.
      	* g++.dg/torture/pr77745-2.C: New testcase including pr77745.C
      	and defining NOINLINE.
      
      From-SVN: r257091
      Richard Biener committed
    • [arm] XFAIL advsimd-intrinsics/vld1x2.c · da1f8d7f
      This recently added test fails on arm. We haven't implemented these intrinsics for arm
      (any volunteers?) so for now let's XFAIL these on that target.
      Also, the float64 versions of these intrinsics are not supposed to be available on arm
      so this patch slightly adjusts the test to not include them for aarch32.
      In any case the entire test is XFAILed on arm, so this doesn't have any noticeable
      effect.
      
      The same number of tests (PASS) still occur on aarch64 but now they appear as XFAIL
      rather than FAIL on arm.
      
          * gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: Make float64
          tests specific to aarch64.  XFAIL test on arm.
      
      From-SVN: r257090
      Kyrylo Tkachov committed
    • re PR rtl-optimization/83985 (Compile time hog for 32-bit BE powerpc targets) · 45399fdc
      	PR rtl-optimization/83985
      	* dce.c (deletable_insn_p): Return false for separate shrink wrapping
      	REG_CFA_RESTORE insns.
      	(delete_unmarked_insns): Don't ignore separate shrink wrapping
      	REG_CFA_RESTORE insns here.
      
      	* gcc.dg/pr83985.c: New test.
      
      From-SVN: r257087
      Jakub Jelinek committed
    • re PR c/83989 (-Wrestrict false positive with malloc-style functions) · 79fbdeb8
      	PR c/83989
      	* gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Don't
      	use SSA_NAME_VAR as base for SSA_NAMEs with non-NULL SSA_NAME_VAR.
      
      	* c-c++-common/Wrestrict-3.c: New test.
      
      From-SVN: r257086
      Jakub Jelinek committed
    • [ARC] Add ARCv2 core3 tune option. · 62f26645
      ARCv2 Core3 cpus are comming with dbnz support. Add this feature on
      the tune option.
      
      gcc/
      2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
      
              * config/arc/arc-arch.h (arc_tune_attr): Add ARC_TUNE_CORE_3.
              * config/arc/arc.c (arc_sched_issue_rate): Use ARC_TUNE_... .
              (arc_init): Likewise.
              (arc_override_options): Likewise.
              (arc_file_start): Choose Tag_ARC_CPU_variation based on arc_tune
              value.
              (hwloop_fail): Use TARGET_DBNZ when we want to check for dbnz insn
              support.
              * config/arc/arc.h (TARGET_DBNZ): Define.
              * config/arc/arc.md (attr tune): Add core_3, use ARC_TUNE_... to
              properly set the tune attribute.
              (dbnz): Use TARGET_DBNZ guard.
              * config/arc/arc.opt (mtune): Add core3 option.
      
      From-SVN: r257085
      Claudiu Zissulescu committed
    • [ARC] Rework delegitimate_address hook · 20565692
      Delegitimize address is used to undo the obfuscating effect of PIC
      addresses, returning the address in a way which is understood by the
      compiler.  The old version of the hook was outdated, not beeing able
      to recognize the current addresses generated by the ARC backend.
      
      gcc/
      2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
      
      	* config/arc/arc.c (arc_delegitimize_address_0): Refactored to
      	recognize new pic like addresses.
      	(arc_delegitimize_address): Clean up.
      
      testsuite/
      2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
      
      	* testsuite/gcc.target/arc/tdelegitimize_addr.c: New test.
      
      From-SVN: r257084
      Claudiu Zissulescu committed
    • [ARC] Add support for reduced register file set · 048c6a9a
      gcc/
      2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
      
              * config/arc/arc-arches.def: Option mrf16 valid for all
              architectures.
              * config/arc/arc-c.def (__ARC_RF16__): New predefined macro.
              * config/arc/arc-cpus.def (em_mini): New cpu with rf16 on.
              * config/arc/arc-options.def (FL_RF16): Add mrf16 option.
              * config/arc/arc-tables.opt: Regenerate.
              * config/arc/arc.c (arc_conditional_register_usage): Handle
              reduced register file case.
              (arc_file_start): Set must have build attributes.
              * config/arc/arc.h (MAX_ARC_PARM_REGS): Conditional define using
              mrf16 option value.
              * config/arc/arc.opt (mrf16): Add new option.
              * config/arc/elf.h (ATTRIBUTE_PCS): Define.
              * config/arc/genmultilib.awk: Handle new mrf16 option.
              * config/arc/linux.h (ATTRIBUTE_PCS): Define.
              * config/arc/t-multilib: Regenerate.
              * doc/invoke.texi (ARC Options): Document mrf16 option.
      
      libgcc/
      2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
      
              * config/arc/lib1funcs.S (__udivmodsi4): Use safe version for RF16
              option.
              (__divsi3): Use RF16 safe registers.
              (__modsi3): Likewise.
      
      From-SVN: r257083
      Claudiu Zissulescu committed
    • [ARC] Add SJLI support. · 7778a1ad
      gcc/
      2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
      
              * config/arc/arc-protos.h: Add arc_is_secure_call_p proto.
              * config/arc/arc.c (arc_handle_secure_attribute): New function.
              (arc_attribute_table): Add 'secure_call' attribute.
              (arc_print_operand): Print secure call operand.
              (arc_function_ok_for_sibcall): Don't optimize tail calls when
              secure.
              (arc_is_secure_call_p): New function.
              * config/arc/arc.md (call_i): Add support for sjli instruction.
              (call_value_i): Likewise.
              * config/arc/constraints.md (Csc): New constraint.
      
      From-SVN: r257082
      Claudiu Zissulescu committed
    • [ARC] Add JLI support. · 6b55f8c9
      The ARCv2 ISA provides the JLI instruction, which is two-byte instructions
      that can be used to reduce code size in an application. To make use of it,
      we provide two new function attributes 'jli_always' and 'jli_fixed' which
      will force the compiler to call the indicated function using a jli_s
      instruction. The compiler also generates the entries in the JLI table for
      the case when we use 'jli_always' attribute. In the case of 'jli_fixed'
      the compiler assumes a fixed position of the function into JLI
      table. Thus, the user needs to provide an assembly file with the JLI table
      for the final link. This is usefully when we want to have a table in ROM
      and a second table in the RAM memory.
      
      The jli instruction usage can be also forced without the need to annotate
      the source code via '-mjli-always' command.
      
      gcc/
      2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
                  John Eric Martin <John.Martin@emmicro-us.com>
      
              * config/arc/arc-protos.h: Add arc_is_jli_call_p proto.
              * config/arc/arc.c (_arc_jli_section): New struct.
              (arc_jli_section): New type.
              (rc_jli_sections): New static variable.
              (arc_handle_jli_attribute): New function.
              (arc_attribute_table): Add jli_always and jli_fixed attribute.
              (arc_file_end): New function.
              (TARGET_ASM_FILE_END): Define.
              (arc_print_operand): Reuse 'S' letter for JLI output instruction.
              (arc_add_jli_section): New function.
              (jli_call_scan): Likewise.
              (arc_reorg): Call jli_call_scan.
              (arc_output_addsi): Remove 'S' from printing asm operand.
              (arc_is_jli_call_p): New function.
              * config/arc/arc.md (movqi_insn): Remove 'S' from printing asm
              operand.
              (movhi_insn): Likewise.
              (movsi_insn): Likewise.
              (movsi_set_cc_insn): Likewise.
              (loadqi_update): Likewise.
              (load_zeroextendqisi_update): Likewise.
              (load_signextendqisi_update): Likewise.
              (loadhi_update): Likewise.
              (load_zeroextendhisi_update): Likewise.
              (load_signextendhisi_update): Likewise.
              (loadsi_update): Likewise.
              (loadsf_update): Likewise.
              (movsicc_insn): Likewise.
              (bset_insn): Likewise.
              (bxor_insn): Likewise.
              (bclr_insn): Likewise.
              (bmsk_insn): Likewise.
              (bicsi3_insn): Likewise.
              (cmpsi_cc_c_insn): Likewise.
              (movsi_ne): Likewise.
              (movsi_cond_exec): Likewise.
              (clrsbsi2): Likewise.
              (norm_f): Likewise.
              (normw): Likewise.
              (swap): Likewise.
              (divaw): Likewise.
              (flag): Likewise.
              (sr): Likewise.
              (kflag): Likewise.
              (ffs): Likewise.
              (ffs_f): Likewise.
              (fls): Likewise.
              (call_i): Remove 'S' asm letter, add jli instruction.
              (call_value_i): Likewise.
              * config/arc/arc.op (mjli-always): New option.
              * config/arc/constraints.md (Cji): New constraint.
              * config/arc/fpx.md (addsf3_fpx): Remove 'S' from printing asm
              operand.
              (subsf3_fpx): Likewise.
              (mulsf3_fpx): Likewise.
              * config/arc/simdext.md (vendrec_insn): Remove 'S' from printing
              asm operand.
              * doc/extend.texi (ARC): Document 'jli-always' and 'jli-fixed'
              function attrbutes.
              * doc/invoke.texi (ARC): Document mjli-always option.
      
      gcc/testsuite
      2018-01-26  Claudiu Zissulescu  <claziss@synopsys.com>
      
              * gcc.target/arc/jli-1.c: New file.
              * gcc.target/arc/jli-2.c: Likewise.
      
      Co-Authored-By: John Eric Martin <John.Martin@emmicro-us.com>
      
      From-SVN: r257081
      Claudiu Zissulescu committed
    • Corrected date in changelog · c921c45f
      From-SVN: r257080
      Sebastian Perta committed
    • rl78.c: if operand 2 is const avoid addition with 0 and use incw and decw where possible · b0679a78
      2018-01-25  Sebastian Perta  <sebastian.perta@renesas.com>
      
      	* config/rl78/rl78.c: if operand 2 is const avoid addition with 0
      	and use incw and decw where possible
      	* testsuite/gcc.target/rl78/test_addsi3_internal.c: new file
      
      From-SVN: r257079
      Sebastian Perta committed
    • Fix gcc.target/aarch64/sve/peel_ind_1.c for -mcmodel=tiny · 05471739
      gcc/testsuite/ChangeLog:
      
      2018-01-26  Szabolcs Nagy  <szabolcs.nagy@arm.com>
      
      	* gcc.target/aarch64/sve/peel_ind_1.c: Match (adrp|adr) in scan-assembler.
      	* gcc.target/aarch64/sve/peel_ind_2.c: Likewise.
      	* gcc.target/aarch64/sve/peel_ind_3.c: Likewise.
      
      From-SVN: r257078
      Szabolcs Nagy committed
    • re PR tree-optimization/81082 (Failure to vectorise after reassociating index computation) · 5b55e6e3
      2018-01-26  Richard Biener  <rguenther@suse.de>
      
      	PR tree-optimization/81082
      	* fold-const.c (fold_plusminus_mult_expr): Do not perform the
      	association if it requires casting to unsigned.
      	* match.pd ((A * C) +- (B * C) -> (A+-B)): New patterns derived
      	from fold_plusminus_mult_expr to catch important cases late when
      	range info is available.
      
      	* gcc.dg/vect/pr81082.c: New testcase.
      	* gcc.dg/tree-ssa/loop-15.c: XFAIL the (int)((unsigned)n + -1U) * n + n
      	simplification to n * n.
      
      From-SVN: r257077
      Richard Biener committed
    • Configure USE_HIDDEN_LINKONCE on Solaris/x86 · af2e3244
      	gcc/testsuite:
      	* gcc.target/i386/mcount_pic.c: Only xfail get_pc_thunk scan on
      	Solaris 10.
      	* gcc.target/i386/pr63620.c: Likewise.
      
      	gcc:
      	* config/i386/sol2.h (USE_HIDDEN_LINKONCE): Remove.
      	* configure.ac (hidden_linkonce): New test.
      	* configure: Regenerate.
      	* config.in: Regenerate.
      
      From-SVN: r257076
      Rainer Orth committed