2019-10-01  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	* tree-if-conv.c (tree_if_conversion): Move call to ifcvt_local_dce
	after local CSE.

From-SVN: r276417

	* doc/invoke.texi (early-inlining-insns-O2): Document.
	(early-inlining-insns): Update.
	* params.def (early-inlining-insns-O2): New bound.
	(early-inlining-insns): Update docs.
	* ipa-inline.c (want_early_inline_function_p): Use new bound.

	* g++.dg/tree-ssa/pr61034.C: Set early-inlining-insns-O2=14.
	* g++.dg/tree-ssa/pr8781.C: Likewise.
	* g++.dg/warn/Wstringop-truncation-1.C: Likewise.
	* gcc.dg/ipa/pr63416.c: likewise.
	* gcc.dg/vect/pr66142.c: Likewise.
	* gcc.dg/tree-ssa/ssa-thread-12.c: Mark compure_idf inline.

From-SVN: r276416

	PR c++/91925
	* c-warn.c (check_alignment_of_packed_member): Ignore FIELD_DECLs
	with NULL DECL_FIELD_OFFSET.

	* g++.dg/conversion/packed2.C: New test.

From-SVN: r276415

gcc/
2019-10-01  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/88562
	* config/sh/sh.c (sh_extending_set_of_reg::use_as_extended_reg): Use
	sh_check_add_incdec_notes to preserve REG_INC notes when replacing
	a memory access insn.

From-SVN: r276411

[gcc]

2019-10-01  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Don't swap
	vpmsumd.

[gcc/testsuite]

2019-10-01  Bill Schmidt  <wschmdit@linux.ibm.com>

	* gcc.target/powerpc/pr91275.c: New.

From-SVN: r276410

s390.md uses a lot of near-identical expanders that perform dispatching
to other expanders based on operand types. Since the following patch
would require even more of these, avoid copy-pasting the code by
generating these expanders using an iterator.

gcc/ChangeLog:

2019-10-01  Ilya Leoshkevich  <iii@linux.ibm.com>

	PR target/77918
	* config/s390/s390.c (s390_expand_vec_compare): Use
	gen_vec_cmpordered and gen_vec_cmpunordered.
	* config/s390/vector.md (vec_cmpuneq, vec_cmpltgt, vec_ordered,
	vec_unordered): Delete.
	(vec_ordered<mode>): Rename to vec_cmpordered<mode>.
	(vec_unordered<mode>): Rename to vec_cmpunordered<mode>.
	(VEC_CMP_EXPAND): New iterator for the generic dispatcher.
	(vec_cmp<code>): Generic dispatcher.

From-SVN: r276409

Currently gcc does not emit wf{c,k}* instructions when comparing long
double values.  Middle-end actually adds them in the first place, but
then veclower pass replaces them with floating point register pair
operations, because the corresponding expander is missing.

gcc/ChangeLog:

2019-10-01  Ilya Leoshkevich  <iii@linux.ibm.com>

	PR target/77918
	* config/s390/vector.md (V_HW): Add V1TI in order to make
	vcond$a$b generate vcondv1tiv1tf.

From-SVN: r276408

The code was passing a pseudo rather than its allocated hard reg
to ira_need_caller_save_p.  Running under valgrind to reproduce
the failure also showed that ALLOCNO_CROSSED_CALLS_ABIS wasn't
being explicitly initialised.

2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR rtl-optimization/91948
	* ira-build.c (ira_create_allocno): Initialize
	ALLOCNO_CROSSED_CALLS_ABIS.
	* ira-color.c (allocno_reload_assign): Pass hard_regno rather
	than regno to ira_need_caller_save_p.

From-SVN: r276407

flag_omit_frame_pointer is set in machine-independent code depending
on the optimization level.  It is then overridden in x86
target-specific code depending on a macro defined by
--enable-frame-pointer.

Uses of attribute optimize go through machine-independent overriding
of flag_omit_frame_pointer, but the x86-specific overriding code did
NOT cover this flag, so, even if the attribute does not change the
optimization level, flag_omit_frame_pointer may end up with a
different value, and prevent inlining because of incompatible flags,
as detected by the gcc.dg/ipa/iinline-attr.c test on an
--enable-frame-pointer x86 toolchain.


for  gcc/ChangeLog

	* config/i386/i386-options.c
	(ix86_recompute_optlev_based_flags): New, moved out of...
	(ix86_option_override_internal): ... this.  Call it.
	(ix86_override_options_after_change): Call it here too.

From-SVN: r276405

Optimizing gcc.dg/torture/pr41094.c, the compiler computes the
constant value and short-circuits the whole thing.  At -O0, however,
on 32-bit x86, the call to pow() remains, and the program compares the
returned value in a stack register, with excess precision, with the
exact return value expected from pow().  If libm's pow() returns a
slightly off result, the compare fails.  If the value in the register
is stored in a separate variable, so it gets rounded to double
precision, and then compared, the compare passes.

It's not clear that the test was meant to detect libm's reliance on
rounding off the excess precision, but I guess it wasn't, so I propose
this slight change that enables it to pass regardless of the slight
inaccuracy of the C library in use.


for  gcc/testsuite/ChangeLog

	* gcc.dg/torture/pr41094.c: Introduce intermediate variable.

From-SVN: r276404

A variable redeclaration or definition that provides additional type
information for it, e.g. outermost array bounds, is not reflected in
the debug information for the variable.  With this patch, the debug
info of the variable specialization gets a type attribute with the
adjusted type.

This patch affects mostly only array bounds.  However, when the
symbolic type used in a declaration and in a definition are different,
although they refer to the same type, debug information will end up
(correctly?) naming different symbolic types in the specification and
the definition.  Also, when a readonly declaration of an array loses
the readonly flag at the definition because of the initializer, the
definition may end up referencing a type while the specification
refers to a const-qualified version of that type.  If the type of the
variable is already const-qualified, e.g. an array of a const type,
the difference is meaningless.


for  gcc/ChangeLog

	PR debug/91507
	* dwarf2out.c (override_type_for_decl_p): New.
	(gen_variable_die): Use it.

for  gcc/testsuite/ChangeLog

	PR debug/91507
	* gcc.dg/debug/dwarf2/array-0.c: New.
	* gcc.dg/debug/dwarf2/array-1.c: New.
	* gcc.dg/debug/dwarf2/array-2.c: New.
	* gcc.dg/debug/dwarf2/array-3.c: New.
	* g++.dg/debug/dwarf2/array-0.C: New.
	* g++.dg/debug/dwarf2/array-1.C: New.
	* g++.dg/debug/dwarf2/array-2.C: New.  Based on libstdc++-v3's
	src/c++98/pool_allocator.cc:__pool_alloc_base::_S_heap_size.
	* g++.dg/debug/dwarf2/array-3.C: New.  Based on
	gcc's config/i386/i386-features.c:xlogue_layout::s_instances.
	* g++.dg/debug/dwarf2/array-4.C: New.

From-SVN: r276403

2019-10-01  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.c (vectorizable_reduction): Move variables
	to where they are used.

From-SVN: r276402

The regrename pass temporarily changes some operand RTL to CC0 so that
note_stores and scan_rtx don't see those operands.  CC0 is deprecated
and we want to remove it, so we need to use something else here.
PC fits the bill fine.


	* regrename.c (hide_operands): Use pc_rtx instead of cc0_rtx.
	(build_def_use): Use PC instead of CC0 in a comment.

From-SVN: r276401

2019-10-01  Frederik Harwath <frederik@codesourcery.com>

	 * MAINTAINERS: Add myself to Write After Approval

From-SVN: r276396

diag-aka-1.c tests that:

  struct T { int i; } T;
  void *a;
  T *t = a;

produces:

  request for implicit conversion from 'void *' to 'T *' {aka 'struct T *'} ...

But printing an aka for the tag seems a bit redundant when the tag name
is the same as the typedef name.  It's probably not going to be telling
the user anything they don't already know, and can be distracting if "T"
rather than "struct T" is the preferred choice for an exported interface.
This is even more true if the tag is anonymous; e.g.:

  struct { int i; } T;
  void *a;
  T *t = a;

gives:

  request for implicit conversion from 'void *' to 'T *' {aka 'struct <anonymous> *'}

Rather than just drop the test above, the patch instead tests for:

  struct T { int i; } *T;

where seeing the tag definitely helps.

2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>

gcc/c/
	* c-objc-common.c (useful_aka_type_p): New function.
	(print_type): Use it to decide whether an aka type is worth printing.

gcc/testsuite/
	* gcc.dg/diag-aka-1.c (T): Turn into a pointer typedef.
	(foo): Update accordingly.
	* gcc.dg/diag-aka-4.c: New test.

From-SVN: r276395

Given the following invalid arm_neon.h-based code:

  float x;
  int8x8_t y = x;

the error message we emit is pretty good:

  incompatible types when initializing type 'int8x8_t' using type 'float'

But convert the types to pointers:

  int8x8_t *ptr = &x;

and the message becomes:

  initialization of '__vector(8) signed char *' from incompatible pointer type 'float *'

Although it's reasonably obvious what '__vector(8) signed char *' means,
it isn't valid C or C++ syntax and is quite far from what the user wrote,
so using 'int8x8_t *' would be better.

This patch therefore prints the type name of vectors that have one.
It's still OK to print the __vector syntax as an "aka", although I have
a follow-on patch to tweak this slightly for types defined in system
header files.  The follow-on patch also addresses the ??? in
gcc.target/aarch64/diag_aka_1.c.

The C++ test already passed, but it seemed worth including for
consistency.

2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>

gcc/c-family/
	* c-pretty-print.c (pp_c_specifier_qualifier_list): If a vector type
	has a type name, use it in preference to the __vector syntax.

gcc/testsuite/
	* gcc.dg/diag-aka-3.c: New test.
	* gcc.target/aarch64/diag_aka_1.c: New test.
	* g++.dg/diagnostic/aka4.C: New test.

From-SVN: r276394

The AArch64 SVE tlsdesc patterns were the main motivating reason
for clobber_high.  It's no longer needed now that the patterns use
calls instead.

At the time, one of the possible future uses for clobber_high was for
asm statements.  However, the current code wouldn't handle that case
without modification, so I think we might as well remove it for now.
We can always reapply it in future if it turns out to be useful again.

2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* rtl.def (CLOBBER_HIGH): Delete.
	* doc/rtl.texi (clobber_high): Remove documentation.
	* rtl.h (SET_DEST): Remove CLOBBER_HIGH from the list of codes.
	(reg_is_clobbered_by_clobber_high): Delete.
	(gen_hard_reg_clobber_high): Likewise.
	* alias.c (record_set): Remove CLOBBER_HIGH handling.
	* cfgexpand.c (expand_gimple_stmt): Likewise.
	* combine-stack-adj.c (single_set_for_csa): Likewise.
	* combine.c (find_single_use_1, set_nonzero_bits_and_sign_copies)
	(can_combine_p, is_parallel_of_n_reg_sets, try_combine)
	(record_dead_and_set_regs_1, reg_dead_at_p_1): Likewise.
	* cse.c (invalidate_reg): Remove clobber_high parameter.
	(invalidate): Update call accordingly.
	(canonicalize_insn): Remove CLOBBER_HIGH handling.
	(invalidate_from_clobbers, invalidate_from_sets_and_clobbers)
	(count_reg_usage, insn_live_p): Likewise.
	* cselib.h (cselib_invalidate_rtx): Remove sett argument.
	* cselib.c (cselib_invalidate_regno, cselib_invalidate_rtx): Likewise.
	(cselib_invalidate_rtx_note_stores): Update call accordingly.
	(cselib_expand_value_rtx_1): Remove CLOBBER_HIGH handling.
	(cselib_invalidate_regno, cselib_process_insn): Likewise.
	* dce.c (deletable_insn_p, mark_nonreg_stores_1): Likewise.
	(mark_nonreg_stores_2): Likewise.
	* df-scan.c (df_find_hard_reg_defs, df_uses_record): Likewise.
	(df_get_call_refs): Likewise.
	* dwarf2out.c (mem_loc_descriptor): Likewise.
	* emit-rtl.c (verify_rtx_sharing): Likewise.
	(copy_insn_1, copy_rtx_if_shared_1): Likewise.
	(hard_reg_clobbers_high, gen_hard_reg_clobber_high): Delete.
	* genconfig.c (walk_insn_part): Remove CLOBBER_HIGH handling.
	* genemit.c (gen_exp, gen_insn): Likewise.
	* genrecog.c (validate_pattern, remove_clobbers): Likewise.
	* haifa-sched.c (haifa_classify_rtx): Likewise.
	* ira-build.c (create_insn_allocnos): Likewise.
	* ira-costs.c (scan_one_insn): Likewise.
	* ira.c (equiv_init_movable_p, memref_referenced_p): Likewise.
	(rtx_moveable_p, interesting_dest_for_shprep): Likewise.
	* jump.c (mark_jump_label_1): Likewise.
	* lra-int.h (lra_insn_reg::clobber_high): Delete.
	* lra-eliminations.c (lra_eliminate_regs_1): Remove CLOBBER_HIGH
	handling.
	(mark_not_eliminable): Likewise.
	* lra-lives.c (process_bb_lives): Likewise.
	* lra.c (new_insn_reg): Remove clobber_high parameter.
	(collect_non_operand_hard_regs): Likewise.  Update call to new
	insn_reg.  Remove CLOBBER_HIGH handling.
	(lra_set_insn_recog_data): Remove CLOBBER_HIGH handling.  Update call
	to collect_non_operand_hard_regs.
	(add_regs_to_insn_regno_info): Remove CLOBBER_HIGH handling.
	Update call to new_insn_reg.
	(lra_update_insn_regno_info): Remove CLOBBER_HIGH handling.
	* postreload.c (reload_cse_simplify, reload_combine_note_use)
	(move2add_note_store): Likewise.
	* print-rtl.c (print_pattern): Likewise.
	* recog.c (store_data_bypass_p_1, store_data_bypass_p): Likewise.
	(if_test_bypass_p): Likewise.
	* regcprop.c (kill_clobbered_value, kill_set_value): Likewise.
	* reginfo.c (reg_scan_mark_refs): Likewise.
	* reload1.c (maybe_fix_stack_asms, eliminate_regs_1): Likewise.
	(elimination_effects, mark_not_eliminable, scan_paradoxical_subregs)
	(forget_old_reloads_1): Likewise.
	* reorg.c (find_end_label, try_merge_delay_insns, redundant_insn)
	(own_thread_p, fill_simple_delay_slots, fill_slots_from_thread)
	(dbr_schedule): Likewise.
	* resource.c (update_live_status, mark_referenced_resources)
	(mark_set_resources): Likewise.
	* rtl.c (copy_rtx): Likewise.
	* rtlanal.c (reg_referenced_p, set_of_1, single_set_2, noop_move_p)
	(note_pattern_stores): Likewise.
	(reg_is_clobbered_by_clobber_high): Delete.
	* sched-deps.c (sched_analyze_reg, sched_analyze_insn): Remove
	CLOBBER_HIGH handling.

From-SVN: r276393

One (unintended) side effect of the patches to support multiple
ABIs is that we can now represent tlsdesc calls as normal calls
on SVE targets.  This is likely to be handled more efficiently than
clobber_high, and for example fixes the long-standing failure in
gcc.target/aarch64/sve/tls_preserve_1.c.

2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR target/91452
	* config/aarch64/aarch64.h (ARM_PCS_TLSDESC): New arm_pcs.
	* config/aarch64/aarch64-protos.h (aarch64_tlsdesc_abi_id): Declare.
	* config/aarch64/aarch64.c (aarch64_hard_regno_call_part_clobbered):
	Handle ARM_PCS_TLSDESC.
	(aarch64_tlsdesc_abi_id): New function.
	* config/aarch64/aarch64.md (tlsdesc_small_sve_<mode>): Use a call
	rtx instead of a list of clobbers and clobber_highs.
	(tlsdesc_small_<mode>): Update accordingly.

From-SVN: r276392

At the moment we rely on SYMBOL_REF_DECL to get the ABI of the callee
of a call insn, falling back to the default ABI if the decl isn't
available.  I think it'd be cleaner to attach the ABI directly to the
call instruction instead, which would also have the very minor benefit
of handling indirect calls more efficiently.

2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-protos.h (aarch64_expand_call): Take an
	extra callee_abi argument.
	* config/aarch64/aarch64.c (aarch64_expand_call): Likewise.
	Insert a CALLEE_ABI unspec into the call pattern as the second
	element in the PARALLEL.
	(aarch64_simd_call_p): Delete.
	(aarch64_insn_callee_abi): Get the arm_pcs of the callee from
	the new CALLEE_ABI element of the PARALLEL.
	(aarch64_init_cumulative_args): Get the arm_pcs of the callee
	from the function type, if given.
	(aarch64_function_arg_advance): Handle ARM_PCS_SIMD.
	(aarch64_function_arg): Likewise.  Return the arm_pcs of the callee
	when passed the function_arg_info end marker.
	(aarch64_output_mi_thunk): Pass the arm_pcs of the callee as the
	final argument of gen_sibcall.
	* config/aarch64/aarch64.md (UNSPEC_CALLEE_ABI): New unspec.
	(call): Make operand 2 a const_int_operand and pass it to expand_call.
	Wrap it in an UNSPEC_CALLEE_ABI unspec for the dummy define_expand
	pattern.
	(call_value): Likewise operand 3.
	(sibcall): Likewise operand 2.  Place the unspec before rather than
	after the return.
	(sibcall_value): Likewise operand 3.
	(*call_insn, *call_value_insn): Include an UNSPEC_CALLEE_ABI.
	(tlsgd_small_<mode>, *tlsgd_small_<mode>): Likewise.
	(*sibcall_insn, *sibcall_value_insn): Likewise.  Remove empty
	constraint strings.
	(untyped_call): Pass const0_rtx as the callee ABI to gen_call.

gcc/testsuite/
	* gcc.target/aarch64/torture/simd-abi-10.c: New test.
	* gcc.target/aarch64/torture/simd-abi-11.c: Likewise.

From-SVN: r276391

	* configure.ac: Remove GCC_HEADER_STDINT(gstdint.h).
	* libgomp.h: Include <stdint.h> instead of "gstdint.h".
	* oacc-parallel.c: Don't include "libgomp_g.h".
	* plugin/plugin-hsa.c: Include <stdint.h> instead of "gstdint.h".
	* plugin/plugin-nvptx.c: Don't include "gstdint.h".
	* aclocal.m4: Regenerated.
	* config.h.in: Regenerated.
	* configure: Regenerated.
	* Makefile.in: Regenerated.

From-SVN: r276389

2019-10-01  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* regs.h (HARD_REGNO_CALLER_SAVE_MODE): Update call to
	choose_hard_reg_mode.
	* config/sparc/sparc.h (HARD_REGNO_CALLER_SAVE_MODE): Likewise.

From-SVN: r276388

It says "size N/2" in a few places where "size S/2" is meant.


	* doc/md.texi (vec_pack_trunc_@var{m}): Fix typo.
	(vec_pack_sfix_trunc_@var{m}, vec_pack_ufix_trunc_@var{m}): Ditto.
	(vec_packs_float_@var{m}, vec_packu_float_@var{m}): Ditto.

From-SVN: r276387

From-SVN: r276386

    
    Also use just one table lookup, not two.
    
    Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/197759

From-SVN: r276382

From-SVN: r276380

Add missing ChangeLog entry.

From-SVN: r276376

	* include/debug/array: Add C++20 constexpr to comparison operators.
	* testsuite/23_containers/array/tuple_interface/get_debug_neg.cc: Adapt
	dg-error line numbers.
	* testsuite/23_containers/array/tuple_interface/
	tuple_element_debug_neg.cc: Likewise.

From-SVN: r276375

    2019-09-30  Andreas Tobler  <andreast@gcc.gnu.org>

	* include/experimental/internet: Include netinet/in.h if we have
	_GLIBCXX_HAVE_NETINET_IN_H defined.

From-SVN: r276374

    Add missing ChangeLog entry for the previous commit.

From-SVN: r276373

    2019-09-30  Andreas Tobler  <andreast@gcc.gnu.org>

	* testsuite/ext/special_functions/airy_ai/check_nan.cc: Ignore the
	FreeBSD warning about lower advertised precision of tgammal.
	* testsuite/ext/special_functions/airy_bi/check_nan.cc: Likewise.
	* testsuite/special_functions/07_cyl_bessel_i/check_nan.cc: Likewise.
	* testsuite/special_functions/08_cyl_bessel_j/check_nan.cc: Likewise.
	* testsuite/special_functions/09_cyl_bessel_k/check_nan.cc: Likewise.
	* testsuite/special_functions/10_cyl_neumann/check_nan.cc: Likewise.
	* testsuite/special_functions/19_sph_bessel/check_nan.cc: Likewise.
	* testsuite/special_functions/21_sph_neumann/check_nan.cc: Likewise.
	* testsuite/tr1/5_numerical_facilities/special_functions/
	08_cyl_bessel_i/check_nan.cc: Likewise.
	* testsuite/tr1/5_numerical_facilities/special_functions/
	09_cyl_bessel_j/check_nan.cc: Likewise.
	* testuite/tr1/5_numerical_facilities/special_functions/
	10_cyl_bessel_k/check_nan.cc: Likewise.
	* testsuite/tr1/5_numerical_facilities/special_functions/
	11_cyl_neumann/check_nan.cc: Likewise.
	* testsuite/tr1/5_numerical_facilities/special_functions/
	21_sph_bessel/check_nan.cc: Likewise.
	* testsuite/tr1/5_numerical_facilities/special_functions/
	23_sph_neumann/check_nan.cc: Likewise.

From-SVN: r276372

This patch improves the handling of large numbers of labels within a
rich_location: previously, overlapping labels could lead to an assertion
failure within layout::print_any_labels.  Also, the labels were printed
in reverse order of insertion into the rich_location.

This patch moves the determination of whether a vertical bar should
be printed for a line_label into the
  'Figure out how many "label lines" we need, and which
   one each label is printed in.'
step of layout::print_any_labels, rather than doing it as the lines
are printed.  It also flips the sort order, so that labels at the
same line/column are printed in order of insertion into the
rich_location.

I haven't run into these issues with our existing diagnostics, but it
affects a patch kit I'm working on that makes more extensive use of
labels.

gcc/ChangeLog:
	* diagnostic-show-locus.c (line_label::line_label): Initialize
	m_has_vbar.
	(line_label::comparator): Reverse the sort order by m_state_idx,
	so that when the list is walked backwards the labels appear in
	order of insertion into the rich_location.
	(line_label::m_has_vbar): New field.
	(layout::print_any_labels): When dealing with multiple labels at
	the same line and column, only print vertical bars for the one
	with the highest label_line.
	(selftest::test_one_liner_labels): Update test for multiple labels
	to expect the labels to be in the order of insertion into the
	rich_location.  Add a test for many such labels, where the column
	numbers are out-of-order relative to the insertion order.

From-SVN: r276371

ix86_compute_frame_layout sets use_fast_prologue_epilogue if
the function isn't more expensive than a certain threshold,
where the threshold depends on the number of saved registers.
However, the RA is allowed to insert and delete instructions
as it goes along, which can change whether this threshold is
crossed or not.

I hit this with an RA change I'm working on.  Rematerialisation
was able to remove an instruction and avoid a spill, which happened
to bring the size of the function below the threshold.  But since
nothing legitimately frame-related had changed, there was no need for
the RA to lay out the frame again.  We then failed the final sanity
check in lra_eliminate.

2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/i386/i386.h (ix86_frame::expensive_p): New field.
	(ix86_frame::expensive_count): Likewise.
	* config/i386/i386.c (ix86_compute_frame_layout): Make the choice
	of use_fast_prologue_epilogue robust against incidental changes
	in function size.

From-SVN: r276361

vec_unordered<mode> is vec_ordered<mode> plus a negation at the end.
Reuse vec_unordered<mode> logic.

gcc/ChangeLog:

2019-09-30  Ilya Leoshkevich  <iii@linux.ibm.com>

	PR target/77918
	* config/s390/vector.md (vec_unordered<mode>): Call
	gen_vec_ordered<mode>.

From-SVN: r276360

From-SVN: r276359

2019-09-30  Yuliang Wang  <yuliang.wang@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3):
	New pattern for ASRD.
	* config/aarch64/iterators.md (UNSPEC_ASRD): New unspec.
	* internal-fn.def (IFN_DIV_POW2): New internal function.
	* optabs.def (sdiv_pow2_optab): New optab.
	* tree-vect-patterns.c (vect_recog_divmod_pattern):
	Modify pattern to support new operation.
	* doc/md.texi (sdiv_pow2$var{m3}): Documentation for the above.
	* doc/sourcebuild.texi (vect_sdiv_pow2_si):
	Document new target selector.

gcc/testsuite/
	* gcc.dg/vect/vect-sdiv-pow2-1.c: New test.
	* gcc.target/aarch64/sve/asrdiv_1.c: As above.
	* lib/target-supports.exp (check_effective_target_vect_sdiv_pow2_si):
	Return true for AArch64 with SVE.

From-SVN: r276343

This patch makes more use of the function_abi infrastructure.
We can then avoid checking specifically for the vector PCS in
a few places, and can test it more directly otherwise.

Specifically: we no longer need to call df_set_regs_ever_live
for the extra call-saved registers, since IRA now does that for us.
We also don't need to handle the vector PCS specially in
aarch64_epilogue_uses, because DF now marks the registers
as live on exit.

2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_layout_frame): Use crtl->abi
	to test whether we're compiling a vector PCS function and to test
	whether the function needs to save a particular register.
	Remove the vector PCS handling of df_set_regs_ever_live.
	(aarch64_components_for_bb): Use crtl->abi to test whether
	the function needs to save a particular register.
	(aarch64_process_components): Use crtl->abi to test whether
	we're compiling a vector PCS function.
	(aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
	(aarch64_epilogue_uses): Remove handling of vector PCS functions.

From-SVN: r276341

With the function ABI stuff, we can now support shrink-wrapping of
non-leaf vector PCS functions.  This is particularly useful if the
vector PCS function calls an ordinary function on an error path,
since we can then keep the extra saves and restores specific to
that path too.

2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-protos.h (aarch64_use_simple_return_insn_p):
	Delete.
	* config/aarch64/aarch64.c (aarch64_components_for_bb): Check
	whether the block calls a function that clobbers more registers
	than the current function is allowed to.
	(aarch64_use_simple_return_insn_p): Delete.
	* config/aarch64/aarch64.md (simple_return): Remove condition.

gcc/testsuite/
	* gcc.target/aarch64/torture/simd-abi-9.c: New test.

From-SVN: r276340

If we support multiple ABIs in the same translation unit, it can
sometimes be the case that a callee clobbers more registers than
its caller is allowed to.  We need to call df_set_regs_ever_live
on these extra registers so that the prologue and epilogue code
can handle them appropriately.

This patch does that in IRA.  I wanted to avoid another full
instruction walk just for this, so I combined it with the existing
set_paradoxical_subreg walk.  This happens before the first
calculation of elimination offsets.

2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* function-abi.h (function_abi_aggregator): New class.
	* function-abi.cc (function_abi_aggregator::caller_save_regs): New
	function.
	* ira.c (update_equiv_regs_prescan): New function.  Call
	set_paradoxical_subreg here rather than...
	(update_equiv_regs): ...here.
	(ira): Call update_equiv_regs_prescan.

From-SVN: r276339

The previous patches removed all target-independent uses of
regs_invalidated_by_call, call_used_or_fixed_regs and
call_used_or_fixed_reg_p.  This patch therefore restricts
them to target-specific code (and reginfo.c, which sets them up).

2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* hard-reg-set.h (regs_invalidated_by_call): Only define if
	IN_TARGET_CODE.
	(call_used_or_fixed_regs): Likewise.
	(call_used_or_fixed_reg_p): Likewise.
	* reginfo.c (regs_invalidated_by_call): New macro.

From-SVN: r276338

This is a straight replacement of "calls we can clobber without saving
them first".

2019-09-30  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* shrink-wrap.c: Include function-abi.h.
	(requires_stack_frame_p): Use crtl->abi to test whether the
	current function can use a register without saving it first.

From-SVN: r276337