* testsuite/20_util/bind/91371.cc: Skip for x32.
	* testsuite/20_util/is_function/91371.cc: Ditto.
	* testsuite/20_util/is_member_function_pointer/91371.cc: Ditto.
	* testsuite/20_util/is_object/91371.cc: Ditto.

There is no need to set mode attribute to XImode since ix86_output_ssemov
can properly encode xmm16-xmm31 registers with and without AVX512VL.

Remove ext_sse_reg_operand since it is no longer needed.

gcc/

	PR target/89229
	* config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
	for TYPE_SSEMOV.  Remove ext_sse_reg_operand and TARGET_AVX512VL
	check.
	* config/i386/predicates.md (ext_sse_reg_operand): Removed.

gcc/testsuite/

	PR target/89229
	* gcc.target/i386/pr89229-7a.c: New test.
	* gcc.target/i386/pr89229-7b.c: Likewise.
	* gcc.target/i386/pr89229-7c.c: Likewise.

Fixes an ICE in the parser, and deprecates a previously allowed style of
syntax that deviated from GNU-style extended asm.

Reviewed-on: https://github.com/dlang/dmd/pull/10916

gcc/testsuite/ChangeLog:

2020-03-16  Iain Buclaw  <ibuclaw@gdcproject.org>

	* gdc.dg/asm1.d: Add new test for ICE in asm parser.
	* gdc.dg/asm5.d: New test.

Surrounds the gcc-style asm operands with parentheses, as the old style
is now deprecated.

Reviewed-on: https://github.com/dlang/druntime/pull/2986

The following testcase fails with -fcompare-debug.  The problem is that
bar is marked as address_taken only with -g and not without.
I've tracked it down to insert_init_stmt calling gimple_regimplify_operands
even on DEBUG_STMTs.  That function will just insert normal stmts before
the DEBUG_STMT if the DEBUG_STMT operand isn't gimple val or invariant.
While DCE will turn those statements into debug temporaries, it can cause
differences in SSA_NAMEs and more importantly, the ipa references are
generated from those before the DCE happens.
On the testcase, the DEBUG_STMT value is (int)bar.

We could generate DEBUG_STMTs with debug temporaries instead, but I fail to
see the reason to do that, DEBUG_STMTs allow other expressions and all we
want to ensure is that the expressions aren't too large (arbitrarily
complex), but during inlining/function versioning I don't see why something
would queue a DEBUG_STMT with arbitrarily complex expressions in there.

2020-03-16  Jakub Jelinek  <jakub@redhat.com>

	PR debug/94167
	* tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
	DEBUG_STMTs.

	* gcc.dg/pr94167.c: New test.

The following testcase fails with -fcompare-debug.  The problem is that
bar is marked as address_taken only with -g and not without.
I've tracked it down to insert_init_stmt calling gimple_regimplify_operands
even on DEBUG_STMTs.  That function will just insert normal stmts before
the DEBUG_STMT if the DEBUG_STMT operand isn't gimple val or invariant.
While DCE will turn those statements into debug temporaries, it can cause
differences in SSA_NAMEs and more importantly, the ipa references are
generated from those before the DCE happens.
On the testcase, the DEBUG_STMT value is (int)bar.

We could generate DEBUG_STMTs with debug temporaries instead, but I fail to
see the reason to do that, DEBUG_STMTs allow other expressions and all we
want to ensure is that the expressions aren't too large (arbitrarily
complex), but during inlining/function versioning I don't see why something
would queue a DEBUG_STMT with arbitrarily complex expressions in there.

2020-03-16  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/94166
	* tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
	as secondary comparison key.

	* gcc.dg/pr94166.c: New test.

Function loop_distribution::break_alias_scc_partitions needs to compute
SCC with runtime alias edges skipped.  As a result, partitions could be
re-assigned larger post order number than SCC's precedent partition and
distributed before the precedent one.  This fixes the issue by updating
the merged partition to the minimal post order in SCC.

gcc/
    PR tree-optimization/94125
    * tree-loop-distribution.c
    (loop_distribution::break_alias_scc_partitions): Update post order
    number for merged scc.

gcc/testsuite/
    PR tree-optimization/94125
    * gcc.dg/tree-ssa/pr94125.c: New test.

There is no need to set mode attribute to V16SFmode since ix86_output_ssemov
can properly encode xmm16-xmm31 registers with and without AVX512VL.

gcc/

	PR target/89229
	* config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
	MODE_SF.
	* config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
	for TYPE_SSEMOV.  Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
	and ext_sse_reg_operand check.

gcc/testsuite/

	PR target/89229
	* gcc.target/i386/pr89229-6a.c: New test.
	* gcc.target/i386/pr89229-6b.c: Likewise.
	* gcc.target/i386/pr89229-6c.c: Likewise.

Whitespace-only change.

gcc/cp/ChangeLog:

2020-03-15  Iain Sandoe  <iain@sandoe.co.uk>

	* coroutines.cc (co_await_expander): Fix indentation.

Addresses issues where the two-column format of options descriptions was
used, but the columns were separated by spaces rather than a single tab,
causing the help output to be more verbose than intended.

gcc/ChangeLog:

2020-03-15  Lewis Hyatt  <lhyatt@gmail.com>

	* common.opt: Avoid redundancy in the help text.
	* config/arc/arc.opt: Likewise.
	* config/cr16/cr16.opt: Likewise.

gcc/c-family/ChangeLog:

2020-03-15  Lewis Hyatt  <lhyatt@gmail.com>

	* c.opt: Avoid redundancy in the help text.

gcc/fortran/ChangeLog:

2020-03-15  Lewis Hyatt  <lhyatt@gmail.com>

	* lang.opt: Avoid redundancy in the help text.

gcc/testsuite/ChangeLog:

2020-03-15  Lewis Hyatt  <lhyatt@gmail.com>

	* gcc.misc-tests/help.exp: Adapt to new output for
	-Walloc-size-larger-than= option.

tree-nested.c didn't handle C array sections in {,task_,in_}reduction clauses.

2020-03-14  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/93566
	* tree-nested.c (convert_nonlocal_omp_clauses,
	convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
	with C/C++ array sections.

	* testsuite/libgomp.c/pr93566.c: New test.

There is no need to set mode attribute to XImode since ix86_output_ssemov
can properly encode xmm16-xmm31 registers with and without AVX512VL.

gcc/

	PR target/89229
	* config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
	for TYPE_SSEMOV.  Remove ext_sse_reg_operand and TARGET_AVX512VL
	check.

gcc/testsuite/

	PR target/89229
	* gcc.target/i386/pr89229-5a.c: New test.
	* gcc.target/i386/pr89229-5b.c: Likewise.
	* gcc.target/i386/pr89229-5c.c: Likewise.

Here the template arguments for the partial specialization are valid
arguments for the template, but not for a partial specialization, because
'd' can never be deduced to anything other than an empty pack.

gcc/cp/ChangeLog
2020-03-14  Jason Merrill  <jason@redhat.com>

	PR c++/92068
	* pt.c (process_partial_specialization): Error rather than crash on
	extra pack expansion.

find_parameter_packs_r doesn't look through typedefs, which is normally
correct, but that means we need to handle their declarations specially.

gcc/cp/ChangeLog
2020-03-14  Jason Merrill  <jason@redhat.com>

	PR c++/92909
	* pt.c (find_parameter_packs_r): [DECL_EXPR]: Walk
	DECL_ORIGINAL_TYPE of a typedef.

When cp_unevaluated_operand is set, tsubst_decl thinks that if it sees a
PARM_DECL that isn't already in local_specializations, we're in a decltype
in a trailing return type or some such, and so we only want a substitution
for a single PARM_DECL.  In this case, we want the whole chain, so make sure
cp_unevaluated_operand is cleared.

gcc/cp/ChangeLog
2020-03-14  Jason Merrill  <jason@redhat.com>

	PR c++/93248
	* pt.c (build_deduction_guide): Clear cp_unevaluated_operand for
	substituting DECL_ARGUMENTS.

Includes port fixes for Musl on ARM, AArch64, and SystemZ targets.

Reviewed-on: https://github.com/dlang/druntime/pull/2751
             https://github.com/dlang/druntime/pull/2843
             https://github.com/dlang/druntime/pull/2844
             https://github.com/dlang/druntime/pull/2898

Run tests should use vmx_hw, not just powerpc_altivec_ok.

gcc/testsuite/
	PR target/94176
	* gcc.target/powerpc/fold-vec-mule-misc.c: Use vmx_hw selector.

2020-03-14  Jakub Jelinek  <jakub@redhat.com>

	* gimple-fold.c (gimple_fold_builtin_strncpy): Change
	"a an" to "an" in a comment.
	* hsa-common.h (is_a_helper): Likewise.
	* tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
	* config/arc/arc.c (arc600_corereg_hazard): Likewise.
	* config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.

	* logic.cc (formula::formula): Change "a an" to "an" in a comment.
	* parser.c (cp_debug_parser): Change "a an" to "an" in a string
	literal.

2020-03-13  Aaron Sawdey  <acsawdey@linux.ibm.com>

	PR target/92379
	* config/rs6000/rs6000.c (num_insns_constant_multi) Don't shift a
	64-bit value by 64 bits (UB).

PR analyzer/94099 and PR analyzer/94105 both report ICEs relating to
calling region_model::get_lvalue on a NOP_EXPR.

PR analyzer/94099's ICE happens when generating a checker_path when
encountering an unhandled tree code (NOP_EXPR) in get_lvalue with a
NULL context (from for_each_state_change).

PR analyzer/94105 ICE happens when handling an ARRAY_REF where the
first operand is a NOP_EXPR: the unhandled tree code gives us
a symbolic_region, but the case for ARRAY_REF assumes we have an
array_region.

This patch fixes the ICEs by handling NOP_EXPR within
region_model::get_lvalue, and bulletproofs both of the above sources
of failure.

gcc/analyzer/ChangeLog:
	PR analyzer/94099
	PR analyzer/94105
	* diagnostic-manager.cc (for_each_state_change): Bulletproof
	against errors in get_rvalue by passing a
	tentative_region_model_context and rejecting if there's an error.
	* region-model.cc (region_model::get_lvalue_1): When handling
	ARRAY_REF, handle results of error-handling.  Handle NOP_EXPR.

gcc/testsuite/ChangeLog:
	PR analyzer/94099
	PR analyzer/94105
	* gcc.dg/analyzer/pr94099.c: New test.
	* gcc.dg/analyzer/pr94105.c: New test.

1. Implement DIP 1010 - (Static foreach)

Support for 'static foreach' has been added.  'static foreach' is a conditional
compilation construct that is to 'foreach' what 'static if' is to 'if'.  It is
a convenient way to generate declarations and statements by iteration.

    import std.conv: to;

    static foreach(i; 0 .. 10)
    {

        // a 'static foreach' body does not introduce a nested scope
        // (similar to 'static if').

        // The following mixin declaration is at module scope:
        // declares 10 variables x0, x1, ..., x9
        mixin('enum x' ~ to!string(i) ~ ' = i;');
    }

    import std.range: iota;
    // all aggregate types that can be iterated with a standard 'foreach'
    // loop are also supported by static foreach:
    static foreach(i; iota(10))
    {
        // we access the declarations generated in the first 'static foreach'
        pragma(msg, "x", i, ": ", mixin(`x` ~ to!string(i)));
        static assert(mixin(`x` ~ to!string(i)) == i);
    }

    void main()
    {
        import std.conv: text;
        import std.typecons: tuple;
        import std.algorithm: map;
        import std.stdio: writeln;

        // 'static foreach' has both declaration and statement forms
        // (similar to 'static if').

        static foreach(x; iota(3).map!(i => tuple(text("x", i), i)))
        {
            // generates three local variables x0, x1 and x2.
            mixin(text(`int `,x[0],` = x[1];`));

            scope(exit) // this is within the scope of 'main'
            {
                writeln(mixin(x[0]));
            }
        }

        writeln(x0," ",x1," ",x2); // first runtime output
    }

2. Aliases can be created directly from a '__trait'.

Aliases can be created directly from the traits that return symbol(s) or
tuples.  This includes 'getMember', 'allMembers', 'derivedMembers', 'parent',
'getOverloads', 'getVirtualFunctions', 'getVirtualMethods', 'getUnitTests',
'getAttributes' and finally 'getAliasThis'.  Previously an 'AliasSeq' was
necessary in order to alias their return.  Now the grammar allows to write
shorter declarations:

    struct Foo
    {
        static int a;
    }

    alias oldWay = AliasSeq!(__traits(getMember, Foo, "a"))[0];
    alias newWay = __traits(getMember, Foo, "a");

To permit this it was more interesting to include '__trait' in the basic types
rather than just changing the alias syntax. So additionally, wherever a type
appears a '__trait' can be used, for example in a variable declaration:

    struct Foo { static struct Bar {} }
    const(__traits(getMember, Foo, "Bar")) fooBar;
    static assert(is(typeof(fooBar) == const(Foo.Bar)));

3. fix Issue 10100 - Identifiers with double underscores and allMembers

The identifer whitelist has been converted into a blacklist of all possible
internal D language declarations.

Reviewed-on: https://github.com/dlang/dmd/pull/10791

2020-03-13  Vasee Vinayagamoorthy  <vaseeharan.vinayagamoorthy@arm.com>

gcc/testsuite/
	* gcc.target/aarch64/advsimd-intrinsics/bfcvt-nosimd.c: Fix DejaGnu
	typo.

2020-03-13  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/92303
	* lra-spills.c (remove_pseudos): Try to simplify memory subreg.

gcc/testsuite/ChangeLog:

       * gcc.dg/torture/pr54261-1.c: Correct built-in declartion.

gcc/c/ChangeLog:

	PR c/94040
	* c-decl.c (builtin_structptr_type_count): New constant.
	(match_builtin_function_types): Reject decls that are incompatible
	in types pointed to by pointers.
	(diagnose_mismatched_decls): Adjust comments.

gcc/testsuite/ChangeLog:

	PR c/94040
	* gcc.dg/Wbuiltin-declaration-mismatch-12.c: Relax test to look
	for warning name rather than the exact text.
	* gcc.dg/Wbuiltin-declaration-mismatch-14.c: New test.
	* gcc.dg/Wbuiltin-declaration-mismatch-15.c: New test.
	* gcc.dg/pr62090.c: Prune expected warning.
	* gcc.dg/pr89314.c: Look for warning name rather than text.

	* gcc.target/i386/pr64409.c: Do not limit compilation to x32 targets.
	(dg-error): Quote 'ms_abi' attribute.
	* gcc.target/i386/pr71958.c: Do not limit compilation to x32 targets.
	Require maybe_x32 effective target.
	(dg-options): Add -mx32.
	(dg-error): Quote 'ms_abi' attribute.
	* gcc.target/i386/pr90096.c (dg-error): Update relative
	location of target x32 error.

The df dataflow solvers use the aux field in the basic_block struct,
although that is reserved for any use by passes.  And not only that,
it is required that you set all such fields to NULL before calling
the solvers, or you quietly get wrong results.

This changes the solvers to use a local array for last_change_age
instead, just like it already had a local array for last_visit_age.

	PR rtl-optimization/94148
	PR rtl-optimization/94042
	* df-core.c (BB_LAST_CHANGE_AGE): Delete.
	(df_worklist_propagate_forward): New parameter last_change_age, use
	that instead of bb->aux.
	(df_worklist_propagate_backward): Ditto.
	(df_worklist_dataflow_doublequeue): Use a local array last_change_age.

In build_over_call, we are emitting a redundant -Wdeprecated-declarations
warning about the deprecated callee function, first from mark_used and again
from build_addr_func <- decay_conversion <- cp_build_addr_expr <- mark_used.

It seems this second deprecation warning coming from build_addr_func will always
be redundant, so we can safely use a warning_sentinel to disable it before
calling build_addr_func.  (And any deprecation warning that could come from
build_addr_func would be for FN, so we wouldn't be suppressing too much.)

gcc/cp/ChangeLog:

	PR c++/67960
	* call.c (build_over_call): Use a warning_sentinel to disable
	warn_deprecated_decl before calling build_addr_func.

gcc/testsuite/ChangeLog:

	PR c++/67960
	* g++.dg/diagnostic/pr67960.C: New test.
	* g++.dg/diagnostic/pr67960-2.C: New test.

This avoids HWI -> unsigned truncation to end up with zero alignment
which set_ptr_info_alignment ICEs on.

2020-03-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/94163
	* tree-ssa-pre.c (create_expression_by_pieces): Check
	whether alignment would be zero.

	PR lto/94157
	* lto-wrapper.c (run_gcc): Use concat for appending
	to collect_gcc_options.
	PR lto/94157
	* gcc.dg/lto/pr94157_0.c: New test.

This patch is to apply the same fix as r267528 to another similar case
bb-slp-over-widen-2.c which requires misaligned vector access.

gcc/testsuite/ChangeLog

    PR testsuite/93935
    * gcc.dg/vect/bb-slp-over-widen-2.c: Expect basic block vectorized
    messages only on vect_hw_misalign targets.

> I'm getting this ICE with -mabi=ilp32:
>
> during RTL pass: fwprop1
> /opt/gcc/gcc-20200312/gcc/testsuite/gcc.dg/pr94121.c: In function 'bar':
> /opt/gcc/gcc-20200312/gcc/testsuite/gcc.dg/pr94121.c:16:1: internal compiler error: in decompose, at rtl.h:2279

That is a preexisting issue, caused by another bug in the same function.
When mode is SImode and moffset is 0x80000000 (or anything else with the
bit 31 set), we need to sign-extend it.

2020-03-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/94121
	* config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
	instead of GEN_INT.

There is no need to set mode attribute to XImode nor V8DFmode since
ix86_output_ssemov can properly encode xmm16-xmm31 registers with and
without AVX512VL.

gcc/

	PR target/89229
	* config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
	* config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
	for TYPE_SSEMOV.  Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
	TARGET_AVX512VL and ext_sse_reg_operand check.

gcc/testsuite/

	PR target/89229
	* gcc.target/i386/pr89229-4a.c: New test.
	* gcc.target/i386/pr89229-4b.c: Likewise.
	* gcc.target/i386/pr89229-4c.c: Likewise.

-mlow-precision-div hard-coded the number of iterations to 2 for double
and 1 for float.  This patch adds a --param to control the number.

2020-03-13  Bu Le  <bule1@huawei.com>

gcc/
	PR target/94154
	* config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
	(-param=aarch64-double-recp-precision=): New options.
	* doc/invoke.texi: Document them.
	* config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
	instead of hard-coding the choice of 1 for float and 2 for double.

The issue is that relax_delay_slots can streamline the CFG in some cases,
in particular remove BARRIERs, but removing BARRIERs changes the way the
instructions are associated with (basic) blocks by the liveness analysis
code in resource.c (find_basic_block) and thus can cause entries in the
cache maintained by resource.c to become outdated, thus producing wrong
answers downstream.

The fix is to invalidate the cache entries affected by the removal of
BARRIERs in relax_delay_slots, i.e. for the instructions down to the
next BARRIER.

	PR rtl-optimization/94119
	* resource.h (clear_hashed_info_until_next_barrier): Declare.
	* resource.c (clear_hashed_info_until_next_barrier): New function.
	* reorg.c (add_to_delay_list): Fix formatting.
	(relax_delay_slots): Call clear_hashed_info_until_next_barrier on
	the next instruction after removing a BARRIER.