function.c (stack_protect_epilogue): Use if rather than switch for check targetm.have_stack_protect_test.

2015-07-08  Kito Cheng  <kito.cheng@gmail.com>

	* function.c (stack_protect_epilogue): Use if rather than switch for
	check targetm.have_stack_protect_test.

From-SVN: r225599

	* g++.dg/debug/dwarf2/*.C: generate dwarf-2 debug information
	even when dwarf-2 is not the default.

From-SVN: r225598

gcc/ChangeLog:

2015-07-08  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* defaults.h: Provide default for WORD_REGISTER_OPERATIONS.
	* config/alpha/alpha.h: Define WORD_REGISTER_OPERATIONS to 1.
	* config/arc/arc.h: Likewise.
	* config/arm/arm.h: Likewise.
	* config/bfin/bfin.h: Likewise.
	* config/epiphany/epiphany.h: Likewise.
	* config/frv/frv.h: Likewise.
	* config/ia64/ia64.h: Likewise.
	* config/iq2000/iq2000.h: Likewise.
	* config/lm32/lm32.h: Likewise.
	* config/m32r/m32r.h: Likewise.
	* config/mcore/mcore.h: Likewise.
	* config/mep/mep.h: Likewise.
	* config/microblaze/microblaze.h: Likewise.
	* config/mips/mips.h: Likewise.
	* config/mmix/mmix.h: Likewise.
	* config/mn10300/mn10300.h: Likewise.
	* config/nds32/nds32.h: Likewise.
	* config/nios2/nios2.h: Likewise.
	* config/pa/pa.h: Likewise.
	* config/rl78/rl78.h: Likewise.
	* config/sh/sh.h: Likewise.
	* config/sparc/sparc.h: Likewise.
	* config/stormy16/stormy16.h: Likewise.
	* config/tilegx/tilegx.h: Likewise.
	* config/tilepro/tilepro.h: Likewise.
	* config/v850/v850.h: Likewise.
	* config/xtensa/xtensa.h: Likewise.
	* doc/tm.texi: Regenerate.
	* doc/tm.texi.in: Adjust.
	* combine.c (simplify_set): Likewise.
	(simplify_comparison): Likewise.
	* expr.c (store_constructor): Likewise.
	* internal-fn.c (expand_arith_overflow): Likewise.
	* reload.c (push_reload): Likewise.
	(find_reloads): Likewise.
	(find_reloads_subreg_address): Likewise.
	* reload1.c (eliminate_regs_1): Likewise.
	* rtlanal.c (nonzero_bits1): Likewise.
	(num_sign_bit_copies1): Likewise.
	* simplify-rtx.c (simplify_truncation): Likewise.

From-SVN: r225597

gcc/ChangeLog:

2015-07-08  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* auto-inc-dec.c (pass_inc_dec::execute): Don't check the value
	of AUTO_INC_DEC with the preprocessor.
	* combine.c (combine_instructions): Likewise.
	(can_combine_p): Likewise.
	(try_combine): Likewise.
	* emit-rtl.c (try_split): Likewise.
	* loop-invariant.c (calculate_loop_reg_pressure): Likewise.
	* lower-subreg.c (resolve_simple_move): Likewise.
	* lra.c (update_inc_notes): Likewise.
	* recog.c (asm_operand_ok): Likewise.
	(constrain_operands): Likewise.
	* regrename.c (scan_rtx_address): Likewise.
	* reload.c (update_auto_inc_notes): Likewise.
	(reg_inc_found_and_valid_p): Likewise.
	* reload1.c (reload): Likewise.
	(emit_input_reload_insns): Likewise.
	(delete_output_reload): Likewise.
	* sched-deps.c (init_insn_reg_pressure_info): Likewise.
	* valtrack.c (cleanup_auto_inc_dec): Likewise.

From-SVN: r225596

gcc/ChangeLog:

2015-07-08  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* rtl.h: Always define AUTO_INC_DEC.
	* auto-inc-dec.c (pass_inc_dec::execute): Adjust.
	* combine.c (combine_instructions): Likewise.
	(can_combine_p): Likewise.
	(try_combine): Likewise.
	* emit-rtl.c (try_split): Likewise.
	* loop-invariant.c (calculate_loop_reg_pressure): Likewise.
	* lower-subreg.c (resolve_simple_move): Likewise.
	* lra.c (update_inc_notes): Likewise.
	* recog.c (asm_operand_ok): Likewise.
	(constrain_operands): Likewise.
	* regrename.c (scan_rtx_address): Likewise.
	* reload.c (update_auto_inc_notes): Likewise.
	(find_equiv_reg): Likewise.
	* reload1.c (reload): Likewise.
	(reload_as_needed): Likewise.
	(choose_reload_regs): Likewise.
	(emit_input_reload_insns): Likewise.
	(delete_output_reload): Likewise.
	* sched-deps.c (init_insn_reg_pressure_info): Likewise.
	* valtrack.c (cleanup_auto_inc_dec): Likewise.

From-SVN: r225595

gcc/ChangeLog:

2015-07-08  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* combine.c (can_combine_def_p): Don't check the value of
	HARD_FRAME_POINTER_IS_FRAME_POINTER with the preprocessor.
	(combinable_i3pat): Likewise.
	(mark_used_regs_combine): Likewise.
	* regrename.c (rename_chains): Likewise.
	* reload.c (find_reloads_address): Likewise.
	* sel-sched.c (mark_unavailable_hard_regs): Likewise.

From-SVN: r225594

gcc/ChangeLog:

2015-07-08  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* combine.c (update_rsp_from_reg_equal): Don't check if
	SHORT_IMMEDIATES_SIGN_EXTEND is defined.
	(reg_nonzero_bits_for_combine): Likewise.
	* config/alpha/alpha.h: Define SHORT_IMMEDIATES_SIGN_EXTEND to
	1.
	* config/frv/frv.h: Likewise.
	* config/lm32/lm32.h: Likewise.
	* config/mep/mep.h: Likewise.
	* config/mips/mips.h: Likewise.
	* config/rs6000/rs6000.h: Likewise.
	* config/sh/sh.h: Likewise.
	* config/tilegx/tilegx.h (enum reg_class): Likewise.
	* config/tilepro/tilepro.h: Likewise.
	* defaults.h: Add default for SHORT_IMMEDIATES_SIGN_EXTEND.
	* doc/tm.texi: Regenerate.
	* doc/tm.texi.in: Adjust.
	* rtlanal.c (nonzero_bits1): Likewise.

From-SVN: r225593

gcc/ChangeLog:

2015-07-08  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* combine.c (do_SUBST_MODE): Don't check the value of HAVE_cc0
	with the preprocessor.
	(combine_instructions): Likewise.
	(try_combine): Likewise.
	(subst): Likewise.
	(distribute_notes): Likewise.

From-SVN: r225592

Provide a default in files where that is possible, so that everything
else there can be unconditionally compiled.  However rtlanal.c and
reload.c do tricky things that break providing a global default, so we
can't do that yet.

gcc/ChangeLog:

2015-07-08  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* combine.c (try_combine): Don't check if LOAD_EXTEND_OP is
	defined.
	(simplify_set): Likewise.
	* cse.c (cse_insn): Likewise.
	* fold-const.c (fold_single_bit_test): Likewise.
	(fold_unary_loc): Likewise.
	* postreload.c (reload_cse_simplify_set): Likewise.
	(reload_cse_simplify_operands): Likewise.

From-SVN: r225591

From-SVN: r225590

       PR testsuite/66796
        * gcc.target/hppa/shadd-1.c: Avoid the read-modify-write so as
        to have a single memory reference.

From-SVN: r225586

c-family/
	* c-ada-spec.h (cpp_operation): Add IS_CONSTEXPR.
	* c-ada-spec.c (print_ada_declaration): Skip constexpr constructors.
cp/
	* decl2.c (cpp_check): Deal with IS_CONSTEXPR.

From-SVN: r225585

c-omp.c (c_omp_declare_simd_clauses_to_numbers): If all clauses are to be removed, return NULL rather than original clauses list.

	* c-omp.c (c_omp_declare_simd_clauses_to_numbers): If all clauses
	are to be removed, return NULL rather than original clauses list.

	* decl.c (grokfndecl): Handle flag_openmp_simd like flag_openmp.
	* pt.c (apply_late_template_attributes): Likewise.

	* g++.dg/vect/vect.exp: Run also simd* tests.
	* gcc.dg/vect/tree-vect.h (abort, exit): For C++ use extern "C".
	(check_vect): Fix up get_cpuid call for C++.
	* g++.dg/vect/simd-clone-1.cc: New test.

From-SVN: r225583

      gcc/
	* config/aarch64/aarch64.c (aarch64_unspec_may_trap_p): New function.
	(TARGET_UNSPEC_MAY_TRAP_P): Define as aarch64_unspec_may_trap_p.

From-SVN: r225581

It is OK to include <adxintrin.h> for IA MCU since GCC can generate ADX
intrinsics with alternative instuctions if ADX isn't enabled.

	PR target/66746
	* config/i386/x86intrin.h: Include <adxintrin.h> even if
	__iamcu__ is defined.

From-SVN: r225580

On x86, the "long double" type is platforma specific, which may be the
same as double or __float128.  Since pr37870.c requires 80-bit floating
point type, it should be compiled with -mlong-double-80.

	* gcc.target/i386/pr37870.c (dg-options): Add -mlong-double-80.

From-SVN: r225578

	* config/i386/predicates.md (general_reg_operand): Use GENERAL_REGNO_P.

From-SVN: r225568

	* gcc.target/i386/readeflags-1.c (abort): New prototype.
	* gcc.target/i386/writeeflags-1.c (abort): Likewise.

From-SVN: r225566

re PR target/66523 (the new clang-based assembler in Xcode 7 on 10.11 fails on libobjc/NXConstStr.m)

2015-07-08  Iain Sandoe  <iain@codesourcery.com>

	PR target/66523
	* config/darwin.c (darwin_mark_decl_preserved): Exclude 'L' label names from
	preservation.

From-SVN: r225565

Vectors should be passed in memory for IAMCU.  No warning for vector ABI
change for IAMCU since IAMCU ABI won't change.

gcc/

	PR target/66806
	* config/i386/i386.c (type_natural_mode): Don't warn vector ABI
	change for IAMCU.
	(function_arg_advance_32): Don't pass vectors in registers for
	IAMCU.
	(function_arg_32): Likewise.
	(ix86_return_in_memory): Don't return vectors in registers for
	IAMCU.

gcc/testsuite/

	PR target/66806
	* gcc.target/i386/pr66806.c: New test.

From-SVN: r225564

re PR c++/66421 (G++ fails compilation when assigning tuple created with variadic template to auto variable)

2015-07-08  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/66421
	* g++.dg/cpp0x/auto45.C: New.

From-SVN: r225563

    libtool: compile:  [...]/build-gcc/./gcc/xg++ [...] -c [...]/source-gcc/liboffloadmic/plugin/libgomp-plugin-intelmic.cpp [...]
    In file included from [...]/source-gcc/liboffloadmic/plugin/libgomp-plugin-intelmic.cpp:40:0:
    [...]/install/offload-x86_64-intelmicemul-linux-gnu/lib/gcc/x86_64-intelmicemul-linux-gnu/6.0.0/include/main_target_image.h:8628:1: error: narrowing conversion of '192' from 'int' to 'char' inside { } [-Wnarrowing]
     };
     ^
    [...]/install/offload-x86_64-intelmicemul-linux-gnu/lib/gcc/x86_64-intelmicemul-linux-gnu/6.0.0/include/main_target_image.h:8628:1: error: narrowing conversion of '192' from 'int' to 'char' inside { } [-Wnarrowing]
    [...]/install/offload-x86_64-intelmicemul-linux-gnu/lib/gcc/x86_64-intelmicemul-linux-gnu/6.0.0/include/main_target_image.h:8628:1: error: narrowing conversion of '164' from 'int' to 'char' inside { } [-Wnarrowing]
    [many more]

	liboffloadmic/
	* plugin/Makefile.am (main_target_image.h): Change type of data
	member in struct MainTargetImage to uint8_t.
	* plugin/Makefile.in: Regenerate.

From-SVN: r225562

2015-07-08  Vladimir Makarov  <vmakarov@redhat.com>

	PR middle-end/66334
	* ira-lives.c (process_bb_node_lives): Make conflicts with PIC
	hard regno live at the start of BB with incoming abnormal edges.
	* lra-lives.c (process_bb_lives): Ditto.

2015-07-08  Vladimir Makarov  <vmakarov@redhat.com>

	PR middle-end/66334
	* gcc.target/i386/pr66334.c: New.

From-SVN: r225561

	PR libgomp/65099
	gcc/
	* config/nvptx/mkoffload.c (main): Create an offload image only in
	64-bit configurations.
	libgomp/
	* plugin/plugin-nvptx.c (nvptx_get_num_devices): Return 0 if not
	in a 64-bit configuration.
	* testsuite/libgomp.oacc-c++/c++.exp: Don't attempt nvidia
	offloading testing if no such device is available.
	* testsuite/libgomp.oacc-c/c.exp: Likewise.
	* testsuite/libgomp.oacc-fortran/fortran.exp: Likewise.

From-SVN: r225560

gcc/testsuite/ChangeLog:
	* jit.dg/test-error-gcc_jit_block_end_with_switch-NULL-case.c: Fix
	comments.

From-SVN: r225559

... which have been introduced in r223152, for example hundreds of:

    [...]/gcc/input.h:37:12: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]

	libcpp/
	* include/line-map.h (RESERVED_LOCATION_COUNT): Change type to
	source_location.

From-SVN: r225558

gcc/jit/ChangeLog:
	PR jit/66783
	* libgccjit.c (gcc_jit_context_new_field): Show name of field in
	"unknown size" error message.
	(gcc_jit_struct_set_fields): Show name of struct in error message.
	(gcc_jit_context_new_global): Show name of global in
	"unknown size" error message.
	(gcc_jit_function_new_local): Likewise for local.

gcc/testsuite/ChangeLog:
	PR jit/66783
	* jit.dg/test-error-gcc_jit_context_new_field-opaque-struct.c
	(verify_code): Update expected error message.
	* jit.dg/test-error-gcc_jit_context_new_global-opaque-struct.c
	(verify_code): Likewise.
	* jit.dg/test-error-gcc_jit_function_new_local-opaque-struct.c
	(verify_code): Likewise.

From-SVN: r225557

2015-07-08  Tom de Vries  <tom@codesourcery.com>

	* testsuite/libgomp.c/parloops-exit-first-loop-alt-3.c (main): Fix
	second call to f.
	* testsuite/libgomp.c/parloops-exit-first-loop-alt.c: Same.

From-SVN: r225548

Fix PR bootstrap/66744.

	PR bootstrap/66744
	* tree-sra.c (create_access_1): Call ctor without brackets.
	(create_artificial_child_access): Likewise.

From-SVN: r225547

2015-07-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/66793
	* gimple-ssa-isolate-paths.c (insert_trap_and_remove_trailing_statemen):
	Properly split the block after stmts ending it.

	* gcc.dg/torture/pr66793.c: New testcase.

From-SVN: r225546

2015-07-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/66794
	* passes.c (execute_function_todo): Assert that post-dominators
	are not computed.
	* gimple-ssa-isolate-paths.c (gimple_ssa_isolate_erroneous_paths):
	Free post-dominators.

	* gcc.dg/torture/pr66794.c: New testcase.

From-SVN: r225545

gcc/ChangeLog:

2015-07-08  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	    * config/s390/s390.c (s390_init_frame_layout): Replace assertion
	    with early exit.

From-SVN: r225542

	PR c++/66748
	* tree.c (handle_abi_tag_attribute): Check for CLASS_TYPE_P before
	accessing TYPE_LANG_SPECIFIC node.

	* g++.dg/abi/abi-tag15.C: New test.

From-SVN: r225541

The current branch range tests assume that the MIPS branch instructions
have a 16 bit branch offset which is shifted by 2.  Unfortunately for microMIPS
this offset is shifted by 1 which reduces the branch range and caused the
branch-*.c tests to fail.


testsuite/
	* gcc.target/mips/branch-2.c: Change NOMIPS16 to NOCOMPRESSION.
	* gcc.target/mips/branch-3.c: Ditto
	* gcc.target/mips/branch-4.c: Ditto.
	* gcc.target/mips/branch-5.c: Ditto.
	* gcc.target/mips/branch-6.c: Ditto.
	* gcc.target/mips/branch-7.c: Ditto.
	* gcc.target/mips/branch-8.c: Ditto.
	* gcc.target/mips/branch-9.c: Ditto.
	* gcc.target/mips/branch-10.c: Ditto.
	* gcc.target/mips/branch-11.c: Ditto.
	* gcc.target/mips/branch-12.c: Ditto.
	* gcc.target/mips/branch-13.c: Ditto.
	* gcc.target/mips/umips-branch-5.c: New file.
	* gcc.target/mips/umips-branch-6.c: New file.
	* gcc.target/mips/umips-branch-7.c: New file.
	* gcc.target/mips/umips-branch-8.c: New file.
	* gcc.target/mips/umips-branch-9.c: New file.
	* gcc.target/mips/umips-branch-10.c: New file.
	* gcc.target/mips/umips-branch-11.c: New file.
	* gcc.target/mips/umips-branch-12.c: New file.
	* gcc.target/mips/umips-branch-13.c: New file.
	* gcc.target/mips/umips-branch-14.c: New file.
	* gcc.target/mips/umips-branch-15.c: New file.
	* gcc.target/mips/umips-branch-16.c: New file.
	* gcc.target/mips/branch-helper.h (OCCUPY_0x10000): New define.
	(OCCUPY_0xfffc): New define.

From-SVN: r225540

	* config/i386/i386.md (*jcc_bt<mode>): Only allow const_int values
	more than or equal 8 and less than 32 when optimizing for size.

From-SVN: r225539

with hardfloat toolchain.

gcc/testsuite/

2015-07-08  Renlin Li  <renlin.li@arm.com>

	* gcc.target/arm/unsignedned-float.c: Different options for hf toolchain.

From-SVN: r225538

	* config/arm/arm.c (arm_new_rtx_costs): Initialise cost to
	COSTS_N_INSNS (1) and increment it appropriately throughout the
	function.

From-SVN: r225537

testsuite/
	* gcc.target/mips/stack-1.c: Do not build the testcase for micromips.

From-SVN: r225536

2015-07-08  Richard Biener  <rguenther@suse.de>

	* fold-const.c (fold_widened_comparison): Fix inverted comparison.

From-SVN: r225535

	* getruntime.c (get_run_time) [__USE_GNU]: Use RUSAGE_SELF as
	argument 1 of getrusage call.

From-SVN: r225534