PR rtl-optimization/82913
	* compare-elim.c (try_merge_compare): Punt if def_insn is not
	single set.

	* gcc.c-torture/compile/pr82913.c: New test.

From-SVN: r254614

	* vr-values.h: New file with vr_values class.
	* tree-vrp.c: Include vr-values.h
	(vrp_value_range_pool, vrp_equiv_obstack, num_vr_values): Move static
	data objects into the vr_values class.
	(vr_value, values_propagated, vr_phi_edge_counts): Likewise.
	(get_value_range): Make it a member function within vr_values class.
	(set_defs_to_varying, update_value_range, add_equivalence): Likewise.
	(vrp_stmt_computes_nonzero_p, op_with_boolean_value_range_p): Likewise.
	(op_with_constant_singleton_value_range): Likewise.
	(extract_range_for_var_from_comparison_expr): Likewise.
	(extract_range_from_assert, extract_range_from_ssa_name): Likewise.
	(extract_range_from_binary_expr): Likewise.
	(extract_range_from_unary_expr): Likewise.
	(extract_range_from_cond_expr, extrat_range_from_comparison): Likewise.
	(check_for_binary_op_overflow, extract_range_basic): Likewise.
	(extract_range_from_assignment, adjust_range_with_scev): Likewise.
	(dump_all_value_ranges, get_vr_for_comparison): Likewise.
	(compare_name_with_value, compare_names): Likewise.
	(vrp_evaluate_conditional_warnv_with_ops_using_ranges): Likewise.
	(vrp_evaluate_conditional_warnv_with_ops): Likewise.  Remove prototype.
	(vrp_evaluate_conditional, vrp_visit_cond_stmt): Likewise.
	(vrp_visit_switch_stmt, extract_range_from_stmt): Likewise.
	(extract_range_from_phi_node): Likewise.
	(simplify_truth_ops_using_ranges): Likewise.
	(simplify_div_or_mod_using_ranges): Likewise.
	(simplify_min_or_max_using_ranges, simplify_abs_using_ranges): Likewise.
	(simplify_bit_ops_using_ranges, simplify_cond_using_ranges_1): Likewise.
	(simplify_cond_using_ranges_2, simplify_switch_using_ranges): Likewise.
	(simplify_float_conversion_using_ranges): Likewise.
	(simplify_internal_call_using_ranges): Likewise.
	(two_valued_val_range_p, simplify_stmt_using_ranges): Likewise.
	(vrp_visit_assignment_or_call): Likewise.  Smuggle class instance
	poitner via x_vr_values for calls into gimple folder.
	(vrp_initialize_lattice): Make this the vr_values ctor.
	(vrp_free_lattice): Make this the vr_values dtor.
	(set_vr_value): New function.
	(class vrp_prop): Add vr_values data member.  Add various member
	functions as well as member functions that delegate to vr_values.
	(check_array_ref): Make a member function within vrp_prop class.
	(search_for_addr_array, vrp_initialize): Likewise.
	(vrp_finalize): Likewise.  Revamp to avoid direct access to
	vr_value, values_propagated, etc.
	(check_array_bounds): Extract vrp_prop class instance pointer from
	walk info structure.  Use it to call member functions.
	(check_all_array_refs): Make a member function within vrp_prop class.
	Smuggle class instance pointer via walk info structure.
	(x_vr_values): New local static.
	(vrp_valueize): Use x_vr_values to get class instance.
	(vr_valueize_1): Likewise.
	(class vrp_folder): Add vr_values data member.  Add various member
	functions as well as member functions that delegate to vr_values.
	(fold_predicate_in): Make a mber fucntion within vrp_folder class.
	(simplify_stmt_for_jump_threading): Extract smuggled vr_values
	class instance from vr_values.  Use it to call member functions.
	(vrp_dom_walker): Add vr_values data member.
	(vrp_dom_walker::after_dom_children): Smuggle vr_values class
	instance via x_vr_values.
	(identify_jump_threads): Accept vr_values as argument.  Store
	it into the walker structure.
	(evrp_dom_walker): Add vr_values class data member.  Add various
	delegators.
	(evrp_dom_walker::try_find_new_range): Use vr_values data
	member to access the memory allocator.
	(evrp_dom_walker::before_dom_children): Store vr_values class
	instance into the vrp_folder class.
	(evrp_dom_walker::push_value_range): Rework to avoid direct
	access to num_vr_values and vr_value.
	(evrp_dom_walker::pop_value_range): Likewise.
	(execute_early_vrp): Remove call to vrp_initialize_lattice.
	Use vr_values to get to dump_all_value_ranges member function.
	Remove call to vrp_free_lattice.  Call vrp_initialize, vrp_finalize,
	and simplify_cond_using_ranges_2 via vrp_prop class instance.
	Pass vr_values class instance down to identify_jump_threads.
	Remove call to vrp_free_lattice.
	(debug_all_value_ranges): Remove.

From-SVN: r254613

	* tree-vrp.c (vrp_prop): Move class to earlier point in the file.
	(vrp_folder): Likewise.

From-SVN: r254612

	* tree-vrp.c (set_value_range): Do not reference vrp_equiv_obstack.
	Get it from the existing bitmap instead.
	(vrp_intersect_ranges_1): Likewise.

From-SVN: r254611

    
    For a misaligned address force a panic rather than assuming that reading
    from the address 0 will cause one.
    
    Reviewed-on: https://go-review.googlesource.com/69850

From-SVN: r254610

	* gimple-ssa-store-merging.c (struct store_immediate_info): Add
	bit_not_p field.
	(store_immediate_info::store_immediate_info): Add bitnotp argument,
	set bit_not_p to it.
	(imm_store_chain_info::coalesce_immediate_stores): Break group
	if bit_not_p is different.
	(count_multiple_uses, split_group,
	imm_store_chain_info::output_merged_store): Handle info->bit_not_p.
	(handled_load): Avoid multiple chained BIT_NOT_EXPRs.
	(pass_store_merging::process_store): Handle BIT_{AND,IOR,XOR}_EXPR
	result inverted using BIT_NOT_EXPR, compute bit_not_p, pass it
	to store_immediate_info ctor.

From-SVN: r254606

2017-11-09  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/78619
	* check.c (same_type_check): Introduce a new argument 'assoc'
	with default value false. If this is true, use the symbol type
	spec of BT_PROCEDURE expressions.
	(gfc_check_associated): Set 'assoc' true in the call to
	'same_type_check'.

2017-11-09  Paul Thomas  <pault@gcc.gnu.org>

	PR fortran/78619
	* gfortran.dg/pr78619.f90: New test.

From-SVN: r254605

2017-11-09  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/78814
	* interface.c (symbol_rank): Check for NULL pointer.

2017-11-09  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/78814
	* gfortran.dg/interface_40.f90: New testcase.

From-SVN: r254604

	* collect2.c (OBJECT_FORMAT_COFF): Remove EXTENDED_COFF support.
	(scan_prog_file): Likewise.

From-SVN: r254603

	* bb-reorder.c (max_entry_frequency): Remove.
	(find_traces, rotate_loop, mark_bb_visited, connect_better_edge_p,
	connect_traces, push_to_next_round_p): Remove prototypes.
	(find_traces_1_round): Use counts only.
	(push_to_next_round_p): Likewise.
	(find_traces): Likewise.
	(rotate_loop): Likewise.
	(find_traces_1_round): Likewise.
	(connect_traces): Likewise.
	(edge_order): Likewise.

From-SVN: r254602

A number of instructions are output in assembler form by
output_return_instruction () when compiling a function with the
cmse_nonsecure_entry attribute for Armv8-M Mainline with hardfloat float
ABI. However, the corresponding thumb2_cmse_entry_return insn pattern
does not account for all these instructions in its computing of the
length of the instruction.

This may lead GCC to use the wrong branching instruction due to
incorrect computation of the offset between the branch instruction's
address and the target address.

This commit fixes the mismatch between what output_return_instruction ()
does and what the pattern think it does and adds a note warning about
mismatch in the affected functions' heading comments to ensure code does
not get out of sync again.

Note: no test is provided because the C testcase is fragile (only works
on GCC 6) and the extracted RTL test fails to compile due to bugs in the
RTL frontend (PR82815 and PR82817)

2017-11-09  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm.c (output_return_instruction): Add comments to
    indicate requirement for cmse_nonsecure_entry return to account
    for the size of clearing instruction output here.
    (thumb_exit): Likewise.
    * config/arm/thumb2.md (thumb2_cmse_entry_return): Fix length for
    return in hardfloat mode.

From-SVN: r254601

	* gnat.dg/controlled2.adb, gnat.dg/controlled4.adb,
	gnat.dg/finalized.adb: Disable all warnings.

From-SVN: r254600

This makes the TOC register save a component.  If -msave-toc-indirect
is not explicitly disabled, it enables it, and then moves the prologue
code generated for that to a better place.  So far this only matters
for indirect calls (for direct calls the save is done in the PLT stub).
The restore is always done directly after the bl insn (the compiler
generates a nop there, the linker replaces it with a load).


	* config/rs6000/rs6000.c (machine_function): Add a bool,
	"toc_is_wrapped_separately".
	(rs6000_option_override_internal): Enable OPTION_MASK_SAVE_TOC_INDIRECT
	if it wasn't explicitly set or unset, we are optimizing for speed, and
	doing separate shrink-wrapping.
	(rs6000_get_separate_components): Enable the TOC component if
	saving the TOC register in the prologue.
	(rs6000_components_for_bb): Handle the TOC component.
	(rs6000_emit_prologue_components): Store the TOC register where needed.
	(rs6000_set_handled_components): Mark TOC as handled, if handled.
	(rs6000_emit_prologue): Don't save the TOC if that is already done.

From-SVN: r254599

2017-11-09  Martin Jambor  <mjambor@suse.cz>

	* ipa-param-manipulation.c: New file.
	* ipa-param-manipulation.h: Likewise.
	* Makefile.in (OBJS): Add ipa-param-manipulation.o.
	(PLUGIN_HEADERS): Addded ipa-param-manipulation.h
	* ipa-param.h (ipa_parm_op): Moved to ipa-param-manipulation.h.
	(ipa_parm_adjustment): Likewise.
	(ipa_parm_adjustment_vec): Likewise.
	(ipa_get_vector_of_formal_parms): Moved declaration to
	ipa-param-manipulation.h.
	(ipa_get_vector_of_formal_parm_types): Likewise.
	(ipa_modify_formal_parameters): Likewise.
	(ipa_modify_call_arguments): Likewise.
	(ipa_combine_adjustments): Likewise.
	(ipa_dump_param_adjustments): Likewise.
	(ipa_modify_expr): Likewise.
	(ipa_get_adjustment_candidate): Likewise.
	* ipa-prop.c (ipa_get_vector_of_formal_parms): Moved to
	ipa-param-manipulation.c.
	(ipa_get_vector_of_formal_parm_types): Likewise.
	(ipa_modify_formal_parameters): Likewise.
	(ipa_modify_call_arguments): Likewise.
	(ipa_modify_expr): Likewise.
	(get_ssa_base_param): Likewise.
	(ipa_get_adjustment_candidate): Likewise.
	(index_in_adjustments_multiple_times_p): Likewise.
	(ipa_combine_adjustments): Likewise.
	(ipa_dump_param_adjustments): Likewise.
	* tree-sra.c: Also include ipa-param-manipulation.h
	* omp-simd-clone.c: Include ipa-param-manipulation.h instead of
	ipa-param.h.

From-SVN: r254598

This patch adds a target selector that says whether the target
supports IFN_MASK_STORE.

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/sourcebuild.texi (vect_masked_store): Document.

gcc/testsuite/
	* lib/target-supports.exp (check_effective_target_vect_masked_store):
	New proc.
	* gcc.dg/vect/vect-cselim-1.c (foo): Mention that the second loop
	is vectorizable with masked stores.  Update scan-tree-dump-times
	accordingly.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254597

This patch adds a target selector to say whether it's possible to
align a local variable to the target's preferred vector alignment.
This can be false for large vectors if the alignment is only
a preference and not a hard requirement (and thus if there is no
need to support a stack realignment mechanism).

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/sourcebuild.texi (vect_align_stack_vars): Document.

gcc/testsuite/
	* lib/target-supports.exp
	(check_effective_target_vect_align_stack_vars): New proc.
	* gcc.dg/vect/vect-23.c: Only expect the array to be aligned if
	vect_align_stack_vars.
	* gcc.dg/vect/vect-24.c: Likewise.
	* gcc.dg/vect/vect-25.c: Likewise.
	* gcc.dg/vect/vect-26.c: Likewise.
	* gcc.dg/vect/vect-32-big-array.c: Likewise.
	* gcc.dg/vect/vect-32.c: Likewise.
	* gcc.dg/vect/vect-40.c: Likewise.
	* gcc.dg/vect/vect-42.c: Likewise.
	* gcc.dg/vect/vect-46.c: Likewise.
	* gcc.dg/vect/vect-48.c: Likewise.
	* gcc.dg/vect/vect-52.c: Likewise.
	* gcc.dg/vect/vect-54.c: Likewise.
	* gcc.dg/vect/vect-62.c: Likewise.
	* gcc.dg/vect/vect-67.c: Likewise.
	* gcc.dg/vect/vect-75-big-array.c: Likewise.
	* gcc.dg/vect/vect-75.c: Likewise.
	* gcc.dg/vect/vect-77-alignchecks.c: Likewise.
	* gcc.dg/vect/vect-78-alignchecks.c: Likewise.
	* gcc.dg/vect/vect-89-big-array.c: Likewise.
	* gcc.dg/vect/vect-89.c: Likewise.
	* gcc.dg/vect/vect-96.c: Likewise.
	* gcc.dg/vect/vect-multitypes-3.c: Likewise.
	* gcc.dg/vect/vect-multitypes-6.c: Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254596

This patch adds a target selector for variable-length vectors.
Initially it's always false, but the SVE patch provides a case
in which it's true.

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/sourcebuild.texi (vect_variable_length): Document.

gcc/testsuite/
	* lib/target-supports.exp
	(check_effective_target_vect_variable_length): New proc.
	* gcc.dg/vect/pr60482.c: XFAIL test for no epilog loop if
	vect_variable_length.
	* gcc.dg/vect/slp-reduc-6.c: XFAIL two-operation SLP if
	vect_variable_length.
	* gcc.dg/vect/vect-alias-check-5.c: XFAIL alias optimization if
	vect_variable_length.
	* gfortran.dg/vect/fast-math-mgrid-resid.f: XFAIL predictive
	commoning optimization if vect_variable_length.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254595

This patch adds a target selector that says whether we can ever
generate an "unaligned" accesses, where "unaligned" is relative
to the target's preferred vector alignment.  This is already true if:

   vect_no_align && { ! vect_hw_misalign }

i.e. if the target doesn't have any alignment mechanism and also
doesn't allow unaligned accesses.  It is also true (for the things
tested by gcc.dg/vect) if the target only wants things to be aligned
to an element; in that case every normal scalar access is "vector aligned".

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/sourcebuild.texi (vect_unaligned_possible): Document.

gcc/testsuite/
	* lib/target-supports.exp
	(check_effective_target_vect_unaligned_possible): New proc.
	* gcc.dg/vect/slp-25.c: Extend XFAIL of peeling for alignment from
	vect_no_align && { ! vect_hw_misalign } to ! vect_unaligned_possible.
	* gcc.dg/vect/vect-multitypes-1.c: Likewise.
	* gcc.dg/vect/vect-109.c: XFAIL vectorisation of an unaligned
	access to ! vect_unaligned_possible.
	* gcc.dg/vect/vect-33.c: Likewise.
	* gcc.dg/vect/vect-42.c: Likewise.
	* gcc.dg/vect/vect-56.c: Likewise.
	* gcc.dg/vect/vect-60.c: Likewise.
	* gcc.dg/vect/vect-96.c: Likewise.
	* gcc.dg/vect/vect-peel-1.c: Likewise.
	* gcc.dg/vect/vect-27.c: Extend XFAIL of unaligned vectorization from
	vect_no_align && { ! vect_hw_misalign } to ! vect_unaligned_possible.
	* gcc.dg/vect/vect-29.c: Likewise.
	* gcc.dg/vect/vect-44.c: Likewise.
	* gcc.dg/vect/vect-48.c: Likewise.
	* gcc.dg/vect/vect-50.c: Likewise.
	* gcc.dg/vect/vect-52.c: Likewise.
	* gcc.dg/vect/vect-72.c: Likewise.
	* gcc.dg/vect/vect-75-big-array.c: Likewise.
	* gcc.dg/vect/vect-75.c: Likewise.
	* gcc.dg/vect/vect-77-alignchecks.c: Likewise.
	* gcc.dg/vect/vect-77-global.c: Likewise.
	* gcc.dg/vect/vect-78-alignchecks.c: Likewise.
	* gcc.dg/vect/vect-78-global.c: Likewise.
	* gcc.dg/vect/vect-multitypes-3.c: Likewise.
	* gcc.dg/vect/vect-multitypes-4.c: Likewise.
	* gcc.dg/vect/vect-multitypes-6.c: Likewise.
	* gcc.dg/vect/vect-peel-4.c: Likewise.
	* gcc.dg/vect/vect-peel-3.c: Likewise, and also for peeling
	for alignment.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254594

This patch adds a target selector for targets whose
preferred_vector_alignment is the alignment of one element.  We'll never
peel in that case, and the step of a loop that operates on normal (as
opposed to packed) elements will always divide the preferred alignment.

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/sourcebuild.texi (vect_element_align_preferred): Document.

gcc/testsuite/
	* lib/target-supports.exp
	(check_effective_target_vect_element_align_preferred): New proc.
	(check_effective_target_vect_peeling_profitable): Test it.
	* gcc.dg/vect/no-section-anchors-vect-31.c: Don't expect peeling
	if vect_element_align_preferred.
	* gcc.dg/vect/no-section-anchors-vect-64.c: Likewise.
	* gcc.dg/vect/pr65310.c: Likewise.
	* gcc.dg/vect/vect-26.c: Likewise.
	* gcc.dg/vect/vect-54.c: Likewise.
	* gcc.dg/vect/vect-56.c: Likewise.
	* gcc.dg/vect/vect-58.c: Likewise.
	* gcc.dg/vect/vect-60.c: Likewise.
	* gcc.dg/vect/vect-89-big-array.c: Likewise.
	* gcc.dg/vect/vect-89.c: Likewise.
	* gcc.dg/vect/vect-92.c: Likewise.
	* gcc.dg/vect/vect-peel-1.c: Likewise.
	* gcc.dg/vect/vect-outer-3a-big-array.c: Expect the step to
	divide the alignment if vect_element_align_preferred.
	* gcc.dg/vect/vect-outer-3a.c: Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254593

SLP load permutation fails if any individual permutation requires more
than two vector inputs.  For 128-bit vectors, it's possible to permute
3 contiguous loads of 32-bit and 8-bit elements, but not 16-bit elements
or 64-bit elements.  The results are reversed for 256-bit vectors,
and so on for wider vectors.

This patch adds a routine that tests whether a permute will require
three vectors for a given vector count and element size, then adds
vect_perm3_* target selectors for the cases that we currently use.

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/sourcebuild.texi (vect_perm_short, vect_perm_byte): Document
	previously undocumented selectors.
	(vect_perm3_byte, vect_perm3_short, vect_perm3_int): Document.

gcc/testsuite/
	* lib/target-supports.exp (vect_perm_supported): New proc.
	(check_effective_target_vect_perm3_int): Likewise.
	(check_effective_target_vect_perm3_short): Likewise.
	(check_effective_target_vect_perm3_byte): Likewise.
	* gcc.dg/vect/slp-perm-1.c: Expect SLP load permutation to
	succeed if vect_perm3_int.
	* gcc.dg/vect/slp-perm-5.c: Likewise.
	* gcc.dg/vect/slp-perm-6.c: Likewise.
	* gcc.dg/vect/slp-perm-7.c: Likewise.
	* gcc.dg/vect/slp-perm-8.c: Likewise vect_perm3_byte.
	* gcc.dg/vect/slp-perm-9.c: Likewise vect_perm3_short.
	Use vect_perm_short instead of vect_perm.  Add a scan-tree-dump-not
	test for vect_perm3_short targets.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254592

Some tests assumed that there would only be 2 vector sizes if
vect_multiple_sizes, whereas for SVE there are three (SVE, 128-bit
and 64-bit).  This patch replaces scan-tree-dump-times with
scan-tree-dump for vect_multiple_sizes but keeps it for
!vect_multiple_sizes.

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/testsuite/
	* gcc.dg/vect/no-vfa-vect-101.c: Use scan-tree-dump rather than
	scan-tree-dump-times for vect_multiple_sizes.
	* gcc.dg/vect/no-vfa-vect-102.c: Likewise.
	* gcc.dg/vect/no-vfa-vect-102a.c: Likewise.
	* gcc.dg/vect/no-vfa-vect-37.c: Likewise.
	* gcc.dg/vect/no-vfa-vect-79.c: Likewise.
	* gcc.dg/vect/vect-104.c: Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254591

This patch adds a routine that lists the available vector sizes
for a target and uses it for some existing target conditions.
Later patches add more uses.

The cases are taken from multiple_sizes.

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/testsuite/
	* lib/target-supports.exp (available_vector_sizes): New proc.
	(check_effective_target_vect_multiple_sizes): Use it.
	(check_effective_target_vect64): Likewise.
	(check_effective_target_vect_sizes_32B_16B): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254590

Several vector tests are sensitive to the vector size.  This patch adds
a VECTOR_BITS macro to tree-vect.h to select the expected vector size
and uses it to influence iteration counts and array sizes.  The tests
keep the original values if the vector size is small enough.

For now VECTOR_BITS is always 128, but the SVE patches add other values.

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/testsuite/
	* gcc.dg/vect/tree-vect.h (VECTOR_BITS): Define.
	* gcc.dg/vect/bb-slp-pr69907.c: Include tree-vect.h.
	(N): New macro.
	(foo): Use it instead of hard-coded 320.
	* gcc.dg/vect/no-scevccp-outer-7.c (N): Redefine if the default
	value is too small for VECTOR_BITS.
	* gcc.dg/vect/no-scevccp-vect-iv-3.c (N): Likewise.
	* gcc.dg/vect/no-section-anchors-vect-31.c (N): Likewise.
	* gcc.dg/vect/no-section-anchors-vect-36.c (N): Likewise.
	* gcc.dg/vect/slp-perm-9.c (N): Likewise.
	* gcc.dg/vect/vect-32.c (N): Likewise.
	* gcc.dg/vect/vect-75.c (N, OFF): Likewise.
	* gcc.dg/vect/vect-77-alignchecks.c (N, OFF): Likewise.
	* gcc.dg/vect/vect-78-alignchecks.c (N, OFF): Likewise.
	* gcc.dg/vect/vect-89.c (N): Likewise.
	* gcc.dg/vect/vect-96.c (N): Likewise.
	* gcc.dg/vect/vect-multitypes-3.c (N): Likewise.
	* gcc.dg/vect/vect-multitypes-6.c (N): Likewise.
	* gcc.dg/vect/vect-over-widen-1.c (N): Likewise.
	* gcc.dg/vect/vect-over-widen-4.c (N): Likewise.
	* gcc.dg/vect/vect-reduc-pattern-1a.c (N): Likewise.
	* gcc.dg/vect/vect-reduc-pattern-1b.c (N): Likewise.
	* gcc.dg/vect/vect-reduc-pattern-2a.c (N): Likewise.
	* gcc.dg/vect/no-section-anchors-vect-64.c (NINTS): New macro.
	(N): Redefine in terms of NINTS.
	(ia, ib, ic): Use NINTS instead of hard-coded constants in the
	array bounds.
	* gcc.dg/vect/no-section-anchors-vect-69.c (NINTS): New macro.
	(N): Redefine in terms of NINTS.
	(test1): Replace a and b fields with NINTS - 2 ints of padding.
	(main1): Use NINTS instead of hard-coded constants.
	* gcc.dg/vect/section-anchors-vect-69.c (NINTS): New macro.
	(N): Redefine in terms of NINTS.
	(test1): Replace a and b fields with NINTS - 2 ints of padding.
	(test2): Remove incorrect comments about alignment.
	(main1): Use NINTS instead of hard-coded constants.
	* gcc.dg/vect/pr45752.c (N): Redefine if the default value is
	too small for VECTOR_BITS.
	(main): Continue to use canned results for the default value of N,
	but compute the expected results from scratch for other values.
	* gcc.dg/vect/slp-perm-1.c (N, main): As for pr45752.c.
	* gcc.dg/vect/slp-perm-4.c (N, main): Likewise.
	* gcc.dg/vect/slp-perm-5.c (N, main): Likewise.
	* gcc.dg/vect/slp-perm-6.c (N, main): Likewise.
	* gcc.dg/vect/slp-perm-7.c (N, main): Likewise.
	* gcc.dg/vect/pr65518.c (NINTS, N, RESULT): New macros.
	(giga): Use NINTS as the array bound.
	(main): Use NINTS, N and RESULT.
	* gcc.dg/vect/pr65947-5.c (N): Redefine if the default value is
	too small for VECTOR_BITS.
	(main): Fill in any remaining elements of A programmatically.
	* gcc.dg/vect/pr81136.c: Include tree-vect.h.
	(a): Use VECTOR_BITS to set the alignment of the target structure.
	* gcc.dg/vect/slp-19c.c (N): Redefine if the default value is
	too small for VECTOR_BITS.
	(main1): Continue to use the canned input for the default value of N,
	but compute the input from scratch for other values.
	* gcc.dg/vect/slp-28.c (N): Redefine if the default value is
	too small for VECTOR_BITS.
	(in1, in2, in3): Remove initialization.
	(check1, check2): Delete.
	(main1): Initialize in1, in2 and in3 here.  Check every element
	of the vectors and compute the expected values directly instead
	of using an array.
	* gcc.dg/vect/slp-perm-8.c (N): Redefine if the default value is
	too small for VECTOR_BITS.
	(foo, main): Change type of "i" to int.
	* gcc.dg/vect/vect-103.c (NINTS): New macro.
	(N): Redefine in terms of N.
	(c): Delete.
	(main1): Use NINTS.  Check the result from a and b directly.
	* gcc.dg/vect/vect-67.c (NINTS): New macro.
	(N): Redefine in terms of N.
	(main1): Use NINTS for the inner array bounds.
	* gcc.dg/vect/vect-70.c (NINTS, OUTERN): New macros.
	(N): Redefine in terms of NINTS.
	(s): Keep the outer dimensions as 4 even if N is larger than 24.
	(tmp1): New variable.
	(main1): Only define a local tmp1 if NINTS is relatively small.
	Use OUTERN for the outer loops and NINTS for the inner loops.
	* gcc.dg/vect/vect-91.c (OFF): New macro.
	(a, main3): Use it.
	* gcc.dg/vect/vect-92.c (NITER): New macro.
	(main1, main2): Use it.
	* gcc.dg/vect/vect-93.c (N): Rename to...
	(N1): ...this.
	(main): Update accordingly.
	(N2): New macro.
	(main1): Use N1 instead of 3001 and N2 insteaed of 10.
	* gcc.dg/vect/vect-multitypes-1.c (NSHORTS, NINTS): New macros.
	(N): Redefine in terms of NSHORTS.
	(main1): Use NINTS - 1 instead of 3 and NSHORTS - 1 instead of 7.
	(main): Likewise.
	* gcc.dg/vect/vect-over-widen-3-big-array.c (N): Define to VECTOR_BITS.
	(foo): Truncate the expected value to the type of *d.
	* gcc.dg/vect/vect-peel-3.c (NINTS, EXTRA): New macros.
	(ia, ib, ic, main): Use EXTRA.
	(main): Use NINTS.
	(RES_A, RES_B, REC_C): New macros.
	(RES): Redefine as their sum.
	* gcc.dg/vect/vect-reduc-or_1.c (N): New macro.
	(in): Change number of elements to N.
	(main): Update accordingly.  Calculate the expected result.
	* gcc.dg/vect/vect-reduc-or_2.c (N, in, main): As for
	vect-reduc-or-1.c.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254589

The vectoriser tests used a combination of:

1) if (impossible condition) abort ();
2) volatile int x; ... *x = ...;
3) asm volatile ("" ::: "memory");

to prevent vectorisation of a set-up loop.  The problem with 1) is that
the compiler can often tell that the condition is false and optimise
it away before vectorisation.

This was already happening in slp-perm-9.c, which is why the test was
expecting one loop to be vectorised even when the required permutes
weren't supported.  It becomes a bigger problem with SVE, which is
able to vectorise more set-up loops.

The point of this patch is therefore to replace 1) with something else.
2) should work most of the time, but we don't usually treat non-volatile
accesses as aliasing unrelated volatile accesses, so I think in principle
we could split the loop into one that does the set-up and one that does
the volatile accesses.  3) seems more robust because it's also a wild
read and write.

The patch therefore tries to replace all instances of 1) and 2) with 3).

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/testsuite/
	* gcc.dg/vect/bb-slp-cond-1.c (main): Add an asm volatile
	to the set-up loop.
	* gcc.dg/vect/slp-perm-7.c (main): Prevent vectorisation with
	asm volatile ("" ::: "memory") instead of a conditional abort.
	Update the expected vector loop count accordingly.
	* gcc.dg/vect/slp-perm-9.c (main): Likewise.
	* gcc.dg/vect/bb-slp-1.c (main1): Prevent vectorisation with
	asm volatile ("" ::: "memory") instead of a conditional abort.
	* gcc.dg/vect/slp-23.c (main): Likewise,
	* gcc.dg/vect/slp-35.c (main): Likewise,
	* gcc.dg/vect/slp-37.c (main): Likewise,
	* gcc.dg/vect/slp-perm-4.c (main): Likewise.
	* gcc.dg/vect/bb-slp-24.c (foo): Likewise.  Remove dummy argument.
	(main): Update call accordingly.
	* gcc.dg/vect/bb-slp-25.c (foo, main): As for bb-slp-24.c.
	* gcc.dg/vect/bb-slp-26.c (foo, main): Likewise.
	* gcc.dg/vect/bb-slp-29.c (foo, main): Likewise.
	* gcc.dg/vect/no-vfa-vect-102.c (foo): Delete.
	(main): Don't initialize it.
	(main1): Prevent vectorisation with asm volatile ("" ::: "memory")
	instead of a conditional abort.
	* gcc.dg/vect/no-vfa-vect-102a.c (foo, main1, main): As for
	no-vfa-vect-102.c
	* gcc.dg/vect/vect-103.c (foo, main1, main): Likewise.
	* gcc.dg/vect/vect-104.c (foo, main1, main): Likewise.
	* gcc.dg/vect/pr42709.c (main1): Remove dummy argument.
	Prevent vectorisation with asm volatile ("" ::: "memory")
	instead of a conditional abort.
	* gcc.dg/vect/slp-13-big-array.c (y): Delete.
	(main1): Prevent vectorisation with asm volatile ("" ::: "memory")
	instead of a conditional abort.
	* gcc.dg/vect/slp-3-big-array.c (y, main1): As for slp-13-big-array.c.
	* gcc.dg/vect/slp-34-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/slp-4-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/slp-multitypes-11-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-105.c (y, main1): Likewise.
	* gcc.dg/vect/vect-105-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-112-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-15-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-2-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-34-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-6-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-73-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-74-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-75-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-76-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-80-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-97-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-all-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-reduc-1char-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-reduc-2char-big-array.c (y, main1): Likewise.
	* gcc.dg/vect/vect-strided-a-mult.c (y, main1): Likewise.
	* gcc.dg/vect/vect-strided-a-u16-i2.c (y, main1): Likewise.
	* gcc.dg/vect/vect-strided-a-u16-i4.c (y, main1): Likewise.
	* gcc.dg/vect/vect-strided-a-u16-mult.c (y, main1): Likewise.
	* gcc.dg/vect/vect-strided-a-u8-i2-gap.c (y, main1): Likewise.
	* gcc.dg/vect/vect-strided-a-u8-i8-gap2-big-array.c (y, main1):
	Likewise.
	* gcc.dg/vect/vect-strided-a-u8-i8-gap2.c (y, main1): Likewise.
	* gcc.dg/vect/vect-strided-a-u8-i8-gap7-big-array.c (y, main1):
	Likewise.
	* gcc.dg/vect/vect-strided-a-u8-i8-gap7.c (y, main1): Likewise.
	* gcc.dg/vect/slp-24.c (y): Delete.
	(main): Prevent vectorisation with asm volatile ("" ::: "memory")
	instead of a conditional abort.
	* gcc.dg/vect/slp-24-big-array.c (y, main): As for slp-24.c.
	* gcc.dg/vect/vect-98-big-array.c (y, main): Likewise.
	* gcc.dg/vect/vect-bswap16.c (y, main): Likewise.
	* gcc.dg/vect/vect-bswap32.c (y, main): Likewise.
	* gcc.dg/vect/vect-bswap64.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-mult-char-ls.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-mult.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-same-dr.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u16-i2.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u16-i4.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u32-i4.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u32-i8.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u8-i2-gap.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u8-i2.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u8-i8-gap2-big-array.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u8-i8-gap2.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u8-i8-gap4-big-array.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u8-i8-gap4-unknown.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u8-i8-gap4.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u8-i8-gap7-big-array.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u8-i8-gap7.c (y, main): Likewise.
	* gcc.dg/vect/vect-strided-u8-i8.c (y, main): Likewise.
	* gcc.dg/vect/vect-10-big-array.c (y): Delete.
	(foo): Prevent vectorisation with asm volatile ("" ::: "memory")
	instead of a conditional abort.
	* gcc.dg/vect/vect-double-reduc-6-big-array.c (y, foo): As for
	vect-10-big-array.c.
	* gcc.dg/vect/vect-reduc-pattern-1b-big-array.c (y, foo): Likewise.
	* gcc.dg/vect/vect-reduc-pattern-1c-big-array.c (y, foo): Likewise.
	* gcc.dg/vect/vect-reduc-pattern-2b-big-array.c (y, foo): Likewise.
	* gcc.dg/vect/vect-117.c (foo): Delete.
	(main): Don't initalize it.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254588

2017-11-09  Gary Dismukes  <dismukes@adacore.com>

	* exp_util.adb, freeze.adb: Minor reformatting.

From-SVN: r254587

The recent gen_vec_duplicate patches used CONST_VECTOR for all
constants, but the documentation says:

  @findex const_vector
  @item (const_vector:@var{m} [@var{x0} @var{x1} @dots{}])
  Represents a vector constant.  The square brackets stand for the vector
  containing the constant elements.  @var{x0}, @var{x1} and so on are
  the @code{const_int}, @code{const_double} or @code{const_fixed} elements.

Both the AArch32 and AArch64 ports relied on the elements having
this form and would ICE if the element was something like a CONST
instead.  This showed up as a failure in vect-126.c for both arm-eabi
and aarch64-elf (but not aarch64-linux-gnu, which is what the series
was tested on).

The two obvious options were to redefine CONST_VECTOR to accept all
constants or make gen_vec_duplicate honour the existing documentation.
It looks like other code also assumes that integer CONST_VECTORs contain
CONST_INTs, so the patch does the latter.

I deliberately didn't add an assert to gen_const_vec_duplicate
because it looks like the SPU port *does* expect to be able to create
CONST_VECTORs of symbolic constants.

Also, I think the list above should include const_wide_int for vectors
of TImode and wider.

The new routine takes a mode for consistency with the generators,
and because I think it does make sense to accept all constants for
variable-length:

    (const (vec_duplicate ...))

rather than have some rtxes for which we instead use:

    (vec_duplicate (const ...))


2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* doc/rtl.texi (const_vector): Say that elements can be
	const_wide_ints too.
	* emit-rtl.h (valid_for_const_vec_duplicate_p): Declare.
	* emit-rtl.c (valid_for_const_vec_duplicate_p): New function.
	(gen_vec_duplicate): Use it instead of CONSTANT_P.
	* optabs.c (expand_vector_broadcast): Likewise.

From-SVN: r254586

This patch improves the ivopts address cost calculation for modes
in which an index must be scaled rather than unscaled.  Previously
we would only try the scaled form if the unscaled form was valid.

Many of the SVE tests rely on this when matching scaled indices.

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* tree-ssa-loop-ivopts.c (get_address_cost): Try using a
	scaled index even if the unscaled address was invalid.
	Don't increase the complexity of using a scale in that case.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254585

Originally subregs operated at the word level and subreg offsets
were measured in words.  The offset units were later changed from
words to bytes (SUBREG_WORD became SUBREG_BYTE), but the fundamental
assumption that subregs should operate at the word level remained.
Whether (subreg:M1 (reg:M2 R2) N) is well-formed depended on the
way that M1 and M2 partitioned into words and whether the subword
part of N represented a lowpart.  However, some questions depended
instead on the macro REGMODE_NATURAL_SIZE, which was introduced
as part of the patch that moved from SUBREG_WORD to SUBREG_BYTE.
It is used to decide whether setting (subreg:M1 (reg:M2 R2) N)
clobbers all of R2 or just part of it (df_read_modify_subreg).

Using words doesn't really make sense for modern vector
architectures.  Vector registers are usually bigger than
a word and:

(a) setting the scalar lowpart of them usually clobbers the
    rest of the register (contrary to the subreg rules,
    where only the containing words should be clobbered).

(b) high words of vector registers are often not independently
    addressable, even though that's what the subreg rules expect.

This patch therefore uses REGMODE_NATURAL_SIZE instead of
UNITS_PER_WORD to determine the size of the independently
addressable blocks in an inner register.

This is needed for SVE because the number of words in a vector
mode isn't known at compile time, so isn't a sensible basis
for calculating the number of registers.

The only existing port to define REGMODE_NATURAL_SIZE is
64-bit SPARC, where FP registers are 32 bits.  (This is the
opposite of the use case for SVE, since the natural division
is smaller than a word.)  I compiled the testsuite before and
after the patch for sparc64-linux-gnu and the only test whose
assembly changed was g++.dg/debug/pr65678.C, where the order
of two independent stores was reversed and where a different
register was picked for one pseudo.  The new code was
otherwise equivalent to the old code.

2017-11-09  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/rtl.texi: Rewrite the subreg rules so that they partition
	the inner register into REGMODE_NATURAL_SIZE bytes rather than
	UNITS_PER_WORD bytes.
	* emit-rtl.c (validate_subreg): Divide subregs into blocks
	based on REGMODE_NATURAL_SIZE of the inner mode.
	(gen_lowpart_common): Split the SCALAR_FLOAT_MODE_P and
	!SCALAR_FLOAT_MODE_P cases.  Use REGMODE_NATURAL_SIZE for the latter.
	* expmed.c (lowpart_bit_field_p): Divide the value up into
	chunks of REGMODE_NATURAL_SIZE rather than UNITS_PER_WORD.
	* expr.c (store_constructor): Use REGMODE_NATURAL_SIZE to test
	whether something is likely to occupy more than one register.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254583

	PR ipa/82879
	* ipa-inline-transform.c (update_noncloned_frequencies): Use
	profile_count::adjust_for_ipa_scaling.
	* tree-inline.c (copy_bb, copy_cfg_body): Likewise.
	* profile-count.c (profile_count::adjust_for_ipa_scaling): New member
	function.
	* profile-count.h (profile_count::adjust_for_ipa_scaling): Declare.

From-SVN: r254582

2017-11-09  Jerome Lambourg  <lambourg@adacore.com>

	* gcc-interface/Makefile.in: Add rules to build aarch64-qnx runtimes.

2017-11-09  Hristian Kirtchev  <kirtchev@adacore.com>

	* gcc-interface/trans.c (gnat_to_gnu): Add processing for
	N_Variable_Reference_Marker nodes.

From-SVN: r254581

2017-11-09  Ed Schonberg  <schonberg@adacore.com>

	* sem_ch12.adb (Analyze_Generic_Package_Declaration): Handle properly
	the pragma Compile_Time_Error when it appears in a generic package
	declaration and uses an expanded name to denote the current unit.

2017-11-09  Jerome Lambourg  <lambourg@adacore.com>

	* libgnarl/s-taprop__qnx.adb: Fix incorrect casing for pthread_self.
	* tracebak.c: Add support for tracebacks in QNX.

2017-11-09  Eric Botcazou  <ebotcazou@adacore.com>

	* exp_aggr.adb (Aggr_Size_OK): Bump base limit from 50000 to 500000.

2017-11-09  Yannick Moy  <moy@adacore.com>

	* erroutc.adb, set_targ.adb: Remove pragma Annotate for CodePeer
	justification.

2017-11-09  Joel Brobecker  <brobecker@adacore.com>

	* doc/gnat_ugn/platform_specific_information.rst: Document packages
	needed on GNU/Linux by GNAT.
	* gnat_ugn.texi: Regenerate.

2017-11-09  Hristian Kirtchev  <kirtchev@adacore.com>

	* contracts.adb (Analyze_Contracts): Remove the three parameter
	version. This routine now only analyzes contracts and does not perform
	any freezing actions.
	(Analyze_Previous_Contracts): Removed.
	(Freeze_Previous_Contracts): New routine.
	* contracts.ads (Analyze_Previous_Contracts): Removed.
	(Freeze_Previous_Contracts): New routine.
	* sem_ch3.adb (Analyze_Declarations): Analyze the contract of an
	enclosing package spec regardless of whether the list denotes the
	visible or private declarations.  Fix the removal of partial state
	refinements when the context is a package spec.
	* sem_ch6.adb (Analyze_Subprogram_Body_Helper): Freeze previous
	contracts.
	* sem_ch7.adb (Analyze_Package_Body_Helper): Freeze previous contracts.
	* sem_ch9.adb (Analyze_Entry_Body): Freeze previous contracts.
	(Analyze_Protected_Body): Freeze previous contracts.
	(Analyze_Task_Body): Freeze previous contracts.
	* sem_prag.adb: Comment reformatting.

2017-11-09  Bob Duff  <duff@adacore.com>

	* libgnarl/g-thread.ads, libgnarl/g-thread.adb: (Make_Independent):
	Export this so users can use it without importing
	System.Tasking.Utilities.
	* libgnarl/s-tassta.adb (Vulnerable_Complete_Task): Relax assertion
	that fails when Make_Independent is called on a user task.
	* libgnarl/s-taskin.ads (Master_Of_Task): Avoid unusual
	capitalization style ((style) bad casing of "Master_of_Task").

From-SVN: r254580

	* gimple-ssa-store-merging.c (count_multiple_uses): New function.
	(split_group): Add total_orig and total_new arguments, estimate the
	number of statements related to the store group without store merging
	and with store merging.
	(imm_store_chain_info::output_merged_store): Adjust split_group
	callers, punt if estimated number of statements with store merging
	is not smaller than estimated number of statements without it.
	Formatting fix.
	(handled_load): Remove has_single_use checks.
	(pass_store_merging::process_store): Likewise.

From-SVN: r254579

2017-11-09  Ed Schonberg  <schonberg@adacore.com>

	* sem_ch12.adb (Analyze_Subprogram_Instantiation): Correct use of
	uninitialized variable uncovered by Codepeer.

2017-11-09  Arnaud Charlet  <charlet@adacore.com>

	* namet.adb: Replace pragma Assume by pragma Assert to fix bootstrap.

2017-11-09  Javier Miranda  <miranda@adacore.com>

	* doc/gnat_rm/standard_and_implementation_defined_restrictions.rst:
	(Static_Dispatch_Tables): Minor rewording.
	* gnat_rm.texi: Regenerate.

2017-11-09  Justin Squirek  <squirek@adacore.com>

	* sem_ch8.adb (Analyze_Use_Package): Remove forced installation of
	use_clauses within instances.
	(Use_One_Package): Add condition to check for "hidden" open scopes to
	avoid skipping over packages that have not been properly installed even
	though they are visible.

2017-11-09  Ed Schonberg  <schonberg@adacore.com>

	* sem_ch4.adb (Analyze_Selected_Component): Reject properly a call to a
	private operation of a protected type, when the type has no visible
	operations.

From-SVN: r254578

2017-11-09  Javier Miranda  <miranda@adacore.com>

	* rtsfind.ads (RE_Id, RE_Unit_Table): Add RE_HT_Link.
	* exp_disp.adb (Make_DT): Initialize the HT_Link field of the TSD only
	if available.

2017-11-09  Bob Duff  <duff@adacore.com>

	* exp_ch4.adb, exp_ch9.adb, exp_prag.adb, par-ch3.adb, sem_aggr.adb,
	sem_ch12.adb, sem_ch13.adb, sem_ch4.adb, sem_disp.adb, sem_prag.adb,
	sem_res.adb, sem_util.adb: Get rid of warnings about uninitialized
	variables.

From-SVN: r254577

2017-11-09  Yannick Moy  <moy@adacore.com>

	* exp_disp.adb (Make_DT): Default initialize Ifaces_List and
	Ifaces_Comp_List.

From-SVN: r254576

2017-11-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/82902
	* tree-ssa-phiprop.c (propagate_with_phi): Test proper type.

	* g++.dg/torture/pr82902.C: New testcase.

From-SVN: r254575

2017-11-09  Martin Liska  <mliska@suse.cz>

	PR target/82863
	* emit-rtl.c (init_emit_regs): Initialize split_branch_probability to
	uninitialized.
2017-11-09  Martin Liska  <mliska@suse.cz>

	PR target/82863
	* gcc.dg/pr82863.c: New test.

From-SVN: r254574

2017-11-09  Pascal Obry  <obry@adacore.com>

	* libgnarl/s-taprop__mingw.adb: On Windows, initialize the thead handle
	only for foreign threads.  We initialize the thread handle only if not
	yet initialized. This happens in Enter_Task for foreign threads only.
	But for native threads (Ada tasking) we do want to keep the real
	handle (from Create_Task) to be able to free the corresponding
	resources in Finalize_TCB (CloseHandle).

2017-11-09  Yannick Moy  <moy@adacore.com>

	* sem_attr.adb (Analyze_Attribute): Default initialize P_Type,
	P_Base_Type.
	(Error_Attr_P): Fix name in pragma No_Return.
	(Unexpected_Argument): Add pragma No_Return.
	(Placement_Error): Add pragma No_Return.

2017-11-09  Javier Miranda  <miranda@adacore.com>

	* exp_disp.adb (Elab_Flag_Needed): Elaboration flag not needed when the
	dispatch table is statically built.
	(Make_DT): Declare constant the Interface_Table object associated with
	an statically built dispatch table. For this purpose the Offset_To_Top
	value of each interface is computed using the dummy object.
	* exp_ch3.adb (Build_Init_Procedure): Do not generate code initializing
	the Offset_To_Top field of secondary dispatch tables when the dispatch
	table is statically built.
	(Initialize_Tag): Do not generate calls to Register_Interface_Offset
	when the dispatch table is statically built.
	* doc/gnat_rm/standard_and_implementation_defined_restrictions.rst:
	Document the new GNAT restriction Static_Dispatch_Tables.
	* gnat_rm.texi: Regenerate.

2017-11-09  Hristian Kirtchev  <kirtchev@adacore.com>

	* sem_aggr.adb (Resolve_Delta_Record_Aggregate): Reorder declarations
	to avoid a dormant bug.

2017-11-09  Jerome Lambourg  <lambourg@adacore.com>

	* init.c: Define missing __gnat_alternate_stack for QNX. Set it to 0,
	as such capability is not available on the OS.
	* link.c: Make sure linker options for QNX are correct.
	* libgnarl/s-osinte__qnx.ads: Add some missing bindings to pthread.
	* libgnarl/s-taprop__qnx.adb: New, derived from s-taprop__posix.adb. This brings
	in particular a workaround with locks priority ceiling where a higher
	priority task is allowed to lock a lower ceiling priority lock. This
	also fixes the scheduling of FIFO tasks when the priority of a task is
	lowered.
	* libgnat/system-qnx-aarch64.ads: Fix priority ranges.

2017-11-09  Yannick Moy  <moy@adacore.com>

	* erroutc.adb (Output_Error_Msgs): Justify CodePeer false positive
	message.
	* gnatbind.adb (Scan_Bind_Arg): Simplify test to remove always true
	condition.
	* namet.adb (Copy_One_Character): Add assumption for static analysis,
	as knowledge that Hex(2) is in the range 0..255 is too complex for
	CodePeer.
	(Finalize): Add assumption for static analysis, as the fact that there
	are symbols in the table depends on a global invariant at this point in
	the program.
	* set_targ.adb (Check_Spaces): Justify CodePeer false positive message.
	* stylesw.adb (Save_Style_Check_Options): Rewrite to avoid test always
	true.

From-SVN: r254573

2017-11-09  Javier Miranda  <miranda@adacore.com>

	* libgnat/s-rident.ads (Static_Dispatch_Tables): New restriction name.
	* exp_disp.adb (Building_Static_DT): Check restriction.
	(Building_Static_Secondary_DT): Check restriction.
	(Make_DT): Initialize the HT_Link to No_Tag.
	* opt.ads (Static_Dispatch_Tables): Rename flag...
	(Building_Static_Dispatch_Tables): ... into this.  This will avoid
	conflict with the restriction name.
	* gnat1drv.adb: Update.
	* exp_aggr.adb (Is_Static_Dispatch_Table_Aggregate): Update.
	* exp_ch3.adb (Expand_N_Object_Declaration): Update.

2017-11-09  Pascal Obry  <obry@adacore.com>

	* libgnarl/s-taprop__mingw.adb: Minor code clean-up.  Better using a
	named number.

From-SVN: r254572

gcc/ada/

2017-11-09  Ed Schonberg  <schonberg@adacore.com>

	* exp_ch3.adb, gnat1drv.adb, namet.adb, namet.ads, sem_aggr.adb,
	sem_ch2.adb, sem_ch4.adb: Minor reformatting.
	* sem_res.adb (Resolve_Entity_Name): Suppress spurious error on read of
	out parameter when in Ada_83 mode, the oarameter is of a composite
	type, and it appears as the prefix of an attribute.

2017-11-09  Bob Duff  <duff@adacore.com>

	* sinfo.ads: Minor comment fix.

2017-11-09  Hristian Kirtchev  <kirtchev@adacore.com>

	* sem_prag.ads: Add pragmas Unmodified and Unreferenced to table
	Pragma_Significant_In_SPARK.

gcc/testsuite/

2017-11-09  Hristian Kirtchev  <kirtchev@adacore.com>

	* gnat.dg/unreferenced.adb: New testcase.

2017-11-09  Ed Schonberg  <schonberg@adacore.com>

	* gnat.dg/out_param.adb: New testcase.

From-SVN: r254571