* g++.dg/ipa/imm-devirt-1.C: Fix regexp in dg-final.
	* g++.dg/ipa/imm-devirt-2.C: Likewise.

From-SVN: r212313

	PR c/6940
	* doc/invoke.texi: Document -Wsizeof-array-argument.
c-family/
	* c.opt (Wsizeof-array-argument): New option.
c/
	* c-decl.c (grokdeclarator): Set C_ARRAY_PARAMETER.
	* c-tree.h (C_ARRAY_PARAMETER): Define.
	* c-typeck.c (c_expr_sizeof_expr): Warn when using sizeof on an array
	function parameter.
cp/
	* cp-tree.h (DECL_ARRAY_PARAMETER_P): Define.
	* decl.c (grokdeclarator): Set DECL_ARRAY_PARAMETER_P.
	* typeck.c (cxx_sizeof_expr): Warn when using sizeof on an array
	function parameter.
testsuite/
	* c-c++-common/Wsizeof-pointer-memaccess1.c: Use
	-Wno-sizeof-array-argument.
	* c-c++-common/Wsizeof-pointer-memaccess2.c: Likewise.
	* g++.dg/warn/Wsizeof-pointer-memaccess-1.C: Likewise.
	* gcc.dg/Wsizeof-pointer-memaccess1.c: Likewise.
	* g++.dg/torture/Wsizeof-pointer-memaccess1.C: Likewise.
	* g++.dg/torture/Wsizeof-pointer-memaccess2.C: Likewise.
	* gcc.dg/torture/Wsizeof-pointer-memaccess1.c: Likewise.
	* c-c++-common/sizeof-array-argument.c: New test.
	* gcc.dg/vla-5.c: Add dg-warnings.
../libgomp/	* testsuite/libgomp.c/appendix-a/a.29.1.c (f): Add dg-warnings.

From-SVN: r212312

From-SVN: r212311

	* configure, config.h.in: Regenerate.
	* config/fpu-sysv.h: Include <assert.h>.

From-SVN: r212307

	* configure.ac: Don't accept isl 0.10.
	* configure: Regenerate.

From-SVN: r212306

	* wide-int.h (wide_int_storage): Change declaration from struct
	to class.

From-SVN: r212305

	* cgraph.c (cgraph_create_indirect_edge): Update call of
	get_polymorphic_call_info.
	* ipa-utils.h (get_polymorphic_call_info): Add parameter CALL.
	(possible_polymorphic_call_targets): Add parameter call.
	(decl_maybe_in_construction_p): New predicate.
	(get_polymorphic_call_info): Add parameter call;
	use decl_maybe_in_construction_p.
	* gimple-fold.c (fold_gimple_assign): Update use of
	possible_polymorphic_call_targets.
	(gimple_fold_call): Likewise.
	* ipa-prop.c: Inlcude calls.h
	(ipa_binfo_from_known_type_jfunc): Check that known type is record.
	(param_type_may_change_p): New predicate.
	(detect_type_change_from_memory_writes): Break out from ...
	(detect_type_change): ... this one; use 
	param_type_may_change_p.
	(detect_type_change_ssa): Use param_type_may_change_p.
	(compute_known_type_jump_func): Use decl_maybe_in_construction_p.

	* g++.dg/ipa/devirt-26.C: Update testcase.
	* g++.dg/ipa/imm-devirt-1.C: Update testcase.
	* g++.dg/ipa/imm-devirt-2.C: Update testcase.

From-SVN: r212304

2014-07-05  Charles Baylis  <charles.baylis@linaro.org>

	PR target/49423
	* config/arm/arm-protos.h (arm_legitimate_address_p,
	arm_is_constant_pool_ref): Add prototypes.
	* config/arm/arm.c (arm_legitimate_address_p): Remove static.
	(arm_is_constant_pool_ref) New function.
	* config/arm/arm.md (unaligned_loadhis, arm_zero_extendhisi2_v6,
	arm_zero_extendqisi2_v6): Use Uh constraint for memory operand.
	(arm_extendhisi2, arm_extendhisi2_v6): Use Uh constraint for memory
	operand. Remove pool_range and neg_pool_range attributes.
	(arm_extendqihi_insn, arm_extendqisi, arm_extendqisi_v6): Remove
	pool_range and neg_pool_range attributes.
	* config/arm/constraints.md (Uh): New constraint.
	(Uq): Don't allow constant pool references.

From-SVN: r212303

From-SVN: r212302

2014-07-04  Tobias Burnus  <burnus@net-b.de>

        * resolve.c (resolve_assoc_var): Fix corank setting.
        * trans-array.c (gfc_conv_descriptor_token): Change assert.
        for select-type temporaries.
        * trans-decl.c (generate_coarray_sym_init): Skip for
        attr.select_type_temporary. 
        * trans-expr.c (gfc_conv_procedure_call): Fix for
        select-type temporaries.
        * trans-intrinsic.c (get_caf_token_offset): Ditto.
        (gfc_conv_intrinsic_caf_get, gfc_conv_intrinsic_caf_send): Set
        the correct dtype.
        * trans-types.h (gfc_get_dtype_rank_type): New.
        * trans-types.c (gfc_get_dtype_rank_type): Ditto.

2014-07-04  Tobias Burnus  <burnus@net-b.de>

        * gfortran.dg/coarray/coindexed_3.f90: New.

From-SVN: r212299

	* config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): New.
	(move_lo_quad_internal_be_<mode>): Likewise.
	(move_lo_quad_<mode>): Convert to define_expand.
	(aarch64_simd_move_hi_quad_<mode>): Gate on BYTES_BIG_ENDIAN.
	(aarch64_simd_move_hi_quad_be_<mode>): New.
	(move_hi_quad_<mode>): Use appropriate insn for BYTES_BIG_ENDIAN.
	(aarch64_combinez<mode>): Gate on BYTES_BIG_ENDIAN.
	(aarch64_combinez_be<mode>): New.
	(aarch64_combine<mode>): Convert to define_expand.
	(aarch64_combine_internal<mode>): New.
 	(aarch64_simd_combine<mode>): Remove bogus RTL description.

From-SVN: r212298

2014-07-04  Tom de Vries  <tom@codesourcery.com>

	* doc/md.texi (@subsection Constraint Modifier Characters): Clarify
	combination of earlyclobber and read/write modifiers.

From-SVN: r212297

2014-07-04  Tom de Vries  <tom@codesourcery.com>

	* config/aarch64/aarch64-simd.md
	(define_insn "vec_unpack_trunc_<mode>"): Fix constraint.

From-SVN: r212296

	PR target/61714
	* aarch64.h (OPTION_DEFAULT_SPECS): Define.

From-SVN: r212295

	PR middle-end/61654
	* cgraphunit.c (expand_thunk): Call free_dominance_info.

	* g++.dg/opt/pr61654.C: New test.

From-SVN: r212293

re PR tree-optimization/61684 (ICE at -Os and above on x86_64-linux-gnu in tree check: expected ssa_name, have addr_expr in recognize_single_bit_test, at tree-ssa-ifcombine.c:238)

	PR tree-optimization/61684
	* tree-ssa-ifcombine.c (recognize_single_bit_test): Make sure
	rhs1 of conversion is a SSA_NAME before using SSA_NAME_DEF_STMT on it.

	* gcc.c-torture/compile/pr61684.c: New test.

From-SVN: r212290

gcc/
	* config/nds32/nds32.c (nds32_have_prologue_p): Move to ...
	(nds32_symbol_load_store_p): Move to ...
	(nds32_fp_as_gp_check_available): Move to ...
	* config/nds32/nds32-fp-as-gp.c: ... here.
	* config/nds32/nds32-protos.h (nds32_symbol_load_store_p): Remove
	extern declaration.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212288

gcc/
	* config/nds32/nds32.c (nds32_expand_load_multiple): Move to ...
	(nds32_expand_store_multiple): Move to ...
	(nds32_expand_movmemqi): Move to ...
	* config/nds32/nds32-memory-manipulation.c: ... here.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212287

gcc/
	* config/nds32/nds32.c (nds32_byte_to_size): Move to ...
	(nds32_output_casesi_pc_relative): Move to ...
	(nds32_output_casesi): Move to ...
	(nds32_mem_format): Move to ...
	(nds32_output_16bit_store): Move to ...
	(nds32_output_16bit_load): Move to ...
	(nds32_output_32bit_store): Move to ...
	(nds32_output_32bit_load): Move to ...
	(nds32_output_32bit_load_s): Move to ...
	(nds32_output_stack_push): Move to ...
	(nds32_output_stack_pop): Move to ...
	* config/nds32/nds32-md-auxiliary.c: ... here.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212286

gcc/
	* config/nds32/nds32-pipelines-auxiliary.c: Add comment to describe
	the purpose of this file.

Co-Authored-By: Ling-Hua Tseng <uranus@tinlans.org>

From-SVN: r212285

gcc/
	* config/nds32/nds32.c (nds32_rtx_costs): Move implementation to ...
	(nds32_address_cost): Move implementation to ...
	* config/nds32/nds32-cost.c: ... here.
	* config/nds32/nds32-protos.h (nds32_rtx_costs_impl): Declare.
	(nds32_address_cost_impl): Declare.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212284

gcc/
	* config/nds32/nds32.c
	(nds32_consecutive_registers_load_store_p): Move to ...
	(nds32_valid_multiple_load_store): Move to ...
	(nds32_valid_stack_push_pop): Move to ...
	(nds32_can_use_bclr_p): Move to ...
	(nds32_can_use_bset_p): Move to ...
	(nds32_can_use_btgl_p): Move to ...
	(nds32_can_use_bitci_p): Move to ...
	* config/nds32/nds32-predicates.c: ... here.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212283

gcc/
	* config/nds32/nds32.c
	(nds32_expand_builtin_null_ftype_reg): Move to ...
	(nds32_expand_builtin_reg_ftype_imm): Move to ...
	(nds32_expand_builtin_null_ftype_reg_imm): Move to ...
	(nds32_init_builtins): Move implementation to ...
	(nds32_expand_builtin): Move implementation to ...
	* config/nds32/nds32-intrinsic.c: ... here.
	* config/nds32/nds32-protos.h (nds32_init_builtins_impl): Declare.
	(nds32_expand_builtin_impl): Declare.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212282

gcc/
	* config/nds32/nds32.c (nds32_emit_section_head_template): Move to ...
	(nds32_emit_section_tail_template): Move to ...
	(nds32_emit_isr_jmptbl_section): Move to ...
	(nds32_emit_isr_vector_section): Move to ...
	(nds32_emit_isr_reset_conten): Move to ...
	(nds32_check_isr_attrs_conflict): Move to ...
	(nds32_construct_isr_vectors_information): Move to ...
	(nds32_asm_file_start): Move implementation to ...
	(nds32_asm_file_end): Move implementation to ...
	* config/nds32/nds32-isr.c: ... here.
	* config/nds32/nds32-protos.h
	(nds32_check_isr_attrs_conflict): Declare.
	(nds32_construct_isr_vectors_information): Declare.
	(nds32_asm_file_start_for_isr): Declare.
	(nds32_asm_file_end_for_isr): Declare.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212281

that are going to be separated from nds32.c source.

gcc/
	* config.gcc (nds32*): Add new modules to extra_objs.
	(nds32le-*-*): Use t-nds32 makefile fragment for new modules.
	(nds32be-*-*): Likewise.
	* config/nds32/nds32-cost.c: New file.
	* config/nds32/nds32-fp-as-gp.c: New file.
	* config/nds32/nds32-intrinsic.c: New file.
	* config/nds32/nds32-isr.c: New file.
	* config/nds32/nds32-md-auxiliary.c: New file.
	* config/nds32/nds32-memory-manipulation.c: New file.
	* config/nds32/nds32-pipelines-auxiliary.c: New file.
	* config/nds32/nds32-predicates.c: New file.
	* config/nds32/t-nds32: New file.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212280

	gcc/testsuite/
	* lib/g++-dg.exp (g++-dg-runtest): Change interface to match
	dg-runtest's.  Adapt all callers.
	* lib/gcc-dg.exp (gcc-dg-runtest): Likewise.
	* lib/gfortran-dg.exp (gfortran-dg-runtest): Likewise.
	* lib/go-dg.exp (go-dg-runtest): Likewise.
	* lib/obj-c++-dg.exp (obj-c++-dg-runtest): Likewise.
	* lib/objc-dg.exp (objc-dg-runtest): Likewise.
	libffi/
	* testsuite/lib/libffi.exp (libffi-dg-runtest): Change interface
	match to dg-runtest's.

From-SVN: r212278

From-SVN: r212277

	PR tree-optimization/61682
	* wide-int.cc (wi::mul_internal): Handle high correctly
	for umul_ppmm using cases and when one of the operands is
	equal to 1.

	* gcc.c-torture/execute/pr61682.c: New test.

From-SVN: r212273

libgomp.exp (libgomp_target_compile): If $source matches regex $lang_source_re, add $lang_include_flags to options.

	* testsuite/lib/libgomp.exp (libgomp_target_compile): If $source
	matches regex $lang_source_re, add $lang_include_flags to options.
	* testsuite/libgomp.c/c.exp: Unset lang_include_flags.
	* testsuite/libgomp.c++/c++.exp: Likewise.
	* testsuite/libgomp.fortran/fortran.exp: Likewise.  Set lang_source_re
	and lang_include_flags instead of adding -fintrinsic-modules-path= to
	ALWAYS_CFLAGS.
	* testsuite/libgomp.graphite/graphite.exp: Unset lang_include_flags.

From-SVN: r212268

Firstly, it adds back the split conditions that I accidentally removed.
Without it the dot insns are never generated, or rather, always split
back to a separate compare instruction.

Secondly, the shift amount should be SI always, not GPR, or GCC will
insert a zero-extend at expand time that it cannot get rid of later.

The test tests whether dot-form instructions are generated for both
"dot" and "dot2" cases, that is, with just a CC output or also a GPR
output; for all four basic shifts, with a register amount or an
immediate amount.  It also tests for superfluous zero-extends.  This
also tests if combine "simplifies" the rotates to right-rotates, which
it shouldn't do anymore.

From-SVN: r212267

	libgomp/
	* testsuite/libgomp.fortran/fortran.exp: Explain
	gfortran-dg-runtest usage.

From-SVN: r212266

	* arm.md (arch): Add armv6_or_vfpv3.
	(arch_enabled): Add test for the above.
	* vfp.md (divsf_vfp, divdf_vfp): Add earlyclobber when code can run
	on VFP9.
	(sqrtsf_vfp, sqrtdf_vfp): Likewise.

From-SVN: r212265

	* gcov-io.c (gcov_read_words): Don't call memmove if excess is 0.
	* data-streamer-in.c (streamer_read_hwi): Shift UHWI 1 instead of
	HWI 1 and negate the unsigned value.
	* expmed.c (expand_sdiv_pow2): For modes wider than word always
	use AND instead of shift.
	* wide-int-print.cc (print_decs): Negate UHWI instead of HWI.
c-family/
	* c-ada-spec.c (dump_ada_nodes): Don't call qsort if 
	comments->count <= 1, as comments->entries might be NULL.

From-SVN: r212264

	* gfortran.dg/ieee/ieee_1.F90: Mark variables as volatile to
	avoid optimization.

From-SVN: r212261

	* doc/invoke.texi (-fsanitize=bounds): Tweak wording.
	(-fsanitize=float-divide-by-zero): Move to the table with
	-fsanitize=undefined suboptions.
	(-fsanitize=float-cast-overflow): Likewise.

From-SVN: r212260

rs6000.c (rs6000_adjust_atomic_subword): Use BYTES_BIG_ENDIAN rather than WORDS_BIG_ENDIAN to check for byte endianness.

	* config/rs6000/rs6000.c (rs6000_adjust_atomic_subword): Use
	BYTES_BIG_ENDIAN rather than WORDS_BIG_ENDIAN to check for byte
	endianness.

From-SVN: r212258

2014-07-03  Tobias Burnus  <burnus@net-b.de>

        * scanner.c (skip_free_comments): Fix indentation.

From-SVN: r212257

ChangeLog:
2014-07-03  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* loop-invariant.c (struct invariant): Add a new member: eqno;
	(find_identical_invariants): Update eqno;
	(create_new_invariant): Init eqno;
	(get_inv_cost): Compute comp_cost with eqno;


testsuite/ChangeLog:
2014-07-03  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* gcc.target/arm/identical-invariants.c: New test.

From-SVN: r212256

From-SVN: r212253

Many targets do not have both rotate and rotatert.  Of the 47 targets
in the tree, 17 have both, 9 have only rotate, 2 have only rotatert, and
19 have neither (this is based on "grep -wil" so it can be slightly off).

rs6000 has only rotate, and mips has only rotatert.  For such targets
simplifying rotate to rotatert and vice versa is not simplifying things
at all.  rs6000 has already way too many rotate patterns (some days it
seems like two thousand, but it is somewhat less in reality still); I
would prefer not to double that again.

So, this patch makes genrecog define HAVE_rotate and HAVE_rotatert if
those RTL codes are mentioned anywhere in the machine description, and
then does the transformation in simplify-rtx.c only if both these flags
are set.

From-SVN: r212239