1. 27 Mar, 2017 17 commits
    • * de.po, fr.po: Update. · e298b56a
      From-SVN: r246510
      Joseph Myers committed
    • re PR target/78543 (ICE in push_reload, at reload.c:1349 on powerpc64le-linux-gnu) · d89f355e
      [gcc]
      2017-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	PR target/78543
      	* config/rs6000/rs6000.md (bswaphi2_extenddi): Combine bswap
      	HImode and SImode with zero extend to DImode to one insn.
      	(bswap<mode>2_extenddi): Likewise.
      	(bswapsi2_extenddi): Likewise.
      	(bswaphi2_extendsi): Likewise.
      	(bswaphi2): Combine bswap HImode and SImode into one insn.
      	Separate memory insns from swapping register.
      	(bswapsi2): Likewise.
      	(bswap<mode>2): Likewise.
      	(bswaphi2_internal): Delete, no longer used.
      	(bswapsi2_internal): Likewise.
      	(bswap<mode>2_load): Split bswap HImode/SImode into separate load,
      	store, and gpr<-gpr swap insns.
      	(bswap<mode>2_store): Likewise.
      	(bswaphi2_reg): Register only splitter, combine with the splitter.
      	(bswaphi2 splitter): Likewise.
      	(bswapsi2_reg): Likewise.
      	(bswapsi2 splitter): Likewise.
      	(bswapdi2): If we have the LDBRX and STDBRX instructions, split
      	the insns into load, store, and register/register insns.
      	(bswapdi2_ldbrx): Likewise.
      	(bswapdi2_load): Likewise.
      	(bswapdi2_store): Likewise.
      	(bswapdi2_reg): Likewise.
      
      [gcc/testsuite]
      2017-03-27  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	PR target/78543
      	* gcc.target/powerpc/pr78543.c: New test.
      
      From-SVN: r246508
      Michael Meissner committed
    • list_read.c: Insert /* Fall through. · b6749273
      2017-03-27  Dominique d'Humieres  <dominiq@lps.ens.fr>
      
      	* io/list_read.c: Insert /* Fall through. */ in the macro
      	CASE_SEPARATORS in order to silence warnings.
      
      From-SVN: r246507
      Dominique d'Humieres committed
    • system.h (HAVE_DESIGNATED_INITIALIZERS): Fix non C++ case. · 34c66326
      	* system.h (HAVE_DESIGNATED_INITIALIZERS): Fix non C++ case.
      	(HAVE_DESIGNATED_UNION_INITIALIZERS): Likewise.
      
      From-SVN: r246506
      Gunther Nikl committed
    • re PR target/80103 (ICE in output_1144, at config/rs6000/vsx.md:2298) · 79c4d73b
      gcc/testsuite/ChangeLog:
      
      2017-03-27  Kelvin Nilsen  <kelvin@gcc.gnu.org>
      
      	PR target/80103
      	* gcc.target/powerpc/pr80103-1.c: New test.
      
      gcc/ChangeLog:
      
      2017-03-27  Kelvin Nilsen  <kelvin@gcc.gnu.org>
      
      	PR target/80103
      	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Edit and
      	add comments.
      	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
      	special handling for target option conflicts between dform
      	options (-mpower9-dform, -mpower9-dform-vector,
      	-mpower9-dform-scalar) and -mno-direct-move.
      
      From-SVN: r246505
      Kelvin Nilsen committed
    • cplus_demangle_fill_component: Handle DEMANGLE_COMPONENT_RVALUE_REFERENCE · 7a312bbd
      This patch almost a decade ago:
      
      ...
          2007-08-31  Douglas Gregor  <doug.gregor@gmail.com>
      
              * cp-demangle.c (d_dump): Handle
              DEMANGLE_COMPONENT_RVALUE_REFERENCE.
              (d_make_comp): Ditto.
      ...
      
      ... missed doing the same change to cplus_demangle_fill_component that
      was done to d_make_comp.  I.e., teach it to only validate that we're
      not passing in a "right" subtree.  GDB has recently (finally) learned
      about rvalue references, and a change to make it use
      cplus_demangle_fill_component more ran into an assertion because of
      this.
      
      (GDB is the only user of cplus_demangle_fill_component in both the gcc
      and binutils-gdb trees.)
      
      libiberty/ChangeLog:
      2017-03-27  Pedro Alves  <palves@redhat.com>
      
      	* cp-demint.c (cplus_demangle_fill_component): Handle
      	DEMANGLE_COMPONENT_RVALUE_REFERENCE.
      
      From-SVN: r246502
      Pedro Alves committed
    • re PR tree-optimization/80181 (ICE in set_lattice_value, at tree-ssa-ccp.c:505) · 819df781
      2017-03-27  Richard Biener  <rguenther@suse.de>
      
      	PR tree-optimization/80181
      	* tree-ssa-ccp.c (likely_value): UNDEFINED ^ X is UNDEFINED.
      
      	* gcc.dg/torture/pr80181.c: New testcase.
      
      From-SVN: r246500
      Richard Biener committed
    • [ARC] Fix move_double_src_operand predicate. · e5dcff3e
      Durring compilation process, (subreg (mem ...) ...) can occur. Hence,
      we need to check if the address of mem is a valid one. This patch is
      fixing this check by directly calling the address_operand, instead of
      calling move_double_src_operand, as the latter is always checking
      against the original mode, thus, returning false when the inner and
      outer modes are different.
      
      gcc/
      2017-03-27  Claudiu Zissulescu  <claziss@synopsys.com>
      
      	* config/arc/predicates.md (move_double_src_operand): Replace the
      	call to move_double_src_operand with a call to address_operand.
      
      From-SVN: r246499
      Claudiu Zissulescu committed
    • [ARC] Fix divdf3 emulation for arcem. · c4192ad7
      libgcc/
      2017-02-27  Claudiu Zissulescu  <claziss@synopsys.com>
      
      	* config/arc/ieee-754/divdf3.S (__divdf3): Use __ARCEM__.
      
      From-SVN: r246498
      Claudiu Zissulescu committed
    • [ARC] Disable TP register when building for bare metal. · 81b98ef7
      gcc/
      2017-03-27  Claudiu Zissulescu  <claziss@synopsys.com>
      
      	* config/arc/elf.h (ARGET_ARC_TP_REGNO_DEFAULT): Define.
      	* config/arc/linux.h (ARGET_ARC_TP_REGNO_DEFAULT): Likewise.
      	* config/arc/arc.opt (mtp-regno): Use ARGET_ARC_TP_REGNO_DEFAULT.
      
      From-SVN: r246497
      Claudiu Zissulescu committed
    • [ARC] Fix detection of long immediate for load/store operands. · ac255185
      ARC can use scaled offsets when loading (i.e. ld.as rA,[base,
      offset]).  Where base and offset can be a register or an immediate
      operand.  The scaling only applies on the offset part of the
      instruction.  The compiler can accept an address like this:
      
      (plus:SI (mult:SI (reg:SI 2 r2 [orig:596 _2129 ] [596])
      	          (const_int 4 [0x4]))
      	 (const_int 60 [0x3c]))
      
      Hence, to emit this instruction we place the (const_int 60) into base
      and the register into offset to take advantage of the scaled offset
      facility of the load instruction.  As a result the length of the load
      instruction is 8 bytes.  However, the long_immediate_loadstore_operand
      predicate used for calculating the length attribute doesn't recognize
      this address and returns a wrong decision leading to a wrong length
      computation for a load instruction using the above address.
      
      gcc/
      2017-03-27  Claudiu Zissulescu  <claziss@synopsys.com>
      
      	* config/arc/predicates.md (long_immediate_loadstore_operand):
      	Consider scaled addresses cases.
      
      From-SVN: r246496
      Claudiu Zissulescu committed
    • [ARC] Save/restore blink when in ISR. · 84804c5b
      gcc/
      2017-03-27  Claudiu Zissulescu  <claziss@synopsys.com>
      
      	* config/arc/arc.c (arc_epilogue_uses): BLINK should be also
      	restored when in interrupt.
      	* config/arc/arc.md (simple_return): ARCv2 rtie instruction
      	doesn't have delay slot.
      
      2017-03-27  Claudiu Zissulescu  <claziss@synopsys.com>
      
      	* testsuite/gcc.target/arc/interrupt-4.c: New file.
      
      From-SVN: r246495
      Claudiu Zissulescu committed
    • re PR ipa/79776 (ICE on valid code in insert_vi_for_tree, at tree-ssa-structalias.c:2807) · c5e5f5f6
      2017-03-27  Richard Biener  <rguenther@suse.de>
      
      	PR ipa/79776
      	* tree-ssa-structalias.c (associate_varinfo_to_alias): Skip
      	inlined thunk clones.
      
      	* g++.dg/ipa/pr79776.C: New testcase.
      
      From-SVN: r246494
      Richard Biener committed
    • re PR sanitizer/80168 (ICE in make_decl_rtl, at varasm.c:1311 w/ VLA and -fsanitize=address) · 7cd200f6
      	PR sanitizer/80168
      	* asan.c (instrument_derefs): Copy over last operand from
      	original COMPONENT_REF to the new COMPONENT_REF with
      	DECL_BIT_FIELD_REPRESENTATIVE.
      	* ubsan.c (instrument_object_size): Likewise.
      
      	* gcc.dg/asan/pr80168.c: New test.
      
      From-SVN: r246492
      Jakub Jelinek committed
    • re PR tree-optimization/80170 (SLP vectorization creates aligned access) · 79f512ff
      2017-03-27  Richard Biener  <rguenther@suse.de>
      
      	PR tree-optimization/80170
      	* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Make
      	sure DR/SCEV didnt fold in constants we do not see when looking
      	at the reference base alignment.
      
      	* gcc.dg/pr80170.c: New testcase.
      
      From-SVN: r246491
      Richard Biener committed
    • re PR tree-optimization/80171 (ICE (Segmentation fault) with optimization) · 672d9f8e
      2017-03-27  Richard Biener  <rguenther@suse.de>
      
      	PR middle-end/80171
      	* gimple-fold.c (fold_ctor_reference): Properly guard against
      	NULL return value from canonicalize_constructor_val.
      
      	* g++.dg/torture/pr80171.C: New testcase.
      
      From-SVN: r246490
      Richard Biener committed
    • Daily bump. · fbede6f9
      From-SVN: r246489
      GCC Administrator committed
  2. 26 Mar, 2017 4 commits
  3. 25 Mar, 2017 6 commits
    • re PR fortran/78881 ([F03] reading from string with DTIO procedure does not work properly) · 1f10d710
      2017-03-25  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
      
      	PR libgfortran/78881
      	* io/io.h (st_parameter_dt): Rename unused component last_char to
      	child_saved_iostat. Move comment to gfc_unit.
      	* io/list_read.c (list_formatted_read_scalar): After call to
      	child READ procedure, save the returned iostat value for later
      	check. (finish_list_read): Only finish READ if child_saved_iostat
      	was OK.
      	* io/transfer.c (read_sf_internal): If there is a saved character
      	in last character, seek back one. Add a new check for EOR
      	condition. (read_sf): If there is a saved character
      	in last character, seek back one. (formatted_transfer_scalar_read):
      	Initialize last character before invoking child procedure.
      	(data_transfer_init): If child dtio, set advance
      	status to nonadvancing. Move update of size and check for EOR
      	condition to before child dtio return.
      
      	* gfortran.dg/dtio_26.f90: New test.
      
      From-SVN: r246478
      Jerry DeLisle committed
    • re PR fortran/80156 (Generic DTIO interface reported missing if public statement… · 41036686
      re PR fortran/80156 (Generic DTIO interface reported missing if public statement preceeds the interface block)
      
      2017-03-25  Paul Thomas  <pault@gcc.gnu.org>
      
      	PR fortran/80156
      	PR fortran/79382
      	* decl.c (access_attr_decl): Remove the error for an absent
      	generic DTIO interface and ensure that symbol has the flavor
      	FL_PROCEDURE.
      
      2017-03-25  Paul Thomas  <pault@gcc.gnu.org>
      
      	PR fortran/80156
      	PR fortran/79382
      	* gfortran.dg/dtio_23.f90 : Remove the dg-error and add the
      	testcase for PR80156. Add a main programme that tests that
      	the typebound generic is accessible.
      
      From-SVN: r246476
      Paul Thomas committed
    • re PR target/80180 (Incorrect codegen from rdseed intrinsic use (CVE-2017-11671)) · 59ba4493
      	PR target/80180
      	* config/i386/i386.c (ix86_expand_builtin)
      	<IX86_BUILTIN_RDSEED{16,32,64}_STEP>: Do not expand arg0 between
      	flags reg setting and flags reg using instructions.
      	<IX86_BUILTIN_RDRAND{16,32,64}_STEP>: Ditto.  Use non-flags reg
      	clobbering instructions to zero extend op2.
      
      From-SVN: r246475
      Uros Bizjak committed
    • install.texi (Configuration): Update link to AIX ld. · 7d437dc1
      	* doc/install.texi (Configuration) <--with-aix-soname>:
      	Update link to AIX ld.
      
      From-SVN: r246474
      Gerald Pfeifer committed
    • re PR target/80160 (operand has impossible constraints) · 5da906ca
      	PR rtl-optimization/80160
      	PR rtl-optimization/80159
      	* lra-assigns.c (must_not_spill_p): Tighten new test to also take
      	reg_alternate_class into account.
      
      	* gcc.target/i386/pr80160.c: New test.
      
      From-SVN: r246473
      Bernd Schmidt committed
    • Daily bump. · 199855f6
      From-SVN: r246472
      GCC Administrator committed
  4. 24 Mar, 2017 13 commits
    • re PR target/79904 (ICE in annotate_constant_pool_refs, at config/s390/s390.c:7909) · 7dabefa0
      	PR sanitizer/79904
      	* gcc.dg/ubsan/pr79904-2.c: Add -Wno-psabi to dg-options.
      
      From-SVN: r246468
      Jakub Jelinek committed
    • re PR target/80148 (operand has impossible constraints) · fdcfea63
      2017-03-24  Vladimir Makarov  <vmakarov@redhat.com>
      
      	PR target/80148
      	* lra-assigns.c (assign_by_spills): Add spilled non-reload pseudos
      	to consider in curr_insn_transform.
      
      From-SVN: r246467
      Vladimir Makarov committed
    • PR c++/77339 - ICE with invalid use of alias template. · 90471a3d
      	* pt.c (lookup_template_class_1): Don't try to enter the scope of an
      	alias template.
      
      From-SVN: r246462
      Jason Merrill committed
    • re PR c++/80119 (-Wmaybe-uninitialized wrongly flags the body of a short-circuited if-clause) · c8b1fbc1
      	PR c++/80119
      	* cp-gimplify.c (cp_fold): Strip CLEANUP_POINT_EXPR if the expression
      	doesn't have side effects.
      
      	* g++.dg/warn/Wuninitialized-9.C: New test.
      
      From-SVN: r246461
      Marek Polacek committed
    • genrecog.c (validate_pattern): Add VEC_SELECT validation. · c4d5ab5d
      	* genrecog.c (validate_pattern): Add VEC_SELECT validation.
      	* genmodes.c (emit_min_insn_modes_c): Call emit_mode_nunits
      	and emit_mode_inner.
      
      From-SVN: r246460
      Jakub Jelinek committed
    • S/390: arch12: New builtins. · 76794c52
      This patch implements a set of low-level builtins for instruction
      which would otherwise not be emitted by the compiler plus a set of
      high-level builtins as defined by the IBM XL compiler.  The high-level
      builtins will be described in a future revision of the z/OS XL C/C++
      Programming Guide.
      
      I'll try to come up with a documentation appropriate for the GCC
      manual as well (sometimes in the future).
      
      gcc/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* config/s390/s390-builtins.def: Add VXE builtins.  Add a flags
      	argument to the overloaded builtin variants.  Use the new flag to
      	deprecate certain builtin variants.
      	* config/s390/s390-builtin-types.def: Add new builtin types.
      	* config/s390/s390-builtins.h: Support new flags field for
      	overloaded builtins.
      	* config/s390/s390-c.c (OB_DEF_VAR): New flags field.
      	(s390_macro_to_expand): Enable vector float data type.
      	(s390_cpu_cpp_builtins_internal): Indicate support of the new
      	builtins by incrementing the __VEC__ version number.
      	(s390_expand_overloaded_builtin): Support expansion of vec_xl and
      	vec_xst.
      	(s390_resolve_overloaded_builtin): Emit error messages depending
      	on the builtin flags.
      	* config/s390/s390.c (s390_expand_builtin): Support additional
      	flags argument.  Change error message to match the messages
      	emitted in s390-c.c.
      	* config/s390/s390.md: New UNSPEC_* constants.
      	(op_type): Add new instruction types.
      	* config/s390/vecintrin.h: Add new builtins and test data class
      	constants.
      	* config/s390/vx-builtins.md (V_HW_32_64): Add V4SF.
      	(V_HW_4, VEC_HW, VECF_HW): New mode iterators.
      	(VEC_INEXACT, VEC_NOINEXACT): New constants.
      	("vec_splats<mode>", "vec_insert<mode>", "vec_promote<mode>")
      	("vec_insert_and_zero<mode>", "vec_mergeh<mode>")
      	("vec_mergel<mode>"): V_HW -> VEC_HW.
      
      	("vlrlrv16qi", "vstrlrv16qi", "vbpermv16qi", "vec_msumv2di")
      	("vmslg", "*vftci<mode>_cconly", "vftci<mode>_intcconly")
      	("*vftci<mode>", "vftci<mode>_intcc", "vec_double_s64")
      	("vec_double_u64", "vfmin<mode>", "vfmax<mode>"): New definition.
      
      	("and_av2df3", "and_cv2df3", "vec_andc_av2df3")
      	("vec_andc_cv2df3", "xor_av2df3", "xor_cv2df3", "vec_nor_av2df3")
      	("vec_nor_cv2df3", "ior_av2df3", "ior_cv2df3", "vec_nabs")
      	("*vftcidb", "*vftcidb_cconly", "vftcidb"): Remove definition.
      
      	("vec_all_<fpcmpcc:code>v2df", "vec_any_<fpcmpcc:code>v2df")
      	("vec_scatter_elementv4si_DI", "vec_cmp<fpcmp:code>v2df")
      	("vec_di_to_df_s64", "vec_di_to_df_u64", "vec_df_to_di_u64")
      	("vfidb", "*vldeb", "*vledb", "*vec_cmp<insn_cmp>v2df_cconly")
      	("vec_cmpeqv2df_cc", "vec_cmpeqv2df_cc", "vec_cmphv2df_cc")
      	("vec_cmphev2df_cc", "*vec_cmpeqv2df_cc")
      	("*vec_cmphv2df_cc", "*vec_cmphev2df_cc"): Enable new modes as ...
      
      	("vec_all_<fpcmpcc:code><mode>", "vec_any_<fpcmpcc:code><mode>")
      	("vec_scatter_element<V_HW_4:mode>_DI")
      	("vec_cmp<fpcmp:code><mode>", "vcdgb", "vcdlgb", "vclgdb")
      	("vec_fpint<mode>", "vflls")
      	("vflrd", "*vec_cmp<insn_cmp><mode>_cconly", "vec_cmpeq<mode>_cc")
      	("vec_cmpeq<mode>_cc", "vec_cmph<mode>_cc", "vec_cmphe<mode>_cc")
      	("*vec_cmpeq<mode>_cc", "*vec_cmph<mode>_cc")
      	("*vec_cmphe<mode>_cc"): ... these.
      
      	("vec_ctd_s64", "vec_ctsl", "vec_ctul", "vec_st2f"): Use rounding
      	mode constant instead of magic value.
      
      gcc/testsuite/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* gcc.target/s390/target-attribute/tattr-3.c: Adjust error message
      	and remove the high-level builtin.  The error message for the
      	would prevent compilation from reaching the second.
      	* gcc.target/s390/target-attribute/tattr-4.c: Likewise.
      
      From-SVN: r246459
      Andreas Krebbel committed
    • S/390: arch12: Support new vector floating point modes. · 2de2b3f9
      This patch adds support for the new floating point vector elements (SF
      and TF) introduced with arch12.
      
      gcc/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* config/s390/s390.c (s390_expand_vec_compare): Support other
      	vector floating point modes than just V2DF.
      	(s390_expand_vcond): Likewise.
      	(s390_hard_regno_mode_ok): Allow SFmode values in VRs.
      	(s390_cannot_change_mode_class): Prevent mode changes between TF
      	and V1TF in vector registers.
      	* config/s390/s390.md (DF, SF): New mode attributes.
      	("*cmp<mode>_ccs", "add<mode>3", "sub<mode>3", "mul<mode>3")
      	("fma<mode>4", "fms<mode>4", "div<mode>3", "*neg<mode>2"): Add
      	SFmode support for VRs.
      	* config/s390/vector.md (V_HW, V_HW2, VT_HW, ti*, nonvec): Add new
      	vector fp modes.
      	(VFT, VF_HW): New mode iterators.
      	(vw, sdx): New mode attributes.
      	("addv2df3", "subv2df3", "mulv2df3", "divv2df3", "sqrtv2df2")
      	("fmav2df4","fmsv2df4", "negv2df2", "absv2df2", "*negabsv2df2")
      	("smaxv2df3", "sminv2df3", "*vec_cmp<VFCMP_HW_OP:code>v2df_nocc")
      	("vec_cmpuneqv2df", "vec_cmpltgtv2df", "vec_orderedv2df")
      	("vec_unorderedv2df"): Adjust the v2df only patterns to support
      	also the new vector floating point modes.  Renaming to ...
      
      	("add<mode>3", "sub<mode>3", "mul<mode>3", "div<mode>3")
      	("sqrt<mode>2", "fma<mode>4", "fms<mode>4", "neg<mode>2")
      	("abs<mode>2", "negabs<mode>2", "smax<mode>3")
      	("smin<mode>3", "*vec_cmp<VFCMP_HW_OP:code><mode>_nocc")
      	("vec_cmpuneq<mode>", "vec_cmpltgt<mode>", "vec_ordered<mode>")
      	("vec_unordered<mode>"): ... these.
      
      	("neg_fma<mode>4", "neg_fms<mode>4", "*smax<mode>3_vxe")
      	("*smin<mode>3_vxe", "*sminv2df3_vx", "*vec_extendv4sf")
      	("*vec_extendv2df"): New insn definitions.
      
      gcc/testsuite/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* gcc.target/s390/vxe/negfma-1.c: New test.
      
      From-SVN: r246458
      Andreas Krebbel committed
    • S/390: arch12: Support the mul/add/subtract · 7d2fd075
       instructions.
      
      gcc/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* config/s390/s390.md ("*adddi3_sign", "*subdi3_sign", "mulditi3")
      	("mulditi3_2", "*muldi3_sign"): New patterns.
      	("muldi3", "*muldi3", "mulsi3", "*mulsi3"): Add an expander and
      	rename the pattern definition.
      
      gcc/testsuite/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* gcc.target/s390/arch12/aghsghmgh-1.c: New test.
      	* gcc.target/s390/arch12/mul-1.c: New test.
      	* gcc.target/s390/arch12/mul-2.c: New test.
      
      From-SVN: r246457
      Andreas Krebbel committed
    • S/390: arch12: Add indirect branch pattern · 2841f550
      This adds support for the branch indirect instruction.
      
      gcc/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* config/s390/s390.md ("indirect_jump"): Turn insn definition into
      	expander.
      	("*indirect_jump", "*indirect2_jump"): New pattern definitions.
      
      From-SVN: r246456
      Andreas Krebbel committed
    • S/390: arch12: Add vllezlf instruction. · 72612e4e
      This adds support for the vector load element and zero instruction and
      makes sure it is used when initializing vectors with elements while
      setting the rest to 0.
      
      gcc/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* config/s390/s390.c (s390_expand_vec_init): Use vllezl
      	instruction if possible.
      	* config/s390/vector.md (vec_halfnumelts): New mode
      	attribute.
      	("*vec_vllezlf<mode>"): New pattern.
      
      gcc/testsuite/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* gcc.target/s390/vxe/vllezlf-1.c: New test.
      
      From-SVN: r246455
      Andreas Krebbel committed
    • S/390: arch12: New vector popcount variants · 6c7774d1
      arch12 provides pop count vector instructions for bigger elements than
      just chars.
      
      gcc/testsuite/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* gcc.target/s390/vxe/popcount-1.c: New test.
      
      gcc/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* config/s390/vector.md ("popcountv16qi2", "popcountv8hi2")
      	("popcountv4si2", "popcountv2di2"): Rename to ...
      	("popcount<mode>2", "popcountv8hi2_vx", "popcountv4si2_vx")
      	("popcountv2di2_vx"): ... these and add !TARGET_VXE to the
      	condition.
      	("popcount<mode>2_vxe"): New pattern.
      
      From-SVN: r246454
      Andreas Krebbel committed
    • S/390: arch12: Add support for new vector bit · 9ec98860
       operations.
      
      This patch adds support for the new bit operations introduced with
      arch12.
      
      The patch also renames the one complement pattern to the proper RTL
      standard name.
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* config/s390/s390.c (s390_rtx_costs): Return low costs for the
      	canonical form of ~AND to make sure the new instruction will be
      	used.
      	* config/s390/vector.md ("notand<mode>3", "ior_not<mode>3")
      	("notxor<mode>3"): Add new pattern definitions.
      	("*not<mode>"): Rename to ...
      	("one_cmpl<mode>2"): ... this.
      
      gcc/testsuite/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* gcc.target/s390/vxe/bitops-1.c: New test.
      
      From-SVN: r246453
      Andreas Krebbel committed
    • S/390: arch12: Add arch12 option. · 6654e96f
      This patch covers the mechanical work of making the new architecture
      option arch12 available wherever it will be needed later.
      
      gcc/testsuite/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* gcc.target/s390/s390.exp: Run tests in arch12 and vxe dirs.
      	* lib/target-supports.exp: Add effective target check s390_vxe.
      
      gcc/ChangeLog:
      
      2017-03-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
      
      	* common/config/s390/s390-common.c (processor_flags_table): Add
      	arch12.
      	* config.gcc: Add arch12.
      	* config/s390/driver-native.c (s390_host_detect_local_cpu):
      	Default to arch12 for unknown CPU model numbers.
      	* config/s390/s390-builtins.def: Add B_VXE builtin flag.
      	* config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Adjust
      	PROCESSOR_max sanity check.
      	* config/s390/s390-opts.h (enum processor_type): Add
      	PROCESSOR_ARCH12.
      	* config/s390/s390.c (processor_table): Add arch12.
      	(s390_expand_builtin): Add check for B_VXE flag.
      	(s390_issue_rate): Add PROCESSOR_ARCH12.
      	(s390_get_sched_attrmask): Likewise.
      	(s390_get_unit_mask): Likewise.
      	(s390_sched_score): Enable z13 scheduling for arch12.
      	(s390_sched_reorder): Likewise.
      	(s390_sched_variable_issue): Likewise.
      	* config/s390/s390.h (enum processor_flags): Add PF_ARCH12 and
      	PF_VXE.
      	(s390_tune_attr): Use z13 scheduling also for arch12.
      	(TARGET_CPU_ARCH12, TARGET_CPU_ARCH12_P, TARGET_CPU_VXE)
      	(TARGET_CPU_VXE_P, TARGET_ARCH12, TARGET_ARCH12_P, TARGET_VXE)
      	(TARGET_VXE_P): New macros.
      	* config/s390/s390.md: Add arch12 to cpu attribute.  Add arch12
      	and vxe to cpu_facility.  Add arch12 and vxe to enabled attribute.
      	* config/s390/s390.opt: Add arch12 as processor_type.
      
      From-SVN: r246452
      Andreas Krebbel committed