gcc/ChangeLog:

2015-05-20  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* defaults.h: Add default for STACK_PUSH_CODE.
	* expr.c: Don't redefine STACK_PUSH_CODE.
	* recog.c: Likewise.

From-SVN: r223515

gcc/c-family/ChangeLog:

2015-05-20  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* c-cppbuiltin.c (c_cpp_builtins): Use if instead of #if with
	STACK_GROWS_DOWNWARD.

gcc/ChangeLog:

2015-05-20  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* builtins.c, dwarf2cfi.c, explow.c, expr.c, recog.c,
	sched-deps.c: Use if instead of preprocessor checks with
	STACK_GROWS_DOWNWARD.

From-SVN: r223514

gcc/c-family/ChangeLog:

2015-05-20  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* c-cppbuiltin.c (c_cpp_builtins): Check the value of
	STACK_GROWS_DOWNWARD rather than if it is defined.

gcc/ChangeLog:

2015-05-20  Trevor Saunders  <tbsaunde+gcc@tbsaunde.org>

	* *.c: Check the value of STACK_GROWS_DOWNWARD rather than if it
	is defined.
	* config/**/*.h: Define STACK_GROWS_DOWNWARD to an integer.
	* defaults.h: Provide default for STACK_GROWS_DOWNWARD.
	* doc/tm.texi.in: Update references to STACK_GROWS_DOWNWARD.
	* doc/tm.texi: Regenerate.

From-SVN: r223513

From-SVN: r223512

2015-05-21  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/testsuite/
	* gcc.target/arm/simd/simd.exp: Skip all tests if no arm_neon_ok
	effective target support.  If no arm_neon_hw support, do not attempt
	to execute the tests; only compile them.
	* gcc.target/arm/simd/vextf32_1.c: Remove explicit "dg-do run"
	and "dg-require-effective-target arm_neon_ok".
	* gcc.target/arm/simd/vextp16_1.c: Likewise.
	* gcc.target/arm/simd/vextp64_1.c: Likewise.
	* gcc.target/arm/simd/vextp8_1.c: Likewise.
	* gcc.target/arm/simd/vextQf32_1.c: Likewise.
	* gcc.target/arm/simd/vextQp16_1.c: Likewise.
	* gcc.target/arm/simd/vextQp64_1.c: Likewise.
	* gcc.target/arm/simd/vextQp8_1.c: Likewise.
	* gcc.target/arm/simd/vextQs16_1.c: Likewise.
	* gcc.target/arm/simd/vextQs32_1.c: Likewise.
	* gcc.target/arm/simd/vextQs64_1.c: Likewise.
	* gcc.target/arm/simd/vextQs8_1.c: Likewise.
	* gcc.target/arm/simd/vextQu16_1.c: Likewise.
	* gcc.target/arm/simd/vextQu32_1.c: Likewise.
	* gcc.target/arm/simd/vextQu64_1.c: Likewise.
	* gcc.target/arm/simd/vextQu8_1.c: Likewise.
	* gcc.target/arm/simd/vexts16_1.c: Likewise.
	* gcc.target/arm/simd/vexts32_1.c: Likewise.
	* gcc.target/arm/simd/vexts64_1.c: Likewise.
	* gcc.target/arm/simd/vexts8_1.c: Likewise.
	* gcc.target/arm/simd/vextu16_1.c: Likewise.
	* gcc.target/arm/simd/vextu32_1.c: Likewise.
	* gcc.target/arm/simd/vextu64_1.c: Likewise.
	* gcc.target/arm/simd/vextu8_1.c: Likewise.
	* gcc.target/arm/simd/vrev16p8_1.c: Likewise.
	* gcc.target/arm/simd/vrev16qp8_1.c: Likewise.
	* gcc.target/arm/simd/vrev16qs8_1.c: Likewise.
	* gcc.target/arm/simd/vrev16qu8_1.c: Likewise.
	* gcc.target/arm/simd/vrev16s8_1.c: Likewise.
	* gcc.target/arm/simd/vrev16u8_1.c: Likewise.
	* gcc.target/arm/simd/vrev32p16_1.c: Likewise.
	* gcc.target/arm/simd/vrev32p8_1.c: Likewise.
	* gcc.target/arm/simd/vrev32qp16_1.c: Likewise.
	* gcc.target/arm/simd/vrev32qp8_1.c: Likewise.
	* gcc.target/arm/simd/vrev32qs16_1.c: Likewise.
	* gcc.target/arm/simd/vrev32qs8_1.c: Likewise.
	* gcc.target/arm/simd/vrev32qu16_1.c: Likewise.
	* gcc.target/arm/simd/vrev32qu8_1.c: Likewise.
	* gcc.target/arm/simd/vrev32s16_1.c: Likewise.
	* gcc.target/arm/simd/vrev32s8_1.c: Likewise.
	* gcc.target/arm/simd/vrev32u16_1.c: Likewise.
	* gcc.target/arm/simd/vrev32u8_1.c: Likewise.
	* gcc.target/arm/simd/vrev64f32_1.c: Likewise.
	* gcc.target/arm/simd/vrev64p16_1.c: Likewise.
	* gcc.target/arm/simd/vrev64p8_1.c: Likewise.
	* gcc.target/arm/simd/vrev64qf32_1.c: Likewise.
	* gcc.target/arm/simd/vrev64qp16_1.c: Likewise.
	* gcc.target/arm/simd/vrev64qp8_1.c: Likewise.
	* gcc.target/arm/simd/vrev64qs16_1.c: Likewise.
	* gcc.target/arm/simd/vrev64qs32_1.c: Likewise.
	* gcc.target/arm/simd/vrev64qs8_1.c: Likewise.
	* gcc.target/arm/simd/vrev64qu16_1.c: Likewise.
	* gcc.target/arm/simd/vrev64qu32_1.c: Likewise.
	* gcc.target/arm/simd/vrev64qu8_1.c: Likewise.
	* gcc.target/arm/simd/vrev64s16_1.c: Likewise.
	* gcc.target/arm/simd/vrev64s32_1.c: Likewise.
	* gcc.target/arm/simd/vrev64s8_1.c: Likewise.
	* gcc.target/arm/simd/vrev64u16_1.c: Likewise.
	* gcc.target/arm/simd/vrev64u32_1.c: Likewise.
	* gcc.target/arm/simd/vrev64u8_1.c: Likewise.
	* gcc.target/arm/simd/vtrnf32_1.c: Likewise.
	* gcc.target/arm/simd/vtrnp16_1.c: Likewise.
	* gcc.target/arm/simd/vtrnp8_1.c: Likewise.
	* gcc.target/arm/simd/vtrnqf32_1.c: Likewise.
	* gcc.target/arm/simd/vtrnqp16_1.c: Likewise.
	* gcc.target/arm/simd/vtrnqp8_1.c: Likewise.
	* gcc.target/arm/simd/vtrnqs16_1.c: Likewise.
	* gcc.target/arm/simd/vtrnqs32_1.c: Likewise.
	* gcc.target/arm/simd/vtrnqs8_1.c: Likewise.
	* gcc.target/arm/simd/vtrnqu16_1.c: Likewise.
	* gcc.target/arm/simd/vtrnqu32_1.c: Likewise.
	* gcc.target/arm/simd/vtrnqu8_1.c: Likewise.
	* gcc.target/arm/simd/vtrns16_1.c: Likewise.
	* gcc.target/arm/simd/vtrns32_1.c: Likewise.
	* gcc.target/arm/simd/vtrns8_1.c: Likewise.
	* gcc.target/arm/simd/vtrnu16_1.c: Likewise.
	* gcc.target/arm/simd/vtrnu32_1.c: Likewise.
	* gcc.target/arm/simd/vtrnu8_1.c: Likewise.
	* gcc.target/arm/simd/vuzpf32_1.c: Likewise.
	* gcc.target/arm/simd/vuzpp16_1.c: Likewise.
	* gcc.target/arm/simd/vuzpp8_1.c: Likewise.
	* gcc.target/arm/simd/vuzpqf32_1.c: Likewise.
	* gcc.target/arm/simd/vuzpqp16_1.c: Likewise.
	* gcc.target/arm/simd/vuzpqp8_1.c: Likewise.
	* gcc.target/arm/simd/vuzpqs16_1.c: Likewise.
	* gcc.target/arm/simd/vuzpqs32_1.c: Likewise.
	* gcc.target/arm/simd/vuzpqs8_1.c: Likewise.
	* gcc.target/arm/simd/vuzpqu16_1.c: Likewise.
	* gcc.target/arm/simd/vuzpqu32_1.c: Likewise.
	* gcc.target/arm/simd/vuzpqu8_1.c: Likewise.
	* gcc.target/arm/simd/vuzps16_1.c: Likewise.
	* gcc.target/arm/simd/vuzps32_1.c: Likewise.
	* gcc.target/arm/simd/vuzps8_1.c: Likewise.
	* gcc.target/arm/simd/vuzpu16_1.c: Likewise.
	* gcc.target/arm/simd/vuzpu32_1.c: Likewise.
	* gcc.target/arm/simd/vuzpu8_1.c: Likewise.
	* gcc.target/arm/simd/vzipf32_1.c: Likewise.
	* gcc.target/arm/simd/vzipp16_1.c: Likewise.
	* gcc.target/arm/simd/vzipp8_1.c: Likewise.
	* gcc.target/arm/simd/vzipqf32_1.c: Likewise.
	* gcc.target/arm/simd/vzipqp16_1.c: Likewise.
	* gcc.target/arm/simd/vzipqp8_1.c: Likewise.
	* gcc.target/arm/simd/vzipqs16_1.c: Likewise.
	* gcc.target/arm/simd/vzipqs32_1.c: Likewise.
	* gcc.target/arm/simd/vzipqs8_1.c: Likewise.
	* gcc.target/arm/simd/vzipqu16_1.c: Likewise.
	* gcc.target/arm/simd/vzipqu32_1.c: Likewise.
	* gcc.target/arm/simd/vzipqu8_1.c: Likewise.
	* gcc.target/arm/simd/vzips16_1.c: Likewise.
	* gcc.target/arm/simd/vzips32_1.c: Likewise.
	* gcc.target/arm/simd/vzips8_1.c: Likewise.
	* gcc.target/arm/simd/vzipu16_1.c: Likewise.
	* gcc.target/arm/simd/vzipu32_1.c: Likewise.
	* gcc.target/arm/simd/vzipu8_1.c: Likewise.

From-SVN: r223508

2015-05-21  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/testsuite/
	* gcc.dg/vect/bb-slp-pr65935.c: Remove explicit "dg-do run".
	* gcc.dg/vect/pr59354.c: Likewise.
	* gcc.dg/vect/pr64252.c: Likewise.
	* gcc.dg/vect/pr64404.c: Likewise.
	* gcc.dg/vect/pr64493.c: Likewise.
	* gcc.dg/vect/pr64495.c: Likewise.
	* gcc.dg/vect/pr64844.c: Likewise.
	* gcc.dg/vect/pr65518.c: Likewise.
	* gcc.dg/vect/vect-aggressive-1.c: Likewise.

From-SVN: r223507

2015-05-21  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/66210
	* g++.dg/cpp1y/var-templ28.C: New.

From-SVN: r223506

X32 doesn't support indirect branch via 32-bit memory slot since
indirect branch will load 64-bit address from 64-bit memory slot.
Since x32 GOT slot is 64-bit, we should allow indirect branch via GOT
slot for x32.

gcc/

	PR target/66232
	* config/i386/constraints.md (Bg): New constraint for GOT memory
	operand.
	* config/i386/i386.md (*call_got_x32): New pattern.
	(*call_value_got_x32): Likewise.
	* config/i386/predicates.md (GOT_memory_operand): New predicate.

gcc/testsuite/

	PR target/66232
	* gcc.target/i386/pr66232-1.c: New test.
	* gcc.target/i386/pr66232-2.c: Likewise.
	* gcc.target/i386/pr66232-3.c: Likewise.
	* gcc.target/i386/pr66232-4.c: Likewise.
	* gcc.target/i386/pr66232-5.c: Likewise.

From-SVN: r223505

	cp/
	PR c++/60943
	* decl2.c (change_return_type): Propagate FUNCTION_REF_QUALIFIED.

	testsuite/
	* g++.dg/cpp1y/pr60943.C: New.

From-SVN: r223502

	PR tree-optimization/66233
	* match.pd (ocvt (icvt@1 @0)): Don't handle vector types.
	Simplify.

	* gcc.c-torture/execute/pr66233.c: New test.

From-SVN: r223500

2015-05-21  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/66176
	* frontend-passes.c (check_conjg_variable):  New function.
	(inline_matmul_assign):  Use it to keep track of conjugated
	variables.

2015-05-21  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/66176
	* gfortran.dg/inline_matmul_11.f90:  New test

From-SVN: r223499

2015-05-21  Andreas Tobler  <andreast@gcc.gnu.org>

    * gcc.target/i386/pr32219-1.c: Use 'dg-require-effective-target pie'
    instead of listing several targets on its own.
    * gcc.target/i386/pr32219-2.c: Likewise.
    * gcc.target/i386/pr32219-3.c: Likewise.
    * gcc.target/i386/pr32219-4.c: Likewise.
    * gcc.target/i386/pr32219-5.c: Likewise.
    * gcc.target/i386/pr32219-6.c: Likewise
    * gcc.target/i386/pr32219-7.c: Likewise.
    * gcc.target/i386/pr32219-8.c: Likewise.
    * gcc.target/i386/pr39013-1.c: Likewise.
    * gcc.target/i386/pr39013-2.c: Likewise.
    * gcc.target/i386/pr64317.c: Likewise.

From-SVN: r223498

	* inclhack.def (aix_externc): New fix.
	(aix_externcpp[12]): New fix.
	* fixincl.x: Regenerate.
	* test/base/ctype.h [AIX_EXTERNC_CHECK]: New test.
	* test/base/sys/socket.h [AIX_EXTERNCPP[12]_CHECK]: New test.
	* test/base/fcntl.h: New file.

From-SVN: r223497

        PR target/66224
        * config/cpu/powerpc/atomic_word.h (_GLIBCXX_READ_MEM_BARRIER):
        Don't use isync. Use lwsync if available.
        * configure.host (atomic_word_dir) [aix[56789]*]: Delete to use
        powerpc cpu definition.

From-SVN: r223496

	* config/pa/pa.md (add-with-constant splitter): Use ASHIFT rather
	than MULT for shadd sequences.

	* gcc.target/hppa/shadd-4.c: New test.

From-SVN: r223495

Revert:
       * configure.ac: Add -std=c++98 to stage1_cxxflags.
       * Makefile.tpl (STAGE1_CXXFLAGS): And substitute it.
       * Makefile.in, configure: Regenerate.

From-SVN: r223494

	* alias.c (alias_stats): New static var.	
	(alias_sets_conflict_p, alias_sets_must_conflict_p): Update stats.
	(dump_alias_stats_in_alias_c): New function.
	* alias.h (dump_alias_stats_in_alias_c): Declare.
	* tree-ssa-alias.c (dump_alias_stats): Call it.

From-SVN: r223491

the rationale.

Bootstrapped/regtested on x86_64-linux, applying to trunk.

2015-05-21  Marek Polacek  <polacek@redhat.com>

	* c-typeck.c (inform_declaration): Use DECL_IS_BUILTIN instead of
	DECL_BUILT_IN.

diff --git gcc/c/c-typeck.c gcc/c/c-typeck.c
index ba8797b..f55d4c6 100644
--- gcc/c/c-typeck.c
+++ gcc/c/c-typeck.c
@@ -2853,9 +2853,10 @@ build_function_call (location_t loc, tree function, tree params)
 
 /* Give a note about the location of the declaration of DECL.  */
 
-static void inform_declaration (tree decl)
+static void
+inform_declaration (tree decl)
 {
-  if (decl && (TREE_CODE (decl) != FUNCTION_DECL || !DECL_BUILT_IN (decl)))
+  if (decl && (TREE_CODE (decl) != FUNCTION_DECL || !DECL_IS_BUILTIN (decl)))
     inform (DECL_SOURCE_LOCATION (decl), "declared here");
 }

From-SVN: r223490

From-SVN: r223489

	* libsupc++/del_opv.cc: Suppress -Wsized-deallocation.
	* libsupc++/del_op.cc: Likewise.

From-SVN: r223488

	* configure.ac: Add -std=c++98 to stage1_cxxflags.
	* Makefile.tpl (STAGE1_CXXFLAGS): And substitute it.
	* Makefile.in, configure: Regenerate.

From-SVN: r223487

	* tree-vectorizer.h (struct _stmt_vec_info): Rename stride_load_p
	to strided_p.
	(STMT_VINFO_STRIDE_LOAD_P): Rename to ...
	(STMT_VINFO_STRIDED_P): ... this.
	* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Adjust.
	(vect_verify_datarefs_alignment): Likewise.
	(vect_enhance_data_refs_alignment): Likewise.
	(vect_analyze_data_ref_access): Likewise.
	(vect_analyze_data_refs): Accept strided stores.
	* tree-vect-stmts.c (vect_model_store_cost): Count strided stores.
	(vect_model_load_cost): Adjust for macro rename.
	(vectorizable_mask_load_store): Likewise.
	(vectorizable_load): Likewise.
	(vectorizable_store): Open code strided stores.

testsuite/
	* gcc.dg/vect/vect-strided-store.c: New test.
	* gfortran.dg/vect/fast-math-pr37021.f90: Adjust.
	* gfortran.dg/vect/fast-math-rnflow-trs2a2.f90: Adjust.

From-SVN: r223486

	* lib/target-supports.exp (check_effective_target_sqrt_insn): New check.
	* gcc.dg/pow-sqrt-synth-1.c: New test.
	* gcc.target/aarch64/pow-sqrt-synth-1.c: Delete.

	* doc/sourcebuild.texi (7.2.3.9 Other hardware attributes):
	Document sqrt_insn.

From-SVN: r223485

2015-05-21  Hristian Kirtchev  <kirtchev@adacore.com>

	* einfo.adb (Contract): This attribute now applies to constants.
	(Set_Contract): This attribute now applies to constants.
	(Write_Field34_Name): Add output for constants.
	* einfo.ads Attribute Contract now applies to constants.
	* sem_ch3.adb (Analyze_Object_Contract): Constants now have
	their Part_Of indicator verified.
	* sem_prag.adb (Analyze_Constituent): A constant is now a valid
	constituent.
	(Analyze_Global_Item): A constant cannot act as an output.
	(Analyze_Initialization_Item): Constants are now a valid
	initialization item.
	(Analyze_Initializes_In_Decl_Part): Rename
	global variable States_And_Vars to States_And_Objs and update
	all its occurrences.
	(Analyze_Input_Item): Constants are now a
	valid initialization item. Remove SPARM RM references from error
	messages.
	(Analyze_Pragma): Indicator Part_Of can now apply to a constant.
	(Collect_Body_States): Collect both source constants
	and variables.
	(Collect_States_And_Objects): Collect both source constants and
	variables.
	(Collect_States_And_Variables): Rename
	to Collect_States_And_Objects and update all its occurrences.
	(Collect_Visible_States): Do not collect constants and variables
	used to map generic formals to actuals.
	(Find_Role): The role of a constant is that of an input. Separate the
	role of a variable from that of a constant.
	(Report_Unused_Constituents): Add specialized wording for constants.
	(Report_Unused_States): Add specialized wording for constants.
	* sem_util.adb (Add_Contract_Item): Add processing for constants.
	* sem_util.ads (Add_Contract_Item): Update the comment on usage.
	(Find_Placement_In_State_Space): Update the comment on usage.

From-SVN: r223484

2015-05-21  Richard Biener  <rguenther@suse.de>

	PR c++/66211
	* match.pd: Guard pattern optimzing (int)(float)int
	conversions to apply only on GIMPLE.

	* g++.dg/conversion/pr66211.C: New testcase.
	* gcc.dg/tree-ssa/forwprop-18.c: Adjust.

From-SVN: r223483

2015-05-21  Ed Schonberg  <schonberg@adacore.com>

	* sem_ch5.adb: minor reformatting.

2015-05-21  Robert Dewar  <dewar@adacore.com>

	* freeze.adb (Freeze_Entity): Properly tag -gnatw.z messages.

From-SVN: r223482

combine.c (find_split_point): Handle ASHIFT like MULT to encourage multiply-accumulate/shift-add insn generation.

	* combine.c (find_split_point): Handle ASHIFT like MULT to encourage
	multiply-accumulate/shift-add insn generation.

	* gcc.target/hppa/shadd-2.c: New test.

From-SVN: r223481

2015-05-20  Jeff Law  <law@redhat.com>

	* config/pa/pa.c (pa_print_operand): New 'o' output modifier.
	(pa_mem_shadd_constant_p): Renamed from pa_shadd_constant_p.
	(pa_shadd_constant_p): Allow constants for shadd insns rather
	than valid scaling constants for memory addresses.
	* config/pa/pa-protos.h (pa_mem_shadd_constant_p): Add prototype.
	* config/pa/predicates.md (mem_shadd_operand): New predicate.
	* config/pa/pa.md (shift-add insns using MULT): Use mem_shadd_operand.
	(shift-add insns using ASHIFT): New patterns.

	* gcc.target/hppa/hppa.exp: New target test driver.
	* gcc.target/hppa/shadd-1.c: New test.

From-SVN: r223480

gcc/
	PR target/54236
	* config/sh/sh.md (*round_int_even): Reject pattern if operands[0] and
	operands[1] are the same.

gcc/testsuite/
	PR target/54236
	* gcc.target/sh/pr54236-2.c: Fix typo in comment.

From-SVN: r223479

2015-05-21  Robert Dewar  <dewar@adacore.com>

	* freeze.adb: Minor reformatting.
	* cstand.adb (Print_Standard): Fix bad printing of Duration
	low bound.
	* a-reatim.adb (Time_Of): Complete rewrite to properly detect
	out of range args.

2015-05-21  Ed Schonberg  <schonberg@adacore.com>

	* sem_ch5.adb: add (useless) initial value.
	* sem_ch3.adb (Replace_Anonymous_Access_To_Protected_Subprogram):
	Check whether the procedure has parameters before processing
	formals in ASIS mode.

From-SVN: r223477

From-SVN: r223476

sem_ch13.adb (Check_Iterator_Functions): Emit error on Iterator aspect as well when indexing function is illegal.

2015-05-21  Ed Schonberg  <schonberg@adacore.com>

	* sem_ch13.adb (Check_Iterator_Functions): Emit error on Iterator
	aspect as well when indexing function is illegal.
	(Valid_Default_Iterator): Handle properly somme illegal cases
	to prevent compilation abandoned messages.
	(Check_Primitive_Function): Verify that type and indexing function
	are in the same scope.
	* freeze.adb (Freeze_Record): Extend patch on the presence of
	indexing aspects to aspect Default_Iterator.

From-SVN: r223475

Fix PR target/26702

For Kwok Cheung Yeung.

From-SVN: r223473

gcc/

	PR middle-end/66221
	* ipa-chkp.c (chkp_copy_function_type_adding_bounds): Use
	build_distinct_type_copy to copy bounds.

gcc/testsuite/

	PR middle-end/66221
	* gcc.dg/lto/pr66221_0.c: New test.
	* gcc.dg/lto/pr66221_1.c: New test.

From-SVN: r223471

gcc/testsuite/ChangeLog:

2015-05-21  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	PR c/52952
	* gcc.dg/redecl-4.c: Update column numbers.
	* gcc.dg/format/bitfld-1.c: Likewise.
	* gcc.dg/format/attr-2.c: Likewise.
	* gcc.dg/format/attr-6.c: Likewise.
	* gcc.dg/format/attr-7.c (baz): Likewise.
	* gcc.dg/format/asm_fprintf-1.c: Likewise.
	* gcc.dg/format/attr-4.c: Likewise.
	* gcc.dg/format/branch-1.c: Likewise.
	* gcc.dg/format/c90-printf-1.c: Likewise. Add tests for column
	locations within strings with embedded escape sequences.

gcc/c-family/ChangeLog:

2015-05-21  Manuel López-Ibáñez  <manu@gcc.gnu.org>
	
	PR c/52952
	* c-format.c (location_column_from_byte_offset): New.
	(location_from_offset): New.
	(struct format_wanted_type): Add offset_loc field.
	(check_format_info): Move handling of location for extra arguments
	closer to the point of warning.
	(check_format_info_main): Pass the result of location_from_offset
	to warning_at.
	(format_type_warning): Pass the result of location_from_offset
	to warning_at.

From-SVN: r223470

    g++-4.6 [...] [...]/gcc/genrecog.c
    [...]/gcc/genrecog.c: In function 'state_size find_subroutines(routine_type, state*, vec<state*>&)':
    [...]/gcc/genrecog.c:3338:35: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    [...]/gcc/genrecog.c:3347:37: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    [...]/gcc/genrecog.c:3359:29: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
    [...]/gcc/genrecog.c:3365:32: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]

    3305   state_size size;
         [...]
    3337           state_size to_size = find_subroutines (type, trans->to, procs);
    3338           if (d->next && to_size.depth > MAX_DEPTH)
         [...]
    3347               if (to_size.num_statements < MIN_NUM_STATEMENTS)
         [...]
    3359   if (size.num_statements > MAX_NUM_STATEMENTS)
         [...]
    3365              && size.num_statements > MAX_NUM_STATEMENTS)

     175 static const int MAX_DEPTH = 6;
         [...]
     179 static const int MIN_NUM_STATEMENTS = 5;
         [...]
     185 static const int MAX_NUM_STATEMENTS = 200;
         [...]
    3258 struct state_size
    3259 {
         [...]
    3261   unsigned int num_statements;
         [...]
    3265   unsigned int depth;
    3266 };

	gcc/
	* genrecog.c (MAX_DEPTH, MIN_NUM_STATEMENTS, MAX_NUM_STATEMENTS):
	Change to unsigned int.

From-SVN: r223469

From-SVN: r223468

re PR libgcc/66225 (libgcc/config/rs6000/morecore.S will not build on systems with an older assembler)

	PR libgcc/66225
	* config/rs6000/morestack.S: Remove ".abiversion 1".

From-SVN: r223464

	* pt.c (tsubst_decl) [VAR_DECL]: SET_DECL_IMPLICIT_INSTANTIATION
	before register_specialization.

From-SVN: r223461

	* decl.c (grok_op_properties): Don't complain about size_t
	placement delete here.
	* call.c (second_parm_is_size_t): Split out from...
	(non_placement_deallocation_fn_p): ...here.
	(build_op_delete_call): Warn about size_t placement delete with
	-Wc++14-compat.

From-SVN: r223460