* acinclude.m4 (gcc_AC_INITFINI_ARRAY): Don't require
	gcc_SUN_LD_VERSION.
	(gcc_GAS_CHECK_FEATURE): Remove.
	* configure.ac (ld_vers) <*-*-solaris2*>: Move comments from
	gcc_AC_INITFINI_ARRAY here.  Update for Solaris 11.4 changes.
	* configure: Regenerate.

From-SVN: r254340

gcc/
2017-11-02  Claudiu Zissulescu <claziss@synopsys.com>

	    * config/arc/arc.c (hwloop_optimize): Account for empty
	    body loops.

testsuite/
2017-11-02  Claudiu Zissulescu <claziss@synopsys.com>

 	    * gcc.target/arc/loop-1.c: Add test.

From-SVN: r254339

2017-11-02  Tom de Vries  <tom@codesourcery.com>

	PR testsuite/82415
	* gcc.target/i386/naked-1.c: Make scan patterns more precise.
	* gcc.target/i386/naked-2.c: Same.

From-SVN: r254338

2017-11-02  Richard Biener  <rguenther@suse.de>

	PR middle-end/82765
	* varasm.c (decode_addr_const): Make offset HOST_WIDE_INT.
	Truncate ARRAY_REF index and element size.

	* gcc.dg/pr82765.c: New testcase.

From-SVN: r254337

2017-11-02  Tom de Vries  <tom@codesourcery.com>

	* gfortran.dg/implied_do_io_1.f90: Fix scan-tree-dump-times pattern.

From-SVN: r254336

From-SVN: r254334

gcc/ChangeLog

2017-11-01  Palmer Dabbelt  <palmer@dabbelt.com>

	* doc/invoke.texi (RISC-V Options): Use "@minus{}2 GB", not "-2 GB".

From-SVN: r254331

	* tree-ssa-ccp.c (ccp_folder): New class derived from
	substitute_and_fold_engine.
	(ccp_folder::get_value): New member function.
	(ccp_folder::fold_stmt): Renamed from ccp_fold_stmt.
	(ccp_fold_stmt): Remove prototype.
	(ccp_finalize): Call substitute_and_fold from the ccp_class.
	* tree-ssa-copy.c (copy_folder): New class derived from
	substitute_and_fold_engine.
	(copy_folder::get_value): Renamed from get_value.
	(fini_copy_prop): Call substitute_and_fold from copy_folder class.
	* tree-vrp.c (vrp_folder): New class derived from
	substitute_and_fold_engine.
	(vrp_folder::fold_stmt): Renamed from vrp_fold_stmt.
	(vrp_folder::get_value): New member function.
	(vrp_finalize): Call substitute_and_fold from vrp_folder class.
	(evrp_dom_walker::before_dom_children): Similarly for replace_uses_in.
	* tree-ssa-propagate.h (substitute_and_fold_engine): New class to
	provide a class interface to folder/substitute routines.
	(ssa_prop_fold_stmt_fn): Remove typedef.
	(ssa_prop_get_value_fn): Likewise.
	(subsitute_and_fold): Remove prototype.
	(replace_uses_in): Likewise.
	* tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
	Renamed from replace_uses_in.  Call the virtual member function
	(substitute_and_fold_engine::replace_phi_args_in): Similarly.
	(substitute_and_fold_dom_walker): Remove initialization of
	data member entries for calbacks.  Add substitute_and_fold_engine
	member and initialize it.
	(substitute_and_fold_dom_walker::before_dom_children0: Use the
	member functions for get_value, replace_phi_args_in c
	replace_uses_in, and fold_stmt calls.
	(substitute_and_fold_engine::substitute_and_fold): Renamed from
	substitute_and_fold.  Remove assert.   Update ctor call.

From-SVN: r254330

	* tree-ssa-propagate.h (ssa_prop_visit_stmt_fn): Remove typedef.
	(ssa_prop_visit_phi_fn): Likewise.
	(class ssa_propagation_engine): New class to provide an interface
	into ssa_propagate.
	* tree-ssa-propagate.c (ssa_prop_visit_stmt): Remove file scoped
	variable.
	(ssa_prop_visit_phi): Likewise.
	(ssa_propagation_engine::simulate_stmt): Moved into class.
	Call visit_phi/visit_stmt from the class rather than via
	file scoped static variables.
	(ssa_propagation_engine::simulate_block): Moved into class.
	(ssa_propagation_engine::process_ssa_edge_worklist): Similarly.
	(ssa_propagation_engine::ssa_propagate): Similarly.  No longer
	set file scoped statics for the visit_stmt/visit_phi callbacks.
	* tree-complex.c (complex_propagate): New class derived from
	ssa_propagation_engine.
	(complex_propagate::visit_stmt): Renamed from complex_visit_stmt.
	(complex_propagate::visit_phi): Renamed from complex_visit_phi.
	(tree_lower_complex): Call ssa_propagate via the complex_propagate
	class.
	* tree-ssa-ccp.c: (ccp_propagate): New class derived from
	ssa_propagation_engine.
	(ccp_propagate::visit_phi): Renamed from ccp_visit_phi_node.
	(ccp_propagate::visit_stmt): Renamed from ccp_visit_stmt.
	(do_ssa_ccp): Call ssa_propagate from the ccp_propagate class.
	* tree-ssa-copy.c (copy_prop): New class derived from
	ssa_propagation_engine.
	(copy_prop::visit_stmt): Renamed from copy_prop_visit_stmt.
	(copy_prop::visit_phi): Renamed from copy_prop_visit_phi_node.
	(execute_copy_prop): Call ssa_propagate from the copy_prop class.
	* tree-vrp.c (vrp_prop): New class derived from ssa_propagation_engine.
	(vrp_prop::visit_stmt): Renamed from vrp_visit_stmt.
	(vrp_prop::visit_phi): Renamed from vrp_visit_phi_node.
	(execute_vrp): Call ssa_propagate from the vrp_prop class.

From-SVN: r254329

	PR rtl-optimization/82778
	PR rtl-optimization/82597
	* compare-elim.c (struct comparison): Add in_a_setter field.
	(find_comparison_dom_walker::before_dom_children): Remove killed
	bitmap and df_simulate_find_defs call, instead walk the defs.
	Compute last_setter and initialize in_a_setter.  Merge definitions
	with first initialization for a few variables.
	(try_validate_parallel): Use insn_invalid_p instead of
	recog_memoized.  Return insn rather than just the pattern.
	(try_merge_compare): Fix up comment.  Don't uselessly test if
	in_a is a REG_P.  Use cmp->in_a_setter instead of walking UD
	chains.
	(execute_compare_elim_after_reload): Remove df_chain_add_problem
	call.

	* g++.dg/opt/pr82778.C: New test.

2017-11-01  Michael Collison  <michael.collison@arm.com>

	PR rtl-optimization/82597
	* gcc.dg/pr82597.c: New test.

From-SVN: r254328

aarch64_rtx_costs uses the number of registers in a mode as the basis
of SET costs.  This patch makes it get the number of registers from
aarch64_hard_regno_nregs rather than repeating the calcalation inline.
Handling SVE modes in aarch64_hard_regno_nregs is then enough to get
the correct SET cost as well.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_rtx_costs): Use
	aarch64_hard_regno_nregs to get the number of registers
	in a mode.

Reviewed-By: James Greenhalgh  <james.greenhalgh@arm.com>

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254327

The SVE port uses the public constraints "Upl" and "Upa" to mean
"low predicate register" and "any predicate register" respectively.
"Upl" was already used as an internal-only constraint by the
addition patterns, so this patch renames it to "Uaa" ("two adds
needed").

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* config/aarch64/constraints.md (Upl): Rename to...
	(Uaa): ...this.
	* config/aarch64/aarch64.md
	(*zero_extend<SHORT:mode><GPI:mode>2_aarch64, *addsi3_aarch64_uxtw):
	Update accordingly.

Reviewed-By: James Greenhalgh  <james.greenhalgh@arm.com>

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254326

This patch simply moves code around, in order to make the later
patches easier to read, and to avoid forward declarations.
It doesn't add the missing function comments because the interfaces
will change in a later patch.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_add_constant_internal)
	(aarch64_add_constant, aarch64_add_sp, aarch64_sub_sp): Move
	earlier in file.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254325

This patch replaces switch statements that call specific generator
functions with code that constructs the rtl pattern directly.
This seemed to scale better to SVE and also seems less error-prone.

As a side-effect, the patch fixes the REV handling for diff==1,
vmode==E_V4HFmode and adds missing support for diff==3,
vmode==E_V4HFmode.

To compensate for the lack of switches that check for specific modes,
the patch makes aarch64_expand_vec_perm_const_1 reject permutes on
single-element vectors (specifically V1DImode).

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_evpc_trn, aarch64_evpc_uzp)
	(aarch64_evpc_zip, aarch64_evpc_ext, aarch64_evpc_rev)
	(aarch64_evpc_dup): Generate rtl direcly, rather than using
	named expanders.
	(aarch64_expand_vec_perm_const_1): Explicitly check for permutes
	of a single element.
	* config/aarch64/iterators.md: Add a comment above the permute
	unspecs to say that they are generated directly by
	aarch64_expand_vec_perm_const.
	* config/aarch64/aarch64-simd.md: Likewise the permute instructions.

Reviewed-by: James Greenhalgh <james.greenhalgh@arm.com>

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254324

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00037.html
	* tree-dump.c (dequeue_and_dump): Use HAS_DECL_ASSEMBLER_NAME_P.

From-SVN: r254323

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00031.html
	* cp-tree.h (enum cp_identifier_kind): Delete cik_newdel_op.
	Renumber and reserve udlit value.
	(IDENTIFIER_NEWDEL_OP): Delete.
	(IDENTIFIER_OVL_OP): New.
	(IDENTIFIER_ASSIGN_OP): Adjust.
	(IDENTIFIER_CONV_OP): Adjust.
	(IDENTIFIER_OVL_OP_INFO): Adjust.
	(IDENTIFIER_OVL_OP_FLAGS): New.
	* decl.c (grokdeclarator): Use IDENTIFIER_OVL_OP_FLAGS.
	* lex.c (get_identifier_kind_name): Adjust.
	(init_operators): Don't special case new/delete ops.
	* mangle.c (write_unqualified_id): Use IDENTIFIER_OVL_OP.
	* pt.c (push_template_decl_real): Use IDENTIFIER_OVL_OP_FLAGS.
	* typeck.c (check_return_expr): Likewise.

From-SVN: r254322

This documentation is patterned off the aarch64 -mcmodel documentation.

gcc/ChangeLog:

2017-11-01  Palmer Dabbelt  <palmer@dabbelt.com>

        * doc/invoke.texi (RISC-V Options): Explicitly name the medlow
        and medany code models, and describe what they do.

From-SVN: r254321

printers.py (StdExpAnyPrinter.__init__): Strip typename versioned namespace before the substitution.

2017-11-01  François Dumont  <fdumont@gcc.gnu.org>

	* python/libstdcxx/v6/printers.py (StdExpAnyPrinter.__init__): Strip
	typename versioned namespace before the substitution.
	(StdExpOptionalPrinter.__init__): Likewise.
	(StdVariantPrinter.__init__): Likewise.
	(Printer.add_version): Inject versioned namespace after std or
	__gnu_cxx.
	(build_libstdcxx_dictionary): Adapt add_version usages, always pass
	namespace first and symbol second.

From-SVN: r254320

	PR libstdc++/82777
	* src/filesystem/std-path.cc (path::lexically_normal): Remove dot-dot
	elements correctly.
	* testsuite/27_io/filesystem/path/generation/normal.cc: Add testcase.
	* testsuite/util/testsuite_fs.h (compare_paths): Improve exception
	text.

From-SVN: r254317

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	Revert accidental duplicate:

	* combine.c (can_change_dest_mode): Reject changes in
	REGMODE_NATURAL_SIZE.

From-SVN: r254316

When we have a REG_DEAD note for a reg that is set in the new I2, we
drop the note on the floor (we cannot find whether to place it on I2
or on I3).  But the code I added to do this has a bug and does not
always actually drop it.  This patch fixes it.

But that on its own is too pessimistic, it turns out, and we generate
worse code.  One case where we do know where to place the note is if
it came from I3 (it should go to I3 again).  Doing this fixes all of
the regressions.


	PR rtl-optimization/64682
	PR rtl-optimization/69567
	PR rtl-optimization/69737
	PR rtl-optimization/82683
	* combine.c (distribute_notes) <REG_DEAD>: If the new I2 sets the same
	register mentioned in the note, drop the note, unless it came from I3,
	in which case it should go to I3 again.

From-SVN: r254315

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00019.html
	gcc/cp/
	* cp-tree.h (assign_op_identifier, call_op_identifier): Use
	compressed code.
	(struct lang_decl_fn): Use compressed operator code.
	(DECL_OVERLOADED_OPERATOR_CODE): Replace with ...
	(DECL_OVERLOADED_OPERATOR_CODE_RAW): ... this.
	(DECL_OVERLOADED_OPERATOR_CODE_IS): Use it.
	* decl.c (duplicate_decls): Use DECL_OVERLOADED_OPERATOR_CODE_RAW.
	(build_library_fn): Likewise.
	(grok_op_properties): Likewise.
	* mangle.c (write_unqualified_name): Likewise.
	* method.c (implicitly_declare_fn): Likewise.
	* typeck.c (check_return_expr): Use DECL_OVERLOADED_OPERATOR_IS.

	libcc1/
	* libcp1plugin.cc (plugin_build_decl): Use
	DECL_OVERLOADED_OPERATOR_CODE_RAW.

From-SVN: r254314

This patch moves the check for an overlapping byte to normalize_ref
from its callers, so that it's easier to convert to poly_ints later.
It's not really worth it on its own.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-ssa-dse.c (normalize_ref): Check whether the ranges overlap
	and return false if not.
	(clear_bytes_written_by, live_bytes_read): Update accordingly.

From-SVN: r254313

Most GCC ranges seem to be represented as an offset and a size (rather
than a start and inclusive end or start and exclusive end).  The usual
test for whether X is in a range is of course:

  x >= start && x < start + size
or:
  x >= start && x - start < size

which means that an empty range of size 0 contains nothing.  But other
range tests aren't as obvious.

The usual test for whether one range is contained within another
range is:

  start1 >= start2 && start1 + size1 <= start2 + size2

while the test for whether two ranges overlap (from ranges_overlap_p) is:

     (start1 >= start2 && start1 < start2 + size2)
  || (start2 >= start1 && start2 < start1 + size1)

i.e. the ranges overlap if one range contains the start of the other
range.  This leads to strange results like:

  (start X, size 0) is a subrange of (start X, size 0) but
  (start X, size 0) does not overlap (start X, size 0)

Similarly:

  (start 4, size 0) is a subrange of (start 2, size 2) but
  (start 4, size 0) does not overlap (start 2, size 2)

It seems like "X is a subrange of Y" should imply "X overlaps Y".

This becomes harder to ignore with the runtime sizes and offsets
added for SVE.  The most obvious fix seemed to be to say that
an empty range does not overlap anything, and is therefore not
a subrange of anything.

Using the new definition of subranges didn't seem to cause any
codegen differences in the testsuite.  But there was one change
with the new definition of overlapping ranges.  strncpy-chk.c has:

  memset (dst, 0, sizeof (dst));
  if (strncpy (dst, src, 0) != dst || strcmp (dst, ""))
    abort();

The strncpy is detected as a zero-size write, and so with the new
definition of overlapping ranges, we treat the strncpy as having
no effect on the strcmp (which is true).  The reaching definition
is the memset instead.

This patch makes ranges_overlap_p return false for zero-sized
ranges, even if the other range has an unknown size.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-ssa-alias.h (ranges_overlap_p): Return false if either
	range is known to be empty.

From-SVN: r254312

This patch avoids some calculations of the form:

  GET_MODE_SIZE (vector_mode) / GET_MODE_SIZE (element_mode)

in simplify-rtx.c.  If we're dealing with CONST_VECTORs, it's better
to use CONST_VECTOR_NUNITS, since that remains constant even after the
SVE patches.  In other cases we can get the number from GET_MODE_NUNITS.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* simplify-rtx.c (simplify_const_unary_operation): Use GET_MODE_NUNITS
	and CONST_VECTOR_NUNITS instead of computing the number of units from
	the byte sizes of the vector and element.
	(simplify_binary_operation_1): Likewise.
	(simplify_const_binary_operation): Likewise.
	(simplify_ternary_operation): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254311

https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00018.html
	* cp-tree.h (IDENTIFIER_CP_INDEX): Define.
	(enum ovl_op_flags): Add OVL_OP_FLAG_AMBIARY.
	(enum ovl_op_code): New.
	(struct ovl_op_info): Add ovl_op_code field.
	(ovl_op_info): Size by OVL_OP_MAX.
	(ovl_op_mapping, ovl_op_alternate): Declare.
	(OVL_OP_INFO): Adjust for mapping array.
	(IDENTIFIER_OVL_OP_INFO): New.
	* decl.c (ambi_op_p, unary_op_p): Delete.
	(grok_op_properties): Use IDENTIFIER_OVL_OP_INFO and
	ovl_op_alternate.
	* lex.c (ovl_op_info): Adjust and static initialize.
	(ovl_op_mappings, ovl_op_alternate): Define.
	(init_operators): Iterate over ovl_op_info array and init mappings
	& alternate arrays.
	* mangle.c (write_unqualified_id): Use IDENTIFIER_OVL_OP_INFO.
	* operators.def (DEF_OPERATOR): Remove KIND parm.
	(DEF_SIMPLE_OPERATOR): Delete.
	(OPERATOR_TRANSITION): Expand if defined.

From-SVN: r254310

This avoids the double evaluation mentioned in the comments and
simplifies the change to make MEM_OFFSET variable.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* var-tracking.c (INT_MEM_OFFSET): Replace with...
	(int_mem_offset): ...this new function.
	(var_mem_set, var_mem_delete_and_set, var_mem_delete)
	(find_mem_expr_in_1pdv, dataflow_set_preserve_mem_locs)
	(same_variable_part_p, use_type, add_stores, vt_get_decl_and_offset):
	Update accordingly.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254309

This patch adds a helper routine (interesting_mode_p) to lower-subreg.c,
to make the decision about whether a mode can be split and, if so,
calculate the number of bytes and words in the mode.  At present this
function always returns true; a later patch will add cases in which it
can return false.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* lower-subreg.c (interesting_mode_p): New function.
	(compute_costs, find_decomposable_subregs, decompose_register)
	(simplify_subreg_concatn, can_decompose_p, resolve_simple_move)
	(resolve_clobber, dump_choices): Use it.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254308

Avoid using add_object when we have more specific routines available.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* rtlhash.c (add_rtx): Use add_hwi for 'w' and add_int for 'i'.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254307

alias.c:find_base_term and find_base_value checked:

      if (GET_MODE_SIZE (GET_MODE (src)) < GET_MODE_SIZE (Pmode))

but (a) comparing the precision seems more correct, since it's possible
for modes to have the same memory size as Pmode but fewer bits and
(b) the functions are called on arbitrary rtl, so there's no guarantee
that we're handling an integer truncation.

Since there's no point processing truncations of anything other than an
integer, this patch checks that first.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* alias.c (find_base_value, find_base_term): Only process integer
	truncations.  Check the precision rather than the size.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254306

This patch adds a function for testing whether an arbitrary mode X
is an integer mode that is narrower than integer mode Y.  This is
useful for code like expand_float and expand_fix that could in
principle handle vectors as well as scalars.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* machmode.h (is_narrower_int_mode): New function
	* optabs.c (expand_float, expand_fix): Use it.
	* dwarf2out.c (rotate_loc_descriptor): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254305

This patch adds a narrowing equivalent of wider_subreg_mode.  At present
there is only one user.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* rtl.h (narrower_subreg_mode): New function.
	* ira-color.c (update_costs_from_allocno): Use it.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254304

widening_optab_handler had the comment:

      /* ??? Why does find_widening_optab_handler_and_mode attempt to
         widen things that can't be widened?  E.g. add_optab... */
      if (op > LAST_CONV_OPTAB)
        return CODE_FOR_nothing;

I think it comes from expand_binop using
find_widening_optab_handler_and_mode for two things: to test whether
a "normal" optab like add_optab is supported for a standard binary
operation and to test whether a "convert" optab is supported for a
widening operation like umul_widen_optab.  In the former case from_mode
and to_mode must be the same, in the latter from_mode must be narrower
than to_mode.

For the former case, find_widening_optab_handler_and_mode is only really
testing the modes that are passed in.  permit_non_widening must be true
here.

For the latter case, find_widening_optab_handler_and_mode should only
really consider new from_modes that are wider than the original
from_mode and narrower than the original to_mode.  Logically
permit_non_widening should be false, since widening optabs aren't
supposed to take operands that are the same width as the destination.
We get away with permit_non_widening being true because no target
would/should define a widening .md pattern with matching modes.

But really, it seems better for expand_binop to handle these two
cases itself rather than pushing them down.  With that change,
find_widening_optab_handler_and_mode is only ever called with
permit_non_widening set to false and is only ever called with
a "proper" convert optab.  We then no longer need widening_optab_handler,
we can just use convert_optab_handler directly.

The patch also passes the instruction code down to expand_binop_directly.
This should be more efficient and removes an extra call to
find_widening_optab_handler_and_mode.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* optabs-query.h (convert_optab_p): New function, split out from...
	(convert_optab_handler): ...here.
	(widening_optab_handler): Delete.
	(find_widening_optab_handler): Remove permit_non_widening parameter.
	(find_widening_optab_handler_and_mode): Likewise.  Provide an
	override that operates on mode class wrappers.
	* optabs-query.c (widening_optab_handler): Delete.
	(find_widening_optab_handler_and_mode): Remove permit_non_widening
	parameter.  Assert that the two modes are the same class and that
	the "from" mode is narrower than the "to" mode.  Use
	convert_optab_handler instead of widening_optab_handler.
	* expmed.c (expmed_mult_highpart_optab): Use convert_optab_handler
	instead of widening_optab_handler.
	* expr.c (expand_expr_real_2): Update calls to
	find_widening_optab_handler.
	* optabs.c (expand_widen_pattern_expr): Likewise.
	(expand_binop_directly): Take the insn_code as a parameter.
	(expand_binop): Only call find_widening_optab_handler for
	conversion optabs; use optab_handler otherwise.  Update calls
	to find_widening_optab_handler and expand_binop_directly.
	Use convert_optab_handler instead of widening_optab_handler.
	* tree-ssa-math-opts.c (convert_mult_to_widen): Update calls to
	find_widening_optab_handler and use scalar_mode rather than
	machine_mode.
	(convert_plusminus_to_widen): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254302

This patch adds a fixed_size_mode machine_mode wrapper
for modes that are known to have a fixed size.  That applies
to all current modes, but future patches will add support for
variable-sized modes.

The use of this class should be pretty restricted.  One important
use case is to hold the mode of static data, which can never be
variable-sized with current file formats.  Another is to hold
the modes of registers involved in __builtin_apply and
__builtin_result, since those interfaces don't cope well with
variable-sized data.

The class can also be useful when reinterpreting the contents of
a fixed-length bit string as a different kind of value.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* machmode.h (fixed_size_mode): New class.
	* rtl.h (get_pool_mode): Return fixed_size_mode.
	* gengtype.c (main): Add fixed_size_mode.
	* target.def (get_raw_result_mode): Return a fixed_size_mode.
	(get_raw_arg_mode): Likewise.
	* doc/tm.texi: Regenerate.
	* targhooks.h (default_get_reg_raw_mode): Return a fixed_size_mode.
	* targhooks.c (default_get_reg_raw_mode): Likewise.
	* config/ia64/ia64.c (ia64_get_reg_raw_mode): Likewise.
	* config/mips/mips.c (mips_get_reg_raw_mode): Likewise.
	* config/msp430/msp430.c (msp430_get_raw_arg_mode): Likewise.
	(msp430_get_raw_result_mode): Likewise.
	* config/avr/avr-protos.h (regmask): Use as_a <fixed_side_mode>
	* dbxout.c (dbxout_parms): Require fixed-size modes.
	* expr.c (copy_blkmode_from_reg, copy_blkmode_to_reg): Likewise.
	* gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise.
	* omp-low.c (lower_oacc_reductions): Likewise.
	* simplify-rtx.c (simplify_immed_subreg): Take fixed_size_modes.
	(simplify_subreg): Update accordingly.
	* varasm.c (constant_descriptor_rtx::mode): Change to fixed_size_mode.
	(force_const_mem): Update accordingly.  Return NULL_RTX for modes
	that aren't fixed-size.
	(get_pool_mode): Return a fixed_size_mode.
	(output_constant_pool_2): Take a fixed_size_mode.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254300

This patch adds an rtl representation of a vector linear series
of the form:

  a[I] = BASE + I * STEP

Like vec_duplicate;

- the new rtx can be used for both constant and non-constant vectors
- when used for constant vectors it is wrapped in a (const ...)
- the constant form is only used for variable-length vectors;
  fixed-length vectors still use CONST_VECTOR

At the moment the code is restricted to integer elements, to avoid
concerns over floating-point rounding.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/rtl.texi (vec_series): Document.
	(const): Say that the operand can be a vec_series.
	* rtl.def (VEC_SERIES): New rtx code.
	* rtl.h (const_vec_series_p_1): Declare.
	(const_vec_series_p): New function.
	* emit-rtl.h (gen_const_vec_series): Declare.
	(gen_vec_series): Likewise.
	* emit-rtl.c (const_vec_series_p_1, gen_const_vec_series)
	(gen_vec_series): Likewise.
	* optabs.c (expand_mult_highpart): Use gen_const_vec_series.
	* simplify-rtx.c (simplify_unary_operation): Handle negations
	of vector series.
	(simplify_binary_operation_series): New function.
	(simplify_binary_operation_1): Use it.  Handle VEC_SERIES.
	(test_vector_ops_series): New function.
	(test_vector_ops): Call it.
	* config/powerpcspe/altivec.md (altivec_lvsl): Use
	gen_const_vec_series.
	(altivec_lvsr): Likewise.
	* config/rs6000/altivec.md (altivec_lvsl, altivec_lvsr): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254297

This patch allows (const ...) wrappers to be used for rtx vector
constants, as an alternative to const_vector.  This is useful
for SVE, where the number of elements isn't known until runtime.

It could also be useful in future for fixed-length vectors, to
reduce the amount of memory needed to represent simple constants
with high element counts.  However, one nice thing about keeping
it restricted to variable-length vectors is that there is never
any need to handle combinations of (const ...) and CONST_VECTOR.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* doc/rtl.texi (const): Update description of address constants.
	Say that vector constants are allowed too.
	* common.md (E, F): Use CONSTANT_P instead of checking for
	CONST_VECTOR.
	* emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
	checking for CONST_VECTOR.
	* expmed.c (make_tree): Use build_vector_from_val for a CONST
	VEC_DUPLICATE.
	* expr.c (expand_expr_real_2): Check for vector modes instead
	of checking for CONST_VECTOR.
	* rtl.h (const_vec_p): New function.
	(const_vec_duplicate_p): Check for a CONST VEC_DUPLICATE.
	(unwrap_const_vec_duplicate): Handle them here too.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254296

This patch adds a vec_duplicate_p helper that tests for constant
or non-constant vector duplicates.  Together with the existing
const_vec_duplicate_p, this complements the gen_vec_duplicate
and gen_const_vec_duplicate added by a previous patch.

The patch uses the new routines to add more rtx simplifications
involving vector duplicates.  These mirror simplifications that
we already do for CONST_VECTOR broadcasts and are needed for
variable-length SVE, which uses:

  (const:M (vec_duplicate:M X))

to represent constant broadcasts instead.  The simplifications do
trigger on the testsuite for variable duplicates too, and in each
case I saw the change was an improvement.

The best way of testing the new simplifications seemed to be
via selftests.  The patch cribs part of David's patch here:
https://gcc.gnu.org/ml/gcc-patches/2016-07/msg00270.html .

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    David Malcolm  <dmalcolm@redhat.com>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* rtl.h (vec_duplicate_p): New function.
	* selftest-rtl.c (assert_rtx_eq_at): New function.
	* selftest-rtl.h (ASSERT_RTX_EQ): New macro.
	(assert_rtx_eq_at): Declare.
	* selftest.h (selftest::simplify_rtx_c_tests): Declare.
	* selftest-run-tests.c (selftest::run_tests): Call it.
	* simplify-rtx.c: Include selftest.h and selftest-rtl.h.
	(simplify_unary_operation_1): Recursively handle vector duplicates.
	(simplify_binary_operation_1): Likewise.  Handle VEC_SELECTs of
	vector duplicates.
	(simplify_subreg): Handle subregs of vector duplicates.
	(make_test_reg, test_vector_ops_duplicate, test_vector_ops)
	(selftest::simplify_rtx_c_tests): New functions.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Malcolm <dmalcolm@redhat.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254294

This patch adds helper functions for generating constant and
non-constant vector duplicates.  These routines help with SVE because
it is then easier to use:

   (const:M (vec_duplicate:M X))

for a broadcast of X, even if the number of elements in M isn't known
at compile time.  It also makes it easier for general rtx code to treat
constant and non-constant duplicates in the same way.

In the target code, the patch uses gen_vec_duplicate instead of
gen_rtx_VEC_DUPLICATE if handling constants correctly is potentially
useful.  It might be that some or all of the call sites only handle
non-constants in practice, in which case the change is a harmless
no-op (and a saving of a few characters).

Otherwise, the target changes use gen_const_vec_duplicate instead
of gen_rtx_CONST_VECTOR if the constant is obviously a duplicate.
They also include some changes to use CONSTxx_RTX for easy global
constants.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* emit-rtl.h (gen_const_vec_duplicate): Declare.
	(gen_vec_duplicate): Likewise.
	* emit-rtl.c (gen_const_vec_duplicate_1): New function, split
	out from...
	(gen_const_vector): ...here.
	(gen_const_vec_duplicate, gen_vec_duplicate): New functions.
	(gen_rtx_CONST_VECTOR): Use gen_const_vec_duplicate for constants
	whose elements are all equal.
	* optabs.c (expand_vector_broadcast): Use gen_const_vec_duplicate.
	* simplify-rtx.c (simplify_const_unary_operation): Likewise.
	(simplify_relational_operation): Likewise.
	* config/aarch64/aarch64.c (aarch64_simd_gen_const_vector_dup):
	Likewise.
	(aarch64_simd_dup_constant): Use gen_vec_duplicate.
	(aarch64_expand_vector_init): Likewise.
	* config/arm/arm.c (neon_vdup_constant): Likewise.
	(neon_expand_vector_init): Likewise.
	(arm_expand_vec_perm): Use gen_const_vec_duplicate.
	(arm_block_set_unaligned_vect): Likewise.
	(arm_block_set_aligned_vect): Likewise.
	* config/arm/neon.md (neon_copysignf<mode>): Likewise.
	* config/i386/i386.c (ix86_expand_vec_perm): Likewise.
	(expand_vec_perm_even_odd_pack): Likewise.
	(ix86_vector_duplicate_value): Use gen_vec_duplicate.
	* config/i386/sse.md (one_cmpl<mode>2): Use CONSTM1_RTX.
	* config/ia64/ia64.c (ia64_expand_vecint_compare): Use
	gen_const_vec_duplicate.
	* config/ia64/vect.md (addv2sf3, subv2sf3): Use CONST1_RTX.
	* config/mips/mips.c (mips_gen_const_int_vector): Use
	gen_const_vec_duplicate.
	(mips_expand_vector_init): Use CONST0_RTX.
	* config/powerpcspe/altivec.md (abs<mode>2, nabs<mode>2): Likewise.
	(define_split): Use gen_const_vec_duplicate.
	* config/rs6000/altivec.md (abs<mode>2, nabs<mode>2): Use CONST0_RTX.
	(define_split): Use gen_const_vec_duplicate.
	* config/s390/vx-builtins.md (vec_genmask<mode>): Likewise.
	(vec_ctd_s64, vec_ctd_u64, vec_ctsl, vec_ctul): Likewise.
	* config/spu/spu.c (spu_const): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254292

This patch stops combine from changing the mode of an existing register
in-place if doing so would change the size of the underlying register
allocation size, as given by REGMODE_NATURAL_SIZE.  Without this,
many tests fail in adjust_reg_mode after SVE is added.  One example
is gcc.c-torture/compile/20090401-1.c.

2017-11-01  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* combine.c (can_change_dest_mode): Reject changes in
	REGMODE_NATURAL_SIZE.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254291

	* gcc.target/alpha/sqrt.c: New test.

From-SVN: r254289