* tree-ssa-threadedge.c (cond_arg_set_in_bb): Remove unused
        debugging argument.

From-SVN: r192746

        PR tree-optimization/54985
        * tree-ssa-threadedge.c (cond_arg_set_in_bb): New function
        * extracted
        from thread_across_edge.
        (thread_across_edge): Use it in all cases where we might thread
        across a back edge.

        * gcc.c-torture/execute/pr54985.c: New test.

From-SVN: r192745

2012-10-23  Vladimir Makarov  <vmakarov@redhat.com>

	* lra-constraints.c (update_ebb_live_info): Process empty blocks.

From-SVN: r192743

gcc/
	* expmed.c (store_split_bit_field): Update the calls to
	extract_fixed_bit_field.  In the big-endian case, always
	use the mode of OP0 to count the number of significant bits.
	(extract_bit_field_1): Remove unit, offset, bitpos and
	byte_offset from the outermost scope.  Express conditions in terms
	of bitnum rather than offset, bitpos and byte_offset.  Move the
	computation of MODE1 to the block that needs it.  Use MODE unless
	the TMODE-based mode_for_size calculation succeeds.  Split the
	plain move cases into two, one for memory accesses and one for
	register accesses.  Generalize the memory case, freeing it from
	the old register-based endian checks.  Move the INT_MODE calculation
	above the code that needs it.  Use simplify_gen_subreg to handle
	multiword OP0s.  If the field still spans several words, pass it
	directly to extract_split_bit_field.  Assume after that point
	that both targets and register sources fit within a word.
	Replace x-prefixed variables with non-prefixed forms.
	Compute the bitpos for ext(z)v register operands directly in the
	chosen unit size, rather than going through an intermediate
	BITS_PER_WORD unit size.  Simplify the containment check
	used when forcing OP0 into a register.  Update the call to
	extract_fixed_bit_field.
	(extract_fixed_bit_field): Replace the bitpos and offset parameters
	with a single bitnum parameter, of the same form as extract_bit_field.
	Assume that OP0 contains the full field.  Simplify the memory offset
	calculation and containment check for volatile bitfields.  Make the
	offset explicit when volatile bitfields force a misaligned access.
	Remove WARNED and fix long lines.  Assert that the processed OP0
	has an integral mode.
	(store_split_bit_field): Update the call to store_fixed_bit_field.

From-SVN: r192741

gcc/
	* expmed.c (lowpart_bit_field_p): New function.
	(store_bit_field_1): Remove unit, offset, bitpos and byte_offset
	from the outermost scope.  Express conditions in terms of bitnum
	rather than offset, bitpos and byte_offset.  Split the plain move
	cases into two, one for memory accesses and one for register accesses.
	Allow simplify_gen_subreg to fail rather than calling validate_subreg.
	Move the handling of multiword OP0s after the code that coerces VALUE
	to an integer mode.  Use simplify_gen_subreg for this case and assert
	that it succeeds.  If the field still spans several words, pass it
	directly to store_split_bit_field.  Assume after that point that
	both sources and register targets fit within a word.  Replace
	x-prefixed variables with non-prefixed forms.  Compute the bitpos
	for insv register operands directly in the chosen unit size, rather
	than going through an intermediate BITS_PER_WORD unit size.
	Update the call to store_fixed_bit_field.
	(store_fixed_bit_field): Replace the bitpos and offset parameters
	with a single bitnum parameter, of the same form as store_bit_field.
	Assume that OP0 contains the full field.  Simplify the memory offset
	calculation.  Assert that the processed OP0 has an integral mode.
	(store_split_bit_field): Update the call to store_fixed_bit_field.

From-SVN: r192740

PR debug/54508
* dwarf2out.c (prune_unused_types_prune): If pruning a class and
not all its children were marked, add DW_AT_declaration flag.

* g++.dg/debug/dwarf2/pr54508.C: New.

From-SVN: r192739

	PR c++/54844
	* pt.c (tsubst_copy, tsubst_copy_and_build) <case SIZEOF_EXPR>: Use
	tsubst instead of tsubst_copy* on types.

	* g++.dg/template/sizeof14.C: New test.

From-SVN: r192736

From-SVN: r192735

re PR c++/54988 (fpmath=sse target pragma causes inlining failure because of target specific option mismatch)

	PR c++/54988
	* decl2.c (cplus_decl_attributes): Don't return early
	if attributes is NULL.

	* c-c++-common/pr54988.c: New test.

From-SVN: r192734

From-SVN: r192733

2012-10-23  Ian Bolton  <ian.bolton@arm.com>
	    James Greenhalgh  <james.greenhalgh@arm.com>
	    Jim MacArthur  <jim.macarthur@arm.com>
	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
	    Nigel Stephens  <nigel.stephens@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	    Richard Earnshaw  <rearnsha@arm.com>
	    Sofiane Naci  <sofiane.naci@arm.com>
	    Stephen Thomas  <stephen.thomas@arm.com>
	    Tejas Belagod  <tejas.belagod@arm.com>
	    Yufeng Zhang  <yufeng.zhang@arm.com>

	* config.gcc: Add AArch64.
	* configure.ac: Add AArch64 TLS support detection.
	* configure: Regenerate.


Co-Authored-By: James Greenhalgh <james.greenhalgh@arm.com>
Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>

From-SVN: r192732

2012-10-23  Yufeng Zhang  <yufeng.zhang@arm.com>

	* config/cpu/aarch64/cxxabi_tweaks.h: New file.
	* configure.host: Enable aarch64.

From-SVN: r192731

2012-10-23  Ian Bolton  <ian.bolton@arm.com>
	    Jim MacArthur  <jim.macarthur@arm.com>
	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
	    Nigel Stephens  <nigel.stephens@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	    Richard Earnshaw  <rearnsha@arm.com>
	    Sofiane Naci  <sofiane.naci@arm.com>
	    Stephen Thomas  <stephen.thomas@arm.com>
	    Tejas Belagod  <tejas.belagod@arm.com>
	    Yufeng Zhang  <yufeng.zhang@arm.com>

	* configure.tgt: Add AArch64.



Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>

From-SVN: r192730

2012-10-23  Ian Bolton  <ian.bolton@arm.com>
	    Jim MacArthur  <jim.macarthur@arm.com>
	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
	    Nigel Stephens  <nigel.stephens@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	    Richard Earnshaw  <rearnsha@arm.com>
	    Sofiane Naci  <sofiane.naci@arm.com>
	    Stephen Thomas  <stephen.thomas@arm.com>
	    Tejas Belagod  <tejas.belagod@arm.com>
	    Yufeng Zhang  <yufeng.zhang@arm.com>

	* config.host (aarch64*-*-elf, aarch64*-*-linux*): New.
	* config/aarch64/crti.S: New file.
	* config/aarch64/crtn.S: New file.
	* config/aarch64/linux-unwind.h: New file.
	* config/aarch64/sfp-machine.h: New file.
	* config/aarch64/sync-cache.c: New file.
	* config/aarch64/t-aarch64: New file.
	* config/aarch64/t-softfp: New file.


Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>

From-SVN: r192729

2012-10-23  Ian Bolton  <ian.bolton@arm.com>
	    Jim MacArthur  <jim.macarthur@arm.com>
	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
	    Nigel Stephens  <nigel.stephens@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	    Richard Earnshaw  <rearnsha@arm.com>
	    Sofiane Naci  <sofiane.naci@arm.com>
	    Stephen Thomas  <stephen.thomas@arm.com>
	    Tejas Belagod  <tejas.belagod@arm.com>
	    Yufeng Zhang  <yufeng.zhang@arm.com>

	* configure.ac: Enable AArch64.
	* configure: Regenerate.


Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>

From-SVN: r192728

2012-10-23  Sofiane Naci <sofiane.naci@arm.com>

	Mark libatomic unsupported in AArch64.

	* configure.tgt: Mark libatomic unsupported.

From-SVN: r192727

2012-10-23  Ian Bolton  <ian.bolton@arm.com>
	    Jim MacArthur  <jim.macarthur@arm.com>
	    Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
	    Nigel Stephens  <nigel.stephens@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	    Richard Earnshaw  <rearnsha@arm.com>
	    Sofiane Naci  <sofiane.naci@arm.com>
	    Stephen Thomas  <stephen.thomas@arm.com>
	    Tejas Belagod  <tejas.belagod@arm.com>
	    Yufeng Zhang  <yufeng.zhang@arm.com>

	* lib/target-supports.exp
	(check_profiling_available): Add AArch64.
	(check_effective_target_vect_int): Likewise.
	(check_effective_target_vect_shift): Likewise.
	(check_effective_target_vect_float): Likewise.
	(check_effective_target_vect_double): Likewise.
	(check_effective_target_vect_widen_mult_qi_to_hi): Likewise.
	(check_effective_target_vect_widen_mult_hi_to_si): Likewise.
	(check_effective_target_vect_pack_trunc): Likewise.
	(check_effective_target_vect_unpack): Likewise.
	(check_effective_target_vect_hw_misalign): Likewise.
	(check_effective_target_vect_short_mult): Likewise.
	(check_effective_target_vect_int_mult): Likewise.
	(check_effective_target_vect_stridedN): Likewise.
	(check_effective_target_sync_int_long): Likewise.
	(check_effective_target_sync_char_short): Likewise.
	(check_vect_support_and_set_flags): Likewise.
	(check_effective_target_aarch64_tiny): New.
	(check_effective_target_aarch64_small): New.
	(check_effective_target_aarch64_large): New.
	* g++.dg/other/PR23205.C: Enable aarch64.
	* g++.dg/other/pr23205-2.C: Likewise.
	* g++.old-deja/g++.abi/ptrmem.C: Likewise.
	* gcc.c-torture/execute/20101011-1.c: Likewise.
	* gcc.dg/20020312-2.c: Likewise.
	* gcc.dg/20040813-1.c: Likewise.
	* gcc.dg/builtin-apply2.c: Likewise.
	* gcc.dg/stack-usage-1.c: Likewise.


Co-Authored-By: Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>

From-SVN: r192726

2012-10-23  Ian Bolton  <ian.bolton@arm.com>
	    Jim MacArthur  <jim.macarthur@arm.com>
	    Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
	    Nigel Stephens  <nigel.stephens@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	    Richard Earnshaw  <rearnsha@arm.com>
	    Sofiane Naci  <sofiane.naci@arm.com>
	    Stephen Thomas  <stephen.thomas@arm.com>
	    Tejas Belagod  <tejas.belagod@arm.com>
	    Yufeng Zhang  <yufeng.zhang@arm.com>

	* gcc.target/aarch64/aapcs/aapcs64.exp: New file.
	* gcc.target/aarch64/aapcs/abitest-2.h: New file.
	* gcc.target/aarch64/aapcs/abitest-common.h: New file.
	* gcc.target/aarch64/aapcs/abitest.S: New file.
	* gcc.target/aarch64/aapcs/abitest.h: New file.
	* gcc.target/aarch64/aapcs/func-ret-1.c: New file.
	* gcc.target/aarch64/aapcs/func-ret-2.c: New file.
	* gcc.target/aarch64/aapcs/func-ret-3.c: New file.
	* gcc.target/aarch64/aapcs/func-ret-3.x: New file.
	* gcc.target/aarch64/aapcs/func-ret-4.c: New file.
	* gcc.target/aarch64/aapcs/func-ret-4.x: New file.
	* gcc.target/aarch64/aapcs/ice_1.c: New file.
	* gcc.target/aarch64/aapcs/ice_2.c: New file.
	* gcc.target/aarch64/aapcs/ice_3.c: New file.
	* gcc.target/aarch64/aapcs/ice_4.c: New file.
	* gcc.target/aarch64/aapcs/ice_5.c: New file.
	* gcc.target/aarch64/aapcs/macro-def.h: New file.
	* gcc.target/aarch64/aapcs/test_1.c: New file.
	* gcc.target/aarch64/aapcs/test_10.c: New file.
	* gcc.target/aarch64/aapcs/test_11.c: New file.
	* gcc.target/aarch64/aapcs/test_12.c: New file.
	* gcc.target/aarch64/aapcs/test_13.c: New file.
	* gcc.target/aarch64/aapcs/test_14.c: New file.
	* gcc.target/aarch64/aapcs/test_15.c: New file.
	* gcc.target/aarch64/aapcs/test_16.c: New file.
	* gcc.target/aarch64/aapcs/test_17.c: New file.
	* gcc.target/aarch64/aapcs/test_18.c: New file.
	* gcc.target/aarch64/aapcs/test_19.c: New file.
	* gcc.target/aarch64/aapcs/test_2.c: New file.
	* gcc.target/aarch64/aapcs/test_20.c: New file.
	* gcc.target/aarch64/aapcs/test_21.c: New file.
	* gcc.target/aarch64/aapcs/test_22.c: New file.
	* gcc.target/aarch64/aapcs/test_23.c: New file.
	* gcc.target/aarch64/aapcs/test_24.c: New file.
	* gcc.target/aarch64/aapcs/test_25.c: New file.
	* gcc.target/aarch64/aapcs/test_26.c: New file.
	* gcc.target/aarch64/aapcs/test_3.c: New file.
	* gcc.target/aarch64/aapcs/test_4.c: New file.
	* gcc.target/aarch64/aapcs/test_5.c: New file.
	* gcc.target/aarch64/aapcs/test_6.c: New file.
	* gcc.target/aarch64/aapcs/test_7.c: New file.
	* gcc.target/aarch64/aapcs/test_8.c: New file.
	* gcc.target/aarch64/aapcs/test_9.c: New file.
	* gcc.target/aarch64/aapcs/test_align-1.c: New file.
	* gcc.target/aarch64/aapcs/test_align-2.c: New file.
	* gcc.target/aarch64/aapcs/test_align-3.c: New file.
	* gcc.target/aarch64/aapcs/test_align-4.c: New file.
	* gcc.target/aarch64/aapcs/test_complex.c: New file.
	* gcc.target/aarch64/aapcs/test_int128.c: New file.
	* gcc.target/aarch64/aapcs/test_quad_double.c: New file.
	* gcc.target/aarch64/aapcs/type-def.h: New file.
	* gcc.target/aarch64/aapcs/va_arg-1.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-10.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-11.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-12.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-2.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-3.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-4.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-5.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-6.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-7.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-8.c: New file.
	* gcc.target/aarch64/aapcs/va_arg-9.c: New file.
	* gcc.target/aarch64/aapcs/validate_memory.h: New file.
	* gcc.target/aarch64/aarch64.exp: New file.
	* gcc.target/aarch64/adc-1.c: New file.
	* gcc.target/aarch64/adc-2.c: New file.
	* gcc.target/aarch64/asm-1.c: New file.
	* gcc.target/aarch64/clrsb.c: New file.
	* gcc.target/aarch64/clz.c: New file.
	* gcc.target/aarch64/ctz.c: New file.
	* gcc.target/aarch64/csinc-1.c: New file.
	* gcc.target/aarch64/csinv-1.c: New file.
	* gcc.target/aarch64/csneg-1.c: New file.
	* gcc.target/aarch64/extend.c: New file.
	* gcc.target/aarch64/fcvt.x: New file.
	* gcc.target/aarch64/fcvt_double_int.c: New file.
	* gcc.target/aarch64/fcvt_double_long.c: New file.
	* gcc.target/aarch64/fcvt_double_uint.c: New file.
	* gcc.target/aarch64/fcvt_double_ulong.c: New file.
	* gcc.target/aarch64/fcvt_float_int.c: New file.
	* gcc.target/aarch64/fcvt_float_long.c: New file.
	* gcc.target/aarch64/fcvt_float_uint.c: New file.
	* gcc.target/aarch64/fcvt_float_ulong.c: New file.
	* gcc.target/aarch64/ffs.c: New file.
	* gcc.target/aarch64/fmadd.c: New file.
	* gcc.target/aarch64/fnmadd-fastmath.c: New file.
	* gcc.target/aarch64/frint.x: New file.
	* gcc.target/aarch64/frint_double.c: New file.
	* gcc.target/aarch64/frint_float.c: New file.
	* gcc.target/aarch64/index.c: New file.
	* gcc.target/aarch64/mneg-1.c: New file.
	* gcc.target/aarch64/mneg-2.c: New file.
	* gcc.target/aarch64/mneg-3.c: New file.
	* gcc.target/aarch64/mnegl-1.c: New file.
	* gcc.target/aarch64/mnegl-2.c: New file.
	* gcc.target/aarch64/narrow_high-intrinsics.c: New file.
	* gcc.target/aarch64/pic-constantpool1.c: New file.
	* gcc.target/aarch64/pic-symrefplus.c: New file.
	* gcc.target/aarch64/predefine_large.c: New file.
	* gcc.target/aarch64/predefine_small.c: New file.
	* gcc.target/aarch64/predefine_tiny.c: New file.
	* gcc.target/aarch64/reload-valid-spoff.c: New file.
	* gcc.target/aarch64/scalar_intrinsics.c: New file.
	* gcc.target/aarch64/table-intrinsics.c: New file.
	* gcc.target/aarch64/tst-1.c: New file.
	* gcc.target/aarch64/vect-abs-compile.c: New file.
	* gcc.target/aarch64/vect-abs.c: New file.
	* gcc.target/aarch64/vect-abs.x: New file.
	* gcc.target/aarch64/vect-compile.c: New file.
	* gcc.target/aarch64/vect-faddv-compile.c: New file.
	* gcc.target/aarch64/vect-faddv.c: New file.
	* gcc.target/aarch64/vect-faddv.x: New file.
	* gcc.target/aarch64/vect-fmax-fmin-compile.c: New file.
	* gcc.target/aarch64/vect-fmax-fmin.c: New file.
	* gcc.target/aarch64/vect-fmax-fmin.x: New file.
	* gcc.target/aarch64/vect-fmaxv-fminv-compile.c: New file.
	* gcc.target/aarch64/vect-fmaxv-fminv.x: New file.
	* gcc.target/aarch64/vect-fp-compile.c: New file.
	* gcc.target/aarch64/vect-fp.c: New file.
	* gcc.target/aarch64/vect-fp.x: New file.
	* gcc.target/aarch64/vect-mull-compile.c: New file.
	* gcc.target/aarch64/vect-mull.c: New file.
	* gcc.target/aarch64/vect-mull.x: New file.
	* gcc.target/aarch64/vect.c: New file.
	* gcc.target/aarch64/vect.x: New file.
	* gcc.target/aarch64/vector_intrinsics.c: New file.
	* gcc.target/aarch64/vfp-1.c: New file.
	* gcc.target/aarch64/volatile-bitfields-1.c: New file.
	* gcc.target/aarch64/volatile-bitfields-2.c: New file.
	* gcc.target/aarch64/volatile-bitfields-3.c: New file.
	* g++.dg/abi/aarch64_guard1.C: New file.


Co-Authored-By: Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>

From-SVN: r192725

2012-10-23  Ian Bolton  <ian.bolton@arm.com>
	    James Greenhalgh  <james.greenhalgh@arm.com>
	    Jim MacArthur  <jim.macarthur@arm.com>
	    Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
	    Nigel Stephens  <nigel.stephens@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	    Richard Earnshaw  <rearnsha@arm.com>
	    Sofiane Naci  <sofiane.naci@arm.com>
	    Stephen Thomas  <stephen,thomas@arm.com>
	    Tejas Belagod  <tejas.belagod@arm.com>
	    Yufeng Zhang  <yufeng.zhang@arm.com>

	* doc/invoke.texi (AArch64 Options): New.
	* doc/md.texi (Machine Constraints): Add AArch64.


Co-Authored-By: Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
Co-Authored-By: James Greenhalgh <james.greenhalgh@arm.com>
Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>

From-SVN: r192724

2012-10-23  Ian Bolton  <ian.bolton@arm.com>
	    James Greenhalgh  <james.greenhalgh@arm.com>
	    Jim MacArthur  <jim.macarthur@arm.com>
	    Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
	    Nigel Stephens  <nigel.stephens@arm.com>
	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
	    Richard Earnshaw  <rearnsha@arm.com>
	    Sofiane Naci  <sofiane.naci@arm.com>
	    Stephen Thomas  <stephen.thomas@arm.com>
	    Tejas Belagod  <tejas.belagod@arm.com>
	    Yufeng Zhang  <yufeng.zhang@arm.com>

	* common/config/aarch64/aarch64-common.c: New file.
	* config/aarch64/aarch64-arches.def: New file.
	* config/aarch64/aarch64-builtins.c: New file.
	* config/aarch64/aarch64-cores.def: New file.
	* config/aarch64/aarch64-elf-raw.h: New file.
	* config/aarch64/aarch64-elf.h: New file.
	* config/aarch64/aarch64-generic.md: New file.
	* config/aarch64/aarch64-linux.h: New file.
	* config/aarch64/aarch64-modes.def: New file.
	* config/aarch64/aarch64-option-extensions.def: New file.
	* config/aarch64/aarch64-opts.h: New file.
	* config/aarch64/aarch64-protos.h: New file.
	* config/aarch64/aarch64-simd.md: New file.
	* config/aarch64/aarch64-tune.md: New file.
	* config/aarch64/aarch64.c: New file.
	* config/aarch64/aarch64.h: New file.
	* config/aarch64/aarch64.md: New file.
	* config/aarch64/aarch64.opt: New file.
	* config/aarch64/arm_neon.h: New file.
	* config/aarch64/constraints.md: New file.
	* config/aarch64/gentune.sh: New file.
	* config/aarch64/iterators.md: New file.
	* config/aarch64/large.md: New file.
	* config/aarch64/predicates.md: New file.
	* config/aarch64/small.md: New file.
	* config/aarch64/sync.md: New file.
	* config/aarch64/t-aarch64-linux: New file.
	* config/aarch64/t-aarch64: New file.


Co-Authored-By: Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
Co-Authored-By: James Greenhalgh <james.greenhalgh@arm.com>
Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>

From-SVN: r192723

re PR c++/54988 (fpmath=sse target pragma causes inlining failure because of target specific option mismatch)

	PR c++/54988
	* decl2.c (cplus_decl_attributes): Don't return early
	if attributes is NULL.

	* c-c++-common/pr54988.c: New test.

From-SVN: r192722

	* tree-ssa-operands.h (struct def_optype_d, def_optype_p): Remove.
	(ssa_operands.free_defs): Remove.
	(DEF_OP_PTR, DEF_OP): Remove.
	(struct ssa_operand_iterator_d): Remove 'defs', add 'flags'
	members, rename 'phi_stmt' to 'stmt', 'phi_i' to 'i' and 'num_phi'
	to 'numops'.
	* gimple.h (gimple_statement_with_ops.def_ops): Remove.
	(gimple_def_ops, gimple_set_def_ops): Remove.
	(gimple_vdef_op): Don't take const gimple, adjust.
	(gimple_asm_input_op, gimple_asm_input_op_ptr,
	gimple_asm_set_input_op, gimple_asm_output_op,
	gimple_asm_output_op_ptr, gimple_asm_set_output_op): Adjust asserts,
	and rewrite to move def operands to front.
	(gimple_asm_clobber_op, gimple_asm_set_clobber_op,
	gimple_asm_label_op, gimple_asm_set_label_op): Correct asserts.
	* tree-ssa-operands.c (build_defs): Remove.
	(init_ssa_operands): Don't initialize it.
	(fini_ssa_operands): Don't free it.
	(cleanup_build_arrays): Don't truncate it.
	(finalize_ssa_stmt_operands): Don't assert on it.
	(alloc_def, add_def_op, append_def): Remove.
	(finalize_ssa_defs): Remove building of def_ops list.
	(finalize_ssa_uses): Don't mark for SSA renaming here, ...
	(add_stmt_operand): ... but here, don't call append_def.
	(get_indirect_ref_operands): Remove recurse_on_base argument.
	(get_expr_operands): Adjust call to get_indirect_ref_operands.
	(verify_ssa_operands): Don't check def operands.
	(free_stmt_operands): Don't free def operands.
	* gimple.c (gimple_copy): Don't clear def operands.
	* tree-flow-inline.h (op_iter_next_use): Adjust to explicitely
	handle def operand.
	(op_iter_next_tree, op_iter_next_def): Ditto.
	(clear_and_done_ssa_iter): Clear new fields.
	(op_iter_init): Adjust to setup new iterator structure.
	(op_iter_init_phiuse): Adjust.

From-SVN: r192721

gcc/

2012-10-23  Greta Yorsh  <Greta.Yorsh@arm.com>

	* config/arm/arm.c (offset_ok_for_ldrd_strd): Return false for
	Thumb1.

From-SVN: r192720

2012-10-23  Vladimir Makarov  <vmakarov@redhat.com>

	* dbxout.c (dbxout_symbol_location): Pass new argument to
	alter_subreg.
	* dwarf2out.c: Include ira.h and lra.h.
	(based_loc_descr, compute_frame_pointer_to_fb_displacement): Use
	lra_eliminate_regs for LRA instead of eliminate_regs.
	* expr.c (emit_move_insn_1): Pass an additional argument to
	emit_move_via_integer.  Use emit_move_via_integer for LRA only if
	the insn is recognized.
	* emit-rtl.c (gen_rtx_REG): Add lra_in_progress.
	(validate_subreg): Don't check offset for LRA and floating point
	modes.
	* final.c (final_scan_insn, cleanup_subreg_operands): Pass new
	argument to alter_subreg.
	(walk_alter_subreg, output_operand): Ditto.
	(alter_subreg): Add new argument.
	* gcse.c (calculate_bb_reg_pressure): Add parameter to
	ira_setup_eliminable_regset call.
	* ira.c: Include lra.h.
	(ira_init_once, ira_init, ira_finish_once): Call lra_start_once,
	lra_init, lra_finish_once in anyway.
	(ira_setup_eliminable_regset): Add parameter.  Remove need_fp.
	Call lra_init_elimination and mark HARD_FRAME_POINTER_REGNUM as
	living forever if frame_pointer_needed.
	(setup_reg_class_relations): Set up ira_reg_class_subset.
	(ira_reg_equiv_invariant_p, ira_reg_equiv_const): Remove.
	(find_reg_equiv_invariant_const): Ditto.
	(setup_reg_renumber): Use ira_equiv_no_lvalue_p instead of
	ira_reg_equiv_invariant_p.  Skip caps for LRA.
	(setup_reg_equiv_init, ira_update_equiv_info_by_shuffle_insn): New
	functions.
	(ira_reg_equiv_len, ira_reg_equiv): New externals.
	(ira_reg_equiv): New.
	(ira_expand_reg_equiv, init_reg_equiv, finish_reg_equiv): New
	functions.
	(no_equiv, update_equiv_regs): Use ira_reg_equiv instead of
	reg_equiv_init.
	(setup_reg_equiv): New function.
	(ira_use_lra_p): New global.
	(ira): Set up lra_simple_p and ira_conflicts_p.  Set up and
	restore flag_caller_saves and flag_ira_region.  Move
	initialization of ira_obstack and ira_bitmap_obstack upper.  Call
	init_reg_equiv, setup_reg_equiv, and setup_reg_equiv_init instead
	of initialization of ira_reg_equiv_len, ira_reg_equiv_invariant_p,
	and ira_reg_equiv_const.  Call ira_setup_eliminable_regset with a
	new argument.  Don't flatten IRA IRA for LRA.  Don't reassign
	conflict allocnos for LRA. Call finish_reg_equiv.
        (do_reload): Prepare code for LRA call.  Call LRA.
	* ira.h (ira_use_lra_p): New external.
	(struct target_ira): Add members x_ira_class_subset_p
	x_ira_reg_class_subset, and x_ira_reg_classes_intersect_p.
	(ira_class_subset_p, ira_reg_class_subset): New macros.
	(ira_reg_classes_intersect_p): New macro.
	(struct ira_reg_equiv): New.
	(ira_setup_eliminable_regset): Add an argument.
	(ira_expand_reg_equiv, ira_update_equiv_info_by_shuffle_insn): New
	prototypes.
	* ira-color.c (color_pass, move_spill_restore, coalesce_allocnos):
	Use ira_equiv_no_lvalue_p.
	(coalesce_spill_slots, ira_sort_regnos_for_alter_reg): Ditto.
	* ira-emit.c (ira_create_new_reg): Call ira_expand_reg_equiv.
	(generate_edge_moves, change_loop) Use ira_equiv_no_lvalue_p.
	(emit_move_list): Simplify code.  Call
	ira_update_equiv_info_by_shuffle_insn.  Use ira_reg_equiv instead
	of ira_reg_equiv_invariant_p and ira_reg_equiv_const.  Change
	assert.
	* ira-int.h (struct target_ira_int): Remove x_ira_class_subset_p
	and x_ira_reg_classes_intersect_p.
	(ira_class_subset_p, ira_reg_classes_intersect_p): Remove.
	(ira_reg_equiv_len, ira_reg_equiv_invariant_p): Ditto.
	(ira_reg_equiv_const): Ditto.
	(ira_equiv_no_lvalue_p): New function.
	* jump.c (true_regnum): Always use hard_regno for subreg_get_info
	when lra is in progress.
	* haifa-sched.c (sched_init): Pass new argument to
	ira_setup_eliminable_regset.
	* loop-invariant.c (calculate_loop_reg_pressure): Pass new
	argument to ira_setup_eliminable_regset.
	* lra.h: New.
	* lra-int.h: Ditto.
	* lra.c: Ditto.
	* lra-assigns.c: Ditto.
	* lra-constraints.c: Ditto.
	* lra-coalesce.c: Ditto.
	* lra-eliminations.c: Ditto.
	* lra-lives.c: Ditto.
	* lra-spills.c: Ditto.
	* Makefile.in (LRA_INT_H): New.
	(OBJS): Add lra.o, lra-assigns.o, lra-coalesce.o,
	lra-constraints.o, lra-eliminations.o, lra-lives.o, and
	lra-spills.o.
	(dwarf2out.o): Add dependence on ira.h and lra.h.
	(ira.o): Add dependence on lra.h.
	(lra.o, lra-assigns.o, lra-coalesce.o, lra-constraints.o): New
	entries.
	(lra-eliminations.o, lra-lives.o, lra-spills.o): Ditto.
	* output.h (alter_subreg): Add new argument.
	* rtlanal.c (simplify_subreg_regno): Permit mode changes for LRA.
	Permit ARG_POINTER_REGNUM and STACK_POINTER_REGNUM for LRA.
	* recog.c (general_operand, register_operand): Accept paradoxical
	FLOAT_MODE subregs for LRA.
	(scratch_operand): Accept pseudos for LRA.
	* rtl.h (lra_in_progress): New external.
	(debug_bb_n_slim, debug_bb_slim, print_value_slim): New
	prototypes.
	(debug_rtl_slim, debug_insn_slim): Ditto.
	* sdbout.c (sdbout_symbol): Pass new argument to alter_subreg.
	* sched-vis.c (print_value_slim): New.
	* target.def (lra_p): New hook.
	(register_priority): Ditto.
	(different_addr_displacement_p): Ditto.
	(spill_class): Ditto.
	* target-globals.h (this_target_lra_int): New external.
	(target_globals): New member lra_int.
	(restore_target_globals): Restore this_target_lra_int.
	* target-globals.c: Include lra-int.h.
	(default_target_globals): Add &default_target_lra_int.
	* targhooks.c (default_lra_p): New function.
	(default_register_priority): Ditto.
	(default_different_addr_displacement_p): Ditto.
	* targhooks.h (default_lra_p): Declare.
	(default_register_priority): Ditto.
	(default_different_addr_displacement_p): Ditto.
	* timevar.def (TV_LRA, TV_LRA_ELIMINATE, TV_LRA_INHERITANCE): New.
	(TV_LRA_CREATE_LIVE_RANGES, TV_LRA_ASSIGN, TV_LRA_COALESCE): New.
	* config/arm/arm.c (load_multiple_sequence): Pass new argument toOB
	alter_subreg.
	(store_multiple_sequence): Ditto.
	* config/i386/i386.h (enum ix86_tune_indices): Add
	X86_TUNE_GENERAL_REGS_SSE_SPILL.
	(TARGET_GENERAL_REGS_SSE_SPILL): New macro.
	* config/i386/i386.c (initial_ix86_tune_features): Set up
	X86_TUNE_GENERAL_REGS_SSE_SPILL for m_COREI7 and m_CORE2I7.
	(ix86_lra_p, ix86_register_priority): New functions.
	(ix86_secondary_reload): Add NON_Q_REGS, SIREG, DIREG.
	(inline_secondary_memory_needed): Change assert.
	(ix86_spill_class): New function.
	(TARGET_LRA_P, TARGET_REGISTER_BANK, TARGET_SPILL_CLASS): New
	macros.
	* config/m68k/m68k.c (emit_move_sequence): Pass new argument to
	alter_subreg.
	* config/m32r/m32r.c (gen_split_move_double): Ditto.
	* config/pa/pa.c (pa_emit_move_sequence): Ditto.
	* config/sh/sh.md: Ditto.
	* config/v850/v850.c (v850_reorg): Ditto.
	* config/xtensa/xtensa.c (fixup_subreg_mem): Ditto.
	* doc/md.texi: Add new interpretation of hint * for LRA.
	* doc/passes.texi: Describe LRA pass.
	* doc/tm.texi.in: Add TARGET_LRA_P, TARGET_REGISTER_PRIORITY,
	TARGET_DIFFERENT_ADDR_DISPLACEMENT_P, and TARGET_SPILL_CLASS.
	* doc/tm.texi: Update.

From-SVN: r192719

	* gcc.dg/tree-prof/peel-1.c: New testcase.
	* loop-unroll.c (decide_peel_simple): Simple peeling makes sense even
	with simple loops; bound number of branches only when FDO is not
	available.
	(decide_unroll_stupid): Mention that num_loop_branches heuristics
	is off.

From-SVN: r192718

re PR target/54660 (iq2000_function_arg_advance: format ‘%p expects argument of type ‘void*’, but argument 3 has type ‘const_tree)

	PR target/54660
	* config/iq2000/iq2000.c (iq2000_function_arg_advance): Suppress
	compile time warning about pointer printing.

From-SVN: r192717

	PR gcc/52945
	* testsuite/gcc.dg/lto/pr52634_0.c: skip the test on Darwin.

From-SVN: r192716

	* config.gcc (*-*-linux* | frv-*-*linux* | *-*-kfreebsd*-gnu |
	*-*-knetbsd*-gnu | *-*-gnu* | *-*-kopensolaris*-gnu): Use
	glibc-c.o in c_target_objs and cxx_target_objs.  Use t-glibc in
	tmake_file.  Set target_has_targetcm.
	(tilegx-*-linux*, tilepro-*-linux*): Append to c_target_objs and
	cxx_target_objs rather than overriding previous value.
	* config/glibc-c.c, config/t-glibc: New.
	* doc/tm.texi.in (TARGET_C_PREINCLUDE): New @hook.
	* doc/tm.texi: Regenerate.
	* hooks.c (hook_constcharptr_void_null): New.
	* hooks.h (hook_constcharptr_void_null): Declare.

gcc/c-family:
	* c-common.h (pch_cpp_save_state): Declare.
	* c-target.def (c_preinclude): New hook.
	* c-opts.c (done_preinclude): New.
	(push_command_line_include): Handle default preincluded header.
	(cb_file_change): Call pch_cpp_save_state when calling
	push_command_line_include.
	* c-pch.c (pch_ready_to_save_cpp_state, pch_cpp_state_saved)
	(pch_cpp_save_state): New.
	(pch_init): Call pch_cpp_save_state conditionally, instead of
	calling cpp_save_state.

gcc/testsuite:
	* gcc.dg/c99-predef-1.c: New test.
	* gcc.dg/cpp/cmdlne-dU-1.c, gcc.dg/cpp/cmdlne-dU-2.c,
	gcc.dg/cpp/cmdlne-dU-3.c, gcc.dg/cpp/cmdlne-dU-4.c,
	gcc.dg/cpp/cmdlne-dU-5.c, gcc.dg/cpp/cmdlne-dU-6.c,
	gcc.dg/cpp/cmdlne-dU-7.c, gcc.dg/cpp/cmdlne-dU-8.c,
	gcc.dg/cpp/cmdlne-dU-9.c, gcc.dg/cpp/cmdlne-dU-10.c,
	gcc.dg/cpp/cmdlne-dU-11.c, gcc.dg/cpp/cmdlne-dU-12.c,
	gcc.dg/cpp/cmdlne-dU-13.c, gcc.dg/cpp/cmdlne-dU-14.c,
	gcc.dg/cpp/cmdlne-dU-15.c, gcc.dg/cpp/cmdlne-dU-16.c,
	gcc.dg/cpp/cmdlne-dU-17.c, gcc.dg/cpp/cmdlne-dU-18.c,
	gcc.dg/cpp/cmdlne-dU-19.c, gcc.dg/cpp/cmdlne-dU-20.c,
	gcc.dg/cpp/cmdlne-dU-21.c, gcc.dg/cpp/cmdlne-dU-22.c,
	gcc.dg/cpp/mi5.c, gcc.dg/cpp/multiline.c: Add -nostdinc to
	dg-options.

libcpp:
	* files.c (struct _cpp_file): Add implicit_preinclude.
	(pch_open_file): Allow a previously opened implicitly included
	file.
	(_cpp_find_file): Add implicit_preinclude argument.  Free file and
	do not call open_file_failed if implicit_preinclude.  Store
	implicit_preinclude value.
	(_cpp_stack_include, _cpp_fake_include, _cpp_compare_file_date):
	Update calls to _cpp_find_file.
	(_cpp_stack_include): Handle IT_DEFAULT.
	(cpp_push_default_include): New.
	* include/cpplib.h (cpp_push_default_include): Declare.
	* init.c (cpp_read_main_file): Update call to _cpp_find_file.
	* internal.h (enum include_type): Add IT_DEFAULT.
	(_cpp_find_file): Update prototype.

From-SVN: r192715

	* config/mips/linux-common.h (STACK_CHECK_STATIC_BUILTIN): Define.
	(STACK_CHECK_PROTECT): Likewise.
	* config/mips/mips.h (MIPS_PROLOGUE_TEMP2_REGNUM): Likewise.
	(MIPS_PROLOGUE_TEMP2): Likewise.
	* config/mips/mips-protos.h (mips_output_probe_stack_range): Declare.
	* config/mips/mips.c: Include common/common-target.h.
	(mips_emit_probe_stack_range): New function.
	(mips_output_probe_stack_range): Likewise.
	(mips_expand_prologue): Invoke mips_emit_probe_stack_range if static
	builtin stack checking is enabled.
	* config/mips/mips.md (UNSPEC_PROBE_STACK_RANGE): New constant.
	(probe_stack_range_<P:mode>): New insn.
ada/
	* system-linux-mipsel.ads (Stack_Check_Probes): Set to True.
	* system-linux-mips.ads (Stack_Check_Probes): Likewise.
	* system-linux-mips64el.ads (Stack_Check_Probes): Likewise.

From-SVN: r192713

2012-10-23  Marc Glisse  <marc.glisse@inria.fr>

gcc/
	* tree-ssa-forwprop.c (forward_propagate_into_cond): Handle vectors.
	* fold-const.c (fold_relational_const): Handle VECTOR_CST.
	* doc/generic.texi (VEC_COND_EXPR): Document current policy.

gcc/testsuite/
	* gcc.dg/tree-ssa/foldconst-6.c: New testcase.

From-SVN: r192711

	PR middle-end/54937
	* tree-ssa-loop-niter.c (record_estimate): Do not try to lower
	the bound of non-is_exit statements.
	(maybe_lower_iteration_bound): Do it here.
	(estimate_numbers_of_iterations_loop): Call it.
	* gcc.c-torture/execute/pr54937.c: New testcase.
	* gcc.dg/tree-ssa/cunroll-2.c: Update.

From-SVN: r192710

	PR middle-end/54967
	* cfgloopmanip.c (fix_bb_placements): Add loop_closed_ssa_invalidated;
	track basic blocks that moved out of their loops.
	(unloop): Likewise.
	(remove_path): Update.
	(fix_loop_placements): Update.
	* tree-ssa-loop-ivcanon.c (try_unroll_loop_completely): Add
	loop_closed_ssa_invalidated parameter; pass it around.
	(canonicalize_loop_induction_variables): Update loop closed
	SSA form if needed.
	(tree_unroll_loops_completely): Likewise; do irred update out of
	the outer loop; verify that SSA form is closed.
	* cfgloop.h (unrloop): Update.

	* gfortran.dg/pr54967.f90: New testcase.

From-SVN: r192709

	PR go/54918
libgo: Set library version number.

From-SVN: r192706

From-SVN: r192704

re PR target/55019 (Incorrectly use live argument register to save high register in thumb1 prologue)

	gcc/
	PR target/55019
	* config/arm/arm.c (thumb1_expand_prologue): Don't push high regs with
	live argument regs.

	gcc/testsuite/
	PR target/55019
	* gcc.dg/pr55019.c: New.

From-SVN: r192703

	PR middle-end/55030
	Revert:
	* stmt.c (expand_nl_goto_receiver): Remove almost-copy of
	expand_builtin_setjmp_receiver.
	(expand_label): Adjust, call expand_builtin_setjmp_receiver
	with NULL for the label parameter.
	* builtins.c (expand_builtin_setjmp_receiver): Don't clobber
	the frame-pointer.  Adjust comments.
	[HAVE_builtin_setjmp_receiver]: Emit builtin_setjmp_receiver
	only if LABEL is non-NULL.

From-SVN: r192701

From-SVN: r192700

gcc:

2012-10-22  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR tree-optimization/55008
	* gimple-ssa-strength-reduction.c (find_basis_for_candidate): Don't
	allow a candidate to be a basis for itself under another interpretation.

gcc/testsuite:

2012-10-22  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	PR tree-optimization/55008
	* gcc.dg/tree-ssa/pr55008.c: New test.

From-SVN: r192696

2012-10-22  François Dumont  <fdumont@gcc.gnu.org>

	* include/bits/unordered_set.h (unordered_set<>): Prefer
	aggregation to inheritance with _Hashtable.
	(unordered_multiset<>): Likewise.
	* include/debug/unordered_set (operator==): Adapt.
	* include/profile/unordered_set (operator==): Adapt.

From-SVN: r192695

	* config/i386/i386.c (memory_address_length):
	Added missing part from my previous commit.

From-SVN: r192694