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  1. 05 Jan, 2018 8 commits
    • re PR target/83604 (ICE in copy_to_mode_reg, at explow.c:630) · d33e32a7 
      	PR target/83604
	* config/i386/sse.md (VI248_VLBW): Rename to ...
	(VI248_AVX512VL): ... this.  Don't guard V32HI with TARGET_AVX512BW.
	(vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
	vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
	vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
	vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
	mode iterator instead of VI248_VLBW.

	* gcc.target/i386/pr83604.c: New test.

From-SVN: r256280
      Jakub Jelinek committed
    • ipa-fnsummary.c (record_modified_bb_info): Add OP. · 3b2a6901 
      
	* ipa-fnsummary.c (record_modified_bb_info): Add OP.
	(record_modified): Skip clobbers; add debug output.
	(param_change_prob): Use sreal frequencies.

From-SVN: r256279
      Jan Hubicka committed
    • Revert DECL_USER_ALIGN part of r241959 · ccf20649 
      r241959 included code to stop the vectoriser increasing the alignment of
a "user-aligned" variable.  This wasn't the main purpose of the patch,
but was done for consistency with pass_increase_alignment, and was
needed to make the testcase work.

The documentation for the aligned attribute says:

  This attribute specifies a minimum alignment for the variable or
  structure field, measured in bytes.

so I think it's reasonable for the vectoriser to increase the
alignment further, if that helps us to vectorise code.  It's also
useful if the "user" alignment actually came from an earlier pass
rather than the source code.

A possible counterexample came up when this was discussed on the lists.
Users who are trying to collate things from several translation units
into a single section can use:

  __attribute__((section ("whatever"), aligned(N)))

and would not want extra padding.  It turns out that the supported way
of doing that is to add a "used" attribute, which works even when no
"aligned" attribute is given.

2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
	punt for user-aligned variables.

gcc/testsuite/
	* gcc.dg/vect/vect-align-4.c: New test.
	* gcc.dg/vect/vect-nb-iter-ub-2.c (cc): Remove alignment attribute
	and redefine as a structure with an unaligned member "b".
	(foo): Update accordingly.

From-SVN: r256277
      Richard Sandiford committed
    • Make chrec_contains_symbols true for POLY_INT_CST · 8db2698d 
      2018-01-05  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-chrec.c (chrec_contains_symbols): Return true for
	POLY_INT_CST.

From-SVN: r256276
      Richard Sandiford committed
    • [PATCH PR82439][simplify-rtx] Simplify (x | y) == x -> (y & ~x) == 0 · 49479590 
      This patch add support for the missing transformation of
(x | y) == x -> (y & ~x) == 0. The transformation for (x & y) == x case
already exists in simplify-rtx.c since 2014 as of r218503 and this patch
only adds a couple of extra patterns for the IOR case. This benefits 
targets that have the BICS instruction to generate better code. For
targets that do not have the BICS instructions, it still results in
no worse code generation and gives out 2 instructions.

ChangeLog Entries:

*** gcc/ChangeLog ***

2018-01-05  Sudakshina Das  <sudi.das@arm.com>

	PR target/82439
	* simplify-rtx.c (simplify_relational_operation_1): Add simplifications
	of (x|y) == x for BICS pattern.

*** gcc/testsuite/ChangeLog ***

2018-01-05  Sudakshina Das  <sudi.das@arm.com>

	PR target/82439
	* gcc.target/aarch64/bics_5.c: New test.
	* gcc.target/arm/bics_5.c: Likewise.

From-SVN: r256275
      Sudakshina Das committed
    • re PR tree-optimization/83605 (ICE: verify_gimple failed (error: dead STMT in EH table)) · bef52a68 
      	PR tree-optimization/83605
	* gimple-ssa-strength-reduction.c: Include tree-eh.h.
	(find_candidates_dom_walker::before_dom_children): Ignore stmts that
	can throw.

	* gcc.dg/pr83605.c: New test.

From-SVN: r256274
      Jakub Jelinek committed
    • RTEMS/EPIPHANY: Add RTEMS support · 64b371b1 
      gcc/
	* config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
	* config/epiphany/rtems.h: New file.

libgcc/
	* config.host (epiphany-*-elf*): Add (epiphany-*-rtems*)
	configuration.

From-SVN: r256273
      Sebastian Huber committed
    • Daily bump. · e170de7c 
      From-SVN: r256272
      GCC Administrator committed
  3. 04 Jan, 2018 25 commits
  5. 03 Jan, 2018 7 commits
    • * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi. · a5a4a9df 
      From-SVN: r256219
      Jakub Jelinek committed
    • PR tree-optimization/83655 - ICE on an invalid call to memcpy declared with no prototype · cf3fc0e8 
      gcc/testsuite/ChangeLog:

	PR tree-optimization/83655
	* gcc.dg/Wrestrict-5.c: New test.
	* c-c++-common/builtins.c: New test.

gcc/ChangeLog:

	PR tree-optimization/83655
	* gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
	checking calls with invalid arguments.

From-SVN: r256218
      Martin Sebor committed
    • PR tree-optimization/83603 - ICE in builtin_memref at gcc/gimple-ssa-warn-restrict.c:238 · 2438cb6a 
      gcc/ChangeLog:

	PR tree-optimization/83603
	* calls.c (maybe_warn_nonstring_arg): Avoid accessing function
	arguments past the endof the argument list in functions declared
	without a prototype.
	* gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
	Avoid checking when arguments are null.

gcc/testsuite/ChangeLog:

	PR tree-optimization/83603
	* gcc.dg/Wrestrict-4.c: New test.

From-SVN: r256217
      Martin Sebor committed
    • Make vectorizable_load/store handle IFN_MASK_LOAD/STORE · c3a8f964 
      After the previous patches, it's easier to see that the remaining
inlined transform code in vectorizable_mask_load_store is just a
cut-down version of the VMAT_CONTIGUOUS handling in vectorizable_load
and vectorizable_store.  This patch therefore makes those functions
handle masked loads and stores instead.

This makes it easier to handle more forms of masked load and store
without duplicating logic from the unmasked forms.  It also helps with
support for fully-masked loops.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-vect-stmts.c (vect_get_store_rhs): New function.
	(vectorizable_mask_load_store): Delete.
	(vectorizable_call): Return false for masked loads and stores.
	(vectorizable_store): Handle IFN_MASK_STORE.  Use vect_get_store_rhs
	instead of gimple_assign_rhs1.
	(vectorizable_load): Handle IFN_MASK_LOAD.
	(vect_transform_stmt): Don't set is_store for call_vec_info_type.

From-SVN: r256216
      Richard Sandiford committed
    • Split gather load handling out of vectorizable_{mask_load_store,load} · c48d2d35 
      vectorizable_mask_load_store and vectorizable_load used the same
code to build a gather load call, except that the former also
vectorised a mask argument and used it for both the merge and mask
inputs.  The latter instead used a merge input of zero and a mask
input of all-ones.  This patch splits it out into a subroutine.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-vect-stmts.c (vect_build_gather_load_calls): New function,
	split out from..,
	(vectorizable_mask_load_store): ...here.
	(vectorizable_load): ...and here.

From-SVN: r256215
      Richard Sandiford committed
    • Split out gather load mask building · bc9587eb 
      This patch splits out the code to build an all-bits-one or all-bits-zero
input to a gather load.  The catch is that both masks can have
floating-point type, in which case they are implicitly treated in
the same way as an integer bitmask.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-vect-stmts.c (vect_build_all_ones_mask)
	(vect_build_zero_merge_argument): New functions, split out from...
	(vectorizable_load): ...here.

From-SVN: r256214
      Richard Sandiford committed
    • Split rhs checking out of vectorizable_{,mask_load_}store · 3133c3b6 
      This patch splits out the rhs checking code that's common to both
vectorizable_mask_load_store and vectorizable_store.

2018-01-03  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* tree-vect-stmts.c (vect_check_store_rhs): New function,
	split out from...
	(vectorizable_mask_load_store): ...here.
	(vectorizable_store): ...and here.

From-SVN: r256213
      Richard Sandiford committed