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  1. 01 Mar, 2017 13 commits
    • cmd/go: add testdata/timeoutbench_test.go · c85ac396 
      This file was accidentally omitted from the update to the final Go 1.8.

From-SVN: r245814
      Ian Lance Taylor committed
    • re PR target/79439 (Missing nop instruction after recursive call corrupts TOC register) · c7f0c9f3 
      [gcc]
2017-03-01  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/79439
	* config/rs6000/predicates.md (current_file_function_operand): Do
	not allow self calls to be local if the function is replaceable.

[gcc/testsuite]
2017-03-01  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/79439
	* gcc.target/powerpc/pr79439.c: New test.

From-SVN: r245813
      Michael Meissner committed
    • pr79544.c: Add test for vec_vsrad and fix up scan string. · f5ef6bfc 
      	* gcc.target/powerpc/pr79544.c: Add test for vec_vsrad and fix up
	scan string.

From-SVN: r245812
      Pat Haugen committed
    • re PR target/79395 (Compile error with -mcpu=power9 and __builtin_vec_vcmpne_p) · 50181506 
      gcc/ChangeLog:

2017-03-01  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	PR target/79395
	* config/rs6000/altivec.h (vec_ctz and others): Change the
	preprocessor macro that controls conditional compilation from
	_ARCH_PWR9 to __POWER9_VECTOR__.
	(vec_all_ne): Change parameterization of __altivec_scalar_pred
	macro expansion under preprocessor #ifdef __POWER9_VECTOR__
	control (instead of _ARCH_PWR9 control) so that template
	definition uses power9-specific function.
	(vec_any_eq): Likewise.
	(vec_all_ne): Change macro definition to use a power9-specific
	expansion under #ifdef __POWER9_VECTOR__ control (instead of
	_ARCH_PWR9 control).
	(vec_any_eq) Likewise.
	* config/rs6000/rs6000-builtin.def (CMPNEF): Remove BU_P9V_AV_2
	expansion for CMPNEF to remove support for xvcmpnesp instruction.
	(CMPNED): Remove BU_P9V_AV2 expansion for CMPNED to remove
	support for xvcmpnedp instruction.
	(VCMPNEB_P): Replace BU_P9V_AV_P macro expansion with BU_P9V_AV_2
	macro expansion so that Power9 implementation of vec_all_ne does
	not use the AltiVec predicate framework.
	(VCMPNEH_P): Likewise.
	(VCMPNEW_P): Likewise.
	(VCMPNED_P): Likewise.
	(VCMPNEFP_P): Likewise.
	(VCMPNEDP_P): Likewise.
	(VCMPAEB_P): Add BU_P9V_AV_2 macro expansion to change
	implementation of vec_any_eq to not use AltiVec predicate
	framework.
	(VCMPAEH_P): Likewise.
	(VCMPAEW_P): Likewise.
	(VCMPAED_P): Likewise.
	(VCMPAEFP_P): Likewise.
	(VCMPAEDP_P): Likewise.
	(VCMPNE_P): Replace BU_P9V_OVERLOAD_P macro expansion with
	BU_P9V_OVERLOAD_2 so that Power9 implementation of vec_all_ne does
	not use the AltiVec predicate framework.
	(VCMPAE_P): Add BU_P9V_OVERLOAD_2 macro to change implementation
	of vec_any_eq to not use AltiVec predicate framework.
	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Add
	support for predefined __POWER9_VECTOR__ macro to indicate that
	Power9 instruction selection is enabled.
	(altivec_overloaded_builtins): Remove extraneous
	ALTIVEC_BUILTIN_VEC_CMPNE entry for overloaded
	function argument types RS6000_BTI_bool_V16QI and
	RS6000_BTI_bool_V16QI.  Remove erroneous ALTIVEC_BUILTIN_VEC_CMPNE
	entry for overloaded function argument types RS6000_BTI_bool_V4SI
	andRS6000_BTI_bool_V4SI, mapping to P9V_BUILTIN_CMPNEB.  Remove
	two entries mapping to P9V_BUITIN_CMPNED and one entry mapping to
	P9V_BUILTIN_CMPNEF to force use of instructions not specific to
	Power9 for implementations of vec_cmpne.  Change the signature for
	all definitions of the overloaded P9V_BUILTIN_VEC_CMPNE_P function
	(representing vec_all_ne) to remove the previously described first
	argument of type RS6000_BTI_INTSI, as this was an artifact of
	reliance on the AltiVec predicate framework, which is no longer
	used in the implementation of these functions.  Add
	P9V_BUILTIN_VEC_VCMPAE_P entries (representing the vec_anyeq
	function) to match all of the P9V_BUILTIN_VEC_VCMNE_P entries
	since, unlike the AltiVec predicate framework implementation, we
	do not share function descriptors between vec_alle and vec_anyeq.
	(altivec_resolve_overloaded_builtin): Add SFmode and DFmode to the
	set of modes that receive special treatment even when
	TARGET_P9_VECTOR is true.  The special treatment emits code that
	does not depend on Power9 instructions.
	* config/rs6000/vector.md (vector_ne_<mode>_p): Change this
	define_expand to not rely on AltiVec predicate framework.
	(vector_ae_<mode>p): New define_expand to represent vec_any_eq
	function.
	(vector_ne_v2di_p): Change this define_expand to not rely on
	AltiVec predicate framework.
	(vector_ae_v2di_p): New define_expand to represent vec_any_eq
	function.
	(vector_ne_<mode>_p): Change this define_expand to not rely on
	AltiVec predicate framework.
	(vector_ae_<mode>p): New define_expand to represent vec_any_eq
	function.
	* config/rs6000/vsx.md (*vsx_ne_<mode>_p): For modes VSX_EXTRACT_I
	(V16QI, V8HI, V4SI), correct a typo in the code emitted for this
	define_insn pattern.
	(*vsx_ne_<mode>_p): For modes VSX_F (V4SF and V2DF), remove this
	define_insn pattern because the xvcmpne<VSs>. instruction is not
	supported.
	(vcmpne<VSs>): Remove this define_insn because xvcmpne<VSs>
	instruction is not supported.

gcc/testsuite/ChangeLog:

2017-03-01  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	PR target/79395
	* gcc.target/powerpc/vsu/vec-all-ne-10.c: Change scan-assembler
	pattern to look for vcmpequd. instead of vcmpnew.
	* gcc.target/powerpc/vsu/vec-all-ne-14.c: Likewise.
	* gcc.target/powerpc/vsu/vec-all-ne-7.c: Change scan-assembler
	pattern to look for xvcmpeqsp. instead of xvcmpnesp.
	* gcc.target/powerpc/vsu/vec-all-ne-8.c: Change scan-assembler to
	look for xvcmpeqdp. instead of xvcmpnedp.
	* gcc.target/powerpc/vsu/vec-all-ne-9.c: Change scan-assembler to
	look for vcmpequd. instead of vcmpnew.
	* gcc.target/powerpc/vsu/vec-any-eq-10.c: Likewise.
	* gcc.target/powerpc/vsu/vec-any-eq-14.c: Likewise.
	* gcc.target/powerpc/vsu/vec-any-eq-7.c: Change scan-assembler to
	look for xvcmpeqsp. instead of xvcmpnesp.
	* gcc.target/powerpc/vsu/vec-any-eq-8.c: Change scan-assembler to
	look for xvcmpeqdp. instead of xvcmpnedp.
	* gcc.target/powerpc/vsu/vec-any-eq-9.c: Change scan-assembler to
	look for vcmpequd. instead of vcmpnew.
	* gcc.target/powerpc/vsu/vec-cmpne-8.c: Change scan-assembler to
	look for vcmpeqsp instead of xvcmpnesp.
	* gcc.target/powerpc/vsu/vec-cmpne-9.c: Change scan-assembler to
	look for xvcmpeqdp instead of xvcmpnedp.

From-SVN: r245811
      Kelvin Nilsen committed
    • documentation_hacking.xml: Tweak link to doxygen.org. · 00133e16 
      	* doc/xml/manual/documentation_hacking.xml: Tweak link to
	doxygen.org.

From-SVN: r245808
      Gerald Pfeifer committed
    • * config/nvptx/nvptx.c: Include intl.h. · 50c620ca 
      From-SVN: r245806
      Jakub Jelinek committed
    • [PR 78140] Reuse same IPA bits and VR info · 86cd0334 
      2017-03-01  Martin Jambor  <mjambor@suse.cz>

	PR lto/78140
	* ipa-prop.h (ipa_bits): Removed field known.
	(ipa_jump_func): Removed field vr_known.  Changed fields bits and m_vr
	to pointers.  Adjusted their comments to warn about their sharing.
	(ipcp_transformation_summary): Change bits to a vector of pointers.
	(ipa_check_create_edge_args): Moved to ipa-prop.c, declare.
	(ipa_get_ipa_bits_for_value): Declare.
	* tree-vrp.h (value_range): Mark as GTY((for_user)).
	* ipa-prop.c (ipa_bit_ggc_hash_traits): New.
	(ipa_bits_hash_table): Likewise.
	(ipa_vr_ggc_hash_traits): Likewise.
	(ipa_vr_hash_table): Likewise.
	(ipa_print_node_jump_functions_for_edge): Adjust for bits and m_vr
	being pointers and vr_known being removed.
	(ipa_set_jf_unknown): Likewise.
	(ipa_get_ipa_bits_for_value): New function.
	(ipa_set_jfunc_bits): Likewise.
	(ipa_get_value_range): New overloaded functions.
	(ipa_set_jfunc_vr): Likewise.
	(ipa_compute_jump_functions_for_edge): Use the above functions to
	construct bits and vr parts of jump functions.
	(ipa_check_create_edge_args): Move here from ipa-prop.h, also allocate
	ipa_bits_hash_table and ipa_vr_hash_table if they do not already
	exist.
	(ipcp_grow_transformations_if_necessary): Also allocate
	ipa_bits_hash_table and ipa_vr_hash_table if they do not already
	exist.
	(ipa_node_params_t::duplicate): Do not copy bits, just pointers to
	them.  Fix too long lines.
	(ipa_write_jump_function): Adjust for bits and m_vr being pointers and
	vr_known being removed.
	(ipa_read_jump_function): Use new setter functions to construct bits
	and vr parts of jump functions or set them to NULL.
	(write_ipcp_transformation_info): Adjust for bits being pointers.
	(read_ipcp_transformation_info): Likewise.
	(ipcp_update_bits): Likewise.  Fix excessively long lines a trailing
	space.
	Include gt-ipa-prop.h.
	* ipa-cp.c (propagate_bits_across_jump_function): Adjust for bits
	being pointers.
	(ipcp_store_bits_results): Likewise.
	(propagate_vr_across_jump_function): Adjust for m_vr being a pointer.
	Do not write to existing jump functions but use a temporary instead.

From-SVN: r245805
      Martin Jambor committed
    • re PR c++/79681 (ICE with constexpr and bitfield) · 42132674 
      	PR c++/79681
	* fold-const.c (make_bit_field_ref): If orig_inner is COMPONENT_REF,
	attempt to use its first operand as BIT_FIELD_REF base.

	* g++.dg/cpp1y/constexpr-79681-1.C: New test.
	* g++.dg/cpp1y/constexpr-79681-2.C: New test.

From-SVN: r245804
      Jakub Jelinek committed
    • re PR tree-optimization/79721 (Scalar evolution introduces signed overflow) · 0100ae43 
      2017-03-01  Richard Biener  <rguenther@suse.de>

	PR middle-end/79721
	* tree-chrec.c (chrec_evaluate): Perform computation of Newtons
	interpolating formula in wrapping arithmetic.
	(chrec_apply): Convert chrec_evaluate return value to wanted type.

	* gcc.dg/torture/pr79721.c: New testcase.

From-SVN: r245803
      Richard Biener committed
    • re PR c++/79746 (Confusing -Wunused-but-set-parameter warning with virtual inheritance) · e3e9e8ca 
      	PR c++/79746
	* init.c (emit_mem_initializers): When not constructing vbases of
	abstract classes, mark arguments as read for
	-Wunused-but-set-parameter.

	* g++.dg/warn/Wunused-parm-9.C: New test.

From-SVN: r245802
      Jakub Jelinek committed
    • re PR tree-optimization/79734 (ICE: verify_gimple failed) · 0f3f4ffe 
      	PR tree-optimization/79734
	* tree-vect-generic.c (expand_vector_condition): Optimize
	AVX512 vector boolean VEC_COND_EXPRs into bitwise operations.
	Handle VEC_COND_EXPR where comparison has different inner width from
	type's inner width.

	* g++.dg/opt/pr79734.C: New test.

From-SVN: r245801
      Jakub Jelinek committed
    • invoke.texi (ARC Options): Copy-edit to fix punctuation, markup, and similar issues. · e287080d 
      2017-02-28  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* doc/invoke.texi (ARC Options): Copy-edit to fix punctuation,
	markup, and similar issues.  Remove @opindex entries for things
	that aren't options.  Add missing -mmpy-option entries.

From-SVN: r245800
      Sandra Loosemore committed
    • Daily bump. · da1a9ced 
      From-SVN: r245799
      GCC Administrator committed
  3. 28 Feb, 2017 23 commits
  5. 27 Feb, 2017 4 commits