gcc/
	* config/nds32/nds32-pipelines-auxiliary.c: Add comment to describe
	the purpose of this file.

Co-Authored-By: Ling-Hua Tseng <uranus@tinlans.org>

From-SVN: r212285

gcc/
	* config/nds32/nds32.c (nds32_rtx_costs): Move implementation to ...
	(nds32_address_cost): Move implementation to ...
	* config/nds32/nds32-cost.c: ... here.
	* config/nds32/nds32-protos.h (nds32_rtx_costs_impl): Declare.
	(nds32_address_cost_impl): Declare.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212284

gcc/
	* config/nds32/nds32.c
	(nds32_consecutive_registers_load_store_p): Move to ...
	(nds32_valid_multiple_load_store): Move to ...
	(nds32_valid_stack_push_pop): Move to ...
	(nds32_can_use_bclr_p): Move to ...
	(nds32_can_use_bset_p): Move to ...
	(nds32_can_use_btgl_p): Move to ...
	(nds32_can_use_bitci_p): Move to ...
	* config/nds32/nds32-predicates.c: ... here.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212283

gcc/
	* config/nds32/nds32.c
	(nds32_expand_builtin_null_ftype_reg): Move to ...
	(nds32_expand_builtin_reg_ftype_imm): Move to ...
	(nds32_expand_builtin_null_ftype_reg_imm): Move to ...
	(nds32_init_builtins): Move implementation to ...
	(nds32_expand_builtin): Move implementation to ...
	* config/nds32/nds32-intrinsic.c: ... here.
	* config/nds32/nds32-protos.h (nds32_init_builtins_impl): Declare.
	(nds32_expand_builtin_impl): Declare.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212282

gcc/
	* config/nds32/nds32.c (nds32_emit_section_head_template): Move to ...
	(nds32_emit_section_tail_template): Move to ...
	(nds32_emit_isr_jmptbl_section): Move to ...
	(nds32_emit_isr_vector_section): Move to ...
	(nds32_emit_isr_reset_conten): Move to ...
	(nds32_check_isr_attrs_conflict): Move to ...
	(nds32_construct_isr_vectors_information): Move to ...
	(nds32_asm_file_start): Move implementation to ...
	(nds32_asm_file_end): Move implementation to ...
	* config/nds32/nds32-isr.c: ... here.
	* config/nds32/nds32-protos.h
	(nds32_check_isr_attrs_conflict): Declare.
	(nds32_construct_isr_vectors_information): Declare.
	(nds32_asm_file_start_for_isr): Declare.
	(nds32_asm_file_end_for_isr): Declare.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212281

that are going to be separated from nds32.c source.

gcc/
	* config.gcc (nds32*): Add new modules to extra_objs.
	(nds32le-*-*): Use t-nds32 makefile fragment for new modules.
	(nds32be-*-*): Likewise.
	* config/nds32/nds32-cost.c: New file.
	* config/nds32/nds32-fp-as-gp.c: New file.
	* config/nds32/nds32-intrinsic.c: New file.
	* config/nds32/nds32-isr.c: New file.
	* config/nds32/nds32-md-auxiliary.c: New file.
	* config/nds32/nds32-memory-manipulation.c: New file.
	* config/nds32/nds32-pipelines-auxiliary.c: New file.
	* config/nds32/nds32-predicates.c: New file.
	* config/nds32/t-nds32: New file.

Co-Authored-By: Kito Cheng <kito@0xlab.org>
Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com>

From-SVN: r212280

	gcc/testsuite/
	* lib/g++-dg.exp (g++-dg-runtest): Change interface to match
	dg-runtest's.  Adapt all callers.
	* lib/gcc-dg.exp (gcc-dg-runtest): Likewise.
	* lib/gfortran-dg.exp (gfortran-dg-runtest): Likewise.
	* lib/go-dg.exp (go-dg-runtest): Likewise.
	* lib/obj-c++-dg.exp (obj-c++-dg-runtest): Likewise.
	* lib/objc-dg.exp (objc-dg-runtest): Likewise.
	libffi/
	* testsuite/lib/libffi.exp (libffi-dg-runtest): Change interface
	match to dg-runtest's.

From-SVN: r212278

From-SVN: r212277

	PR tree-optimization/61682
	* wide-int.cc (wi::mul_internal): Handle high correctly
	for umul_ppmm using cases and when one of the operands is
	equal to 1.

	* gcc.c-torture/execute/pr61682.c: New test.

From-SVN: r212273

libgomp.exp (libgomp_target_compile): If $source matches regex $lang_source_re, add $lang_include_flags to options.

	* testsuite/lib/libgomp.exp (libgomp_target_compile): If $source
	matches regex $lang_source_re, add $lang_include_flags to options.
	* testsuite/libgomp.c/c.exp: Unset lang_include_flags.
	* testsuite/libgomp.c++/c++.exp: Likewise.
	* testsuite/libgomp.fortran/fortran.exp: Likewise.  Set lang_source_re
	and lang_include_flags instead of adding -fintrinsic-modules-path= to
	ALWAYS_CFLAGS.
	* testsuite/libgomp.graphite/graphite.exp: Unset lang_include_flags.

From-SVN: r212268

Firstly, it adds back the split conditions that I accidentally removed.
Without it the dot insns are never generated, or rather, always split
back to a separate compare instruction.

Secondly, the shift amount should be SI always, not GPR, or GCC will
insert a zero-extend at expand time that it cannot get rid of later.

The test tests whether dot-form instructions are generated for both
"dot" and "dot2" cases, that is, with just a CC output or also a GPR
output; for all four basic shifts, with a register amount or an
immediate amount.  It also tests for superfluous zero-extends.  This
also tests if combine "simplifies" the rotates to right-rotates, which
it shouldn't do anymore.

From-SVN: r212267

	libgomp/
	* testsuite/libgomp.fortran/fortran.exp: Explain
	gfortran-dg-runtest usage.

From-SVN: r212266

	* arm.md (arch): Add armv6_or_vfpv3.
	(arch_enabled): Add test for the above.
	* vfp.md (divsf_vfp, divdf_vfp): Add earlyclobber when code can run
	on VFP9.
	(sqrtsf_vfp, sqrtdf_vfp): Likewise.

From-SVN: r212265

	* gcov-io.c (gcov_read_words): Don't call memmove if excess is 0.
	* data-streamer-in.c (streamer_read_hwi): Shift UHWI 1 instead of
	HWI 1 and negate the unsigned value.
	* expmed.c (expand_sdiv_pow2): For modes wider than word always
	use AND instead of shift.
	* wide-int-print.cc (print_decs): Negate UHWI instead of HWI.
c-family/
	* c-ada-spec.c (dump_ada_nodes): Don't call qsort if 
	comments->count <= 1, as comments->entries might be NULL.

From-SVN: r212264

	* gfortran.dg/ieee/ieee_1.F90: Mark variables as volatile to
	avoid optimization.

From-SVN: r212261

	* doc/invoke.texi (-fsanitize=bounds): Tweak wording.
	(-fsanitize=float-divide-by-zero): Move to the table with
	-fsanitize=undefined suboptions.
	(-fsanitize=float-cast-overflow): Likewise.

From-SVN: r212260

rs6000.c (rs6000_adjust_atomic_subword): Use BYTES_BIG_ENDIAN rather than WORDS_BIG_ENDIAN to check for byte endianness.

	* config/rs6000/rs6000.c (rs6000_adjust_atomic_subword): Use
	BYTES_BIG_ENDIAN rather than WORDS_BIG_ENDIAN to check for byte
	endianness.

From-SVN: r212258

2014-07-03  Tobias Burnus  <burnus@net-b.de>

        * scanner.c (skip_free_comments): Fix indentation.

From-SVN: r212257

ChangeLog:
2014-07-03  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* loop-invariant.c (struct invariant): Add a new member: eqno;
	(find_identical_invariants): Update eqno;
	(create_new_invariant): Init eqno;
	(get_inv_cost): Compute comp_cost with eqno;


testsuite/ChangeLog:
2014-07-03  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

	* gcc.target/arm/identical-invariants.c: New test.

From-SVN: r212256

From-SVN: r212253

Many targets do not have both rotate and rotatert.  Of the 47 targets
in the tree, 17 have both, 9 have only rotate, 2 have only rotatert, and
19 have neither (this is based on "grep -wil" so it can be slightly off).

rs6000 has only rotate, and mips has only rotatert.  For such targets
simplifying rotate to rotatert and vice versa is not simplifying things
at all.  rs6000 has already way too many rotate patterns (some days it
seems like two thousand, but it is somewhat less in reality still); I
would prefer not to double that again.

So, this patch makes genrecog define HAVE_rotate and HAVE_rotatert if
those RTL codes are mentioned anywhere in the machine description, and
then does the transformation in simplify-rtx.c only if both these flags
are set.

From-SVN: r212239

From-SVN: r212235

	* c-decl.c (duplicate_decls): CLear DECL_STRUCT_FUNCTION before
	releasing symbol.

	* gcc.c-torture/compile/section.c: New testcase.

Co-Authored-By: Chen Gang <gang.chen.5i5j@gmail.com>

From-SVN: r212234

	PR go/61620

runtime: Don't free tiny blocks in map deletion.

The memory allocator now has a special case for tiny blocks
(smaller than 16 bytes) and they can not be explicitly freed.

From-SVN: r212233

From-SVN: r212232

From-SVN: r212231

* mode-switching.c (struct bb_info): Add mode_out, mode_in caches.
(make_preds_opaque): Delete.
(clear_mode_bit, mode_bit_p, set_mode_bit): New macros.
(commit_mode_sets): New function.
(optimize_mode_switching): Handle current_mode to mode_switching_emit.
Process all modes at once.
* basic-block.h (pre_edge_lcm_avs): Declare.
* lcm.c (pre_edge_lcm_avs): Renamed from pre_edge_lcm.
Call clear_aux_for_edges. Fix comments.
(pre_edge_lcm): New wrapper function to call pre_edge_lcm_avs.
(pre_edge_rev_lcm): Idem.
* config/epiphany/epiphany.c (emit_set_fp_mode): Add prev_mode parameter.
* config/epiphany/epiphany-protos.h (emit_set_fp_mode): Idem.
* config/epiphany/resolve-sw-modes.c (pass_resolve_sw_modes::execute): Idem.
* config/i386/i386.c (x96_emit_mode_set): Idem.
* config/sh/sh.c (sh_emit_mode_set): Likewise. Handle PR toggle.
* config/sh/sh.md (toggle_pr): 	Defined if TARGET_FPU_SINGLE.
(fpscr_toggle) Disallow from delay slot.
* target.def (emit_mode_set): Add prev_mode parameter.
* doc/tm.texi: Regenerate.

From-SVN: r212230

	* decl.c (variable_decl): Reject old style initialization
	for derived type components.

	* gfortran.dg/oldstyle_5.f: New test.

Co-Authored-By: Fritz Reese <Reese-Fritz@zai.com>

From-SVN: r212227

From-SVN: r212226

	* config/aarch64/aarch64.c (aarch64_expand_vec_perm): Delete unused
	variable i.

From-SVN: r212225

libgfortran/ChangeLog:

	* configure.host (ieee_flags): Add -mieee for alpha*.

	* config/fpu-glibc.h (support_fpu_rounding_mode): Correctly handle
	GFC_FPE_UPWARD, GFC_FPE_DOWNWARD and GFC_FPE_TOWARDZERO.
	* config/fpu-aix.h (support_fpu_rounding_mode): Ditto.

testsuite/ChangeLog:

	* gfortran.dg/ieee/ieee_1.F90 (dg-additional-options): Remove -O0.
	* gfortran.dg/ieee/ieee_rounding_1.f90 (dg-additional-options): Add.

From-SVN: r212224

/cp
2014-07-02  Paolo Carlini  <paolo.carlini@oracle.com>

	* pt.c (convert_template_argument): Use inform instead of error in
	three places.

/testsuite
2014-07-02  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/cpp0x/variadic-ex10.C: Adjust for inform instead of error.
	* g++.dg/cpp0x/variadic-ex14.C: Likewise.
	* g++.dg/parse/error11.C: Likewise.
	* g++.old-deja/g++.brendan/template17.C: Likewise.

From-SVN: r212223

	* ipa-utils.h (method_class_type, vtable_pointer_value_to_binfo,
	vtable_pointer_value_to_vtable): Constify.
	(contains_polymorphic_type_p): Declare.
	* ipa-devirt.c (method_class_type, vtable_pointer_value_to_binfo,
	vtable_pointer_value_to_vtable): Constify.
	(contains_polymorphic_type_p): New predicate.
	* ipa-prop.c (ipa_set_jf_known_type): Allow types containing
	polymorphic types.
	(ipa_set_ancestor_jf): Likewise.
	(detect_type_change): Return false in easy cases.
	(compute_complex_assign_jump_func): Require type to contain
	polymorphic type.
	(compute_known_type_jump_func): Likewise.

From-SVN: r212222

2014-07-02  Tobias Burnus  <burnus@net-b.de>

        * gfortran.dg/coarray/get_array.f90: Add missing SYNC ALL.
        * gfortran.dg/coarray/send_array.f90: Ditto.
        * gfortran.dg/coarray/sendget_array.f90: Ditto.

From-SVN: r212220

	* tree.c (decls_same_for_odr, decls_same_for_odr,
	types_same_for_odr): Remove.
	(type_in_anonymous_namespace_p): Constify argument.
	* tree.h (types_same_for_odr, type_in_anonymous_namespace_p):
	Constify.
	* ipa-devirt.c (odr_type_d): Add ODR_VIOLATED field.
	(main_odr_variant): New function.
	(hash_type_name): Make static; update assert; do not ICE on
	non-records.
	(types_same_for_odr): Bring here from tree.c; simplify
	and remove old structural comparing code that doesn't work
	for templates.
	(odr_hasher::equal): Update assert.
	(add_type_duplicate): Return true when bases should be computed;
	replace incomplete loader by complete; do not output duplicated
	warnings; do not ICE on non-records; set odr_violated flag.
	(get_odr_type): Be ready to replace incomplete type by complete
	one; work on ODR variants instead of main variants; reorder item
	in array so bases have still smaller indexes.
	(dump_type_inheritance_graph): Be ready for holdes in odr_types
	array.
	(possible_polymorphic_call_targets): Do not ICE when BINFO is NULL.

From-SVN: r212218

From-SVN: r212217

This introduces the "bench" build target, which can be used to run
all benchmarks.

It is also possible to run subsets of benchmarks with the
"package/check" build targets by setting GOBENCH to a matching regex.

From-SVN: r212212

When compiling a small-enough compilation unit that has no address table
entries, but complex enough that -freorder-blocks-and-partition produces
location lists, dwarf2out_finish does not call index_location_lists, but
optimize_location_lists will later assume that the addr_index_table has
been indexed.
Google ref: b/15417905

When resolve_addr_in_expr replaces a CONST_STRING rtx, it directly
updates the pointer to the old expression with the new one. In the
case of a DW_OP_GNU_addr_index or DW_OP_GNU_const_index, that pointer
may be in an address table entry, which is keyed by the rtx. Instead
of directly replacing the pointer, we need to remove the old address
table entry (i.e., decrement its reference count), and add a new one.
Google ref: b/15957101

gcc/
	* dwarf2out.c (remove_addr_table_entry): Remove unnecessary hash table
        lookup.
	(resolve_addr_in_expr): When replacing the rtx in a location list
        entry, get a new address table entry.
	(dwarf2out_finish): Call index_location_lists even if there are no
        addr_index_table entries yet.

From-SVN: r212211

	* gcc.target/aarch64/aapcs64/aapcs64.exp:
	(additional_flags_for_func_ret): New variable based on $additional_flags
	with -fno-use-caller-save.
	(func-ret-*.c): Use the new variable.

Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>

From-SVN: r212206

2014-07-01  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/59637
	* g++.dg/cpp0x/decltype60.C: New.

From-SVN: r212205