We had omitted the copying of function attributes, we now copy
the used, alignment, section values from the original decal and
the complete set of function attributes.  It is likely that
some function attributes don't really make sense for coroutines,
but that can be disgnosed separately. Also mark the outlined
functions as artificial, since they are; some diagnostic
processing tests this.

gcc/cp/ChangeLog:

	PR c++/95518
	PR c++/95813
	* coroutines.cc (act_des_fn): Copy function
	attributes onto the outlined coroutine helpers.

gcc/testsuite/ChangeLog:

	PR c++/95518
	PR c++/95813
	* g++.dg/coroutines/pr95518.C: New test.
	* g++.dg/coroutines/pr95813.C: New test.

(cherry picked from commit 1e5da6a02fec8aa84bb00966282f420cb70fe4f0)

We updated the handling of the errors for cases when the
ramp return cannot be constructed from the user's provided
get-return-object method.  This updates the testcases to
cover this.

gcc/testsuite/ChangeLog:

	* g++.dg/coroutines/void-gro-non-class-coro.C: Moved to...
	* g++.dg/coroutines/coro-bad-gro-01-void-gro-non-class-coro.C: ...here.
	* g++.dg/coroutines/coro-bad-gro-00-class-gro-scalar-return.C: New test.

(cherry picked from commit 2dbc16552204ffa28b643949eb1f26b787017b39)

Avoid NULL pointer dereference.

gcc/fortran/
	PR fortran/95881
	* resolve.c (resolve_symbol): Avoid NULL pointer dereference.

(cherry picked from commit 3cbc0fb39c84ae0a51a9a88649dccd105bf17d6e)

With PDTs (parameterized derived types), name mangling results in variably
long internal symbols.  Use a dynamic buffer instead of a fixed-size one.

gcc/fortran/
	PR fortran/95826
	* decl.c (gfc_match_decl_type_spec): Replace a fixed size
	buffer by a pointer and reallocate if necessary.

(cherry picked from commit 35a335a159216548fc77263ac5df71ff29d3f448)

With SELECT RANK, name mangling results in long internal symbols that
overflows internal buffers.  Fix that.

gcc/fortran/
	PR fortran/95828
	* match.c (select_rank_set_tmp): Enlarge internal buffer used in
	generating a mangled name.
	* resolve.c (resolve_select_rank): Likewise.

(cherry picked from commit 77d455ee81ec3a23f8b20259a31ab963716f8e82)

Fixes a regression caused by an incomplete backport of converting the
Expression semantic pass to a Visitor.

gcc/d/ChangeLog:

	PR d/95250
	* dmd/expressionsem.c (class ExpressionSemanticVisitor): Return early
	if error occurred during semantic of DivExp.

gcc/testsuite/ChangeLog:

	PR d/95250
	* gdc.dg/pr95250.d: New test.

(cherry picked from commit 1d19c9cd3dd99ba8885c0fc93223918399f73939)

The target attribute table is not guaranteed to be set in all backends.

gcc/d/ChangeLog:

	PR d/95173
	* d-attribs.cc (uda_attribute_p): Don't search target attribute table
	if NULL.

gcc/testsuite/ChangeLog:

	PR d/95173
	* gdc.dg/pr95173.d: New test.

(cherry picked from commit 62e02c8729a75c4a859edc18e0bcafb87d717f46)

With submodules and coarrays, name mangling results in long internal
symbols.  Enlarge internal buffer.

gcc/fortran/
	PR fortran/95827
	* iresolve.c (gfc_get_string): Enlarge internal buffer used in
	generating the mangled name.

(cherry picked from commit a16d0924f18046704ef9a4b6d9593718594677f1)

The PR reports that we fail to destroy the object initially created from
the get-return-object call.  Fixed by adding a cleanup when the DTOR is
non-trivial.  In addition, to meet the specific wording that the call to
get_return_object creates the glvalue for the return, we must construct
that in-place in the return object to avoid a second copy/move CTOR.

gcc/cp/ChangeLog:

	PR c++/95477
	* coroutines.cc (morph_fn_to_coro): Apply a cleanup to
	the get return object when the DTOR is non-trivial.

gcc/testsuite/ChangeLog:

	PR c++/95477
	* g++.dg/coroutines/pr95477.C: New test.
	* g++.dg/coroutines/void-gro-non-class-coro.C: New test.

(cherry picked from commit 788b962aa00959e861b45767c5c88ec41ca30c21)

CLWB isn't supported on Ice Lake client.  But Ice Lake server and Tiger
Lake support it.  Move PTA_CLWB to PTA_ICELAKE_SERVER and PTA_TIGERLAKE.

	PR target/95874
	* config/i386/i386.h (PTA_ICELAKE_CLIENT): Remove PTA_CLWB.
	(PTA_ICELAKE_SERVER): Add PTA_CLWB.
	(PTA_TIGERLAKE): Add PTA_CLWB.

(cherry picked from commit c422e5f81f42a0fc197f0715f4fcd81f1be90bff)

Add the Matrix-Multiply Assist (MMA) built-ins.  The MMA accumulators are
INOUT operands for most MMA instructions, but they are also very expensive
to move around.  For this reason, we have implemented a built-in API where
the accumulators are passed using pass-by-reference/pointers, so the user
won't use one accumulator as input and another as output, which wouldentail
a lot of copies.  However, using pointers gives us poor code generation
when we expand the built-ins at normal expand time.  We therefore expand
the MMA built-ins early into gimple, converting the pass-by-reference calls
to an internal built-in that uses pass-by-value calling convention, where
we can enforce the input and output accumulators are the same.  This gives
us much better code generation.

2020-06-20  Peter Bergner  <bergner@linux.ibm.com>

gcc/
	* config/rs6000/predicates.md (mma_assemble_input_operand): New.
	* config/rs6000/rs6000-builtin.def (BU_MMA_1, BU_MMA_V2, BU_MMA_3,
	BU_MMA_5, BU_MMA_6, BU_VSX_1): Add support macros for defining MMA
	built-in functions.
	(ASSEMBLE_ACC, ASSEMBLE_PAIR, DISASSEMBLE_ACC, DISASSEMBLE_PAIR,
	PMXVBF16GER2, PMXVBF16GER2NN, PMXVBF16GER2NP, PMXVBF16GER2PN,
	PMXVBF16GER2PP, PMXVF16GER2, PMXVF16GER2NN, PMXVF16GER2NP,
	PMXVF16GER2PN, PMXVF16GER2PP, PMXVF32GER, PMXVF32GERNN,
	PMXVF32GERNP, PMXVF32GERPN, PMXVF32GERPP, PMXVF64GER, PMXVF64GERNN,
	PMXVF64GERNP, PMXVF64GERPN, PMXVF64GERPP, PMXVI16GER2, PMXVI16GER2PP,
	PMXVI16GER2S, PMXVI16GER2SPP, PMXVI4GER8, PMXVI4GER8PP, PMXVI8GER4,
	PMXVI8GER4PP, PMXVI8GER4SPP, XVBF16GER2, XVBF16GER2NN, XVBF16GER2NP,
	XVBF16GER2PN, XVBF16GER2PP, XVCVBF16SP, XVCVSPBF16, XVF16GER2,
	XVF16GER2NN, XVF16GER2NP, XVF16GER2PN, XVF16GER2PP, XVF32GER,
	XVF32GERNN, XVF32GERNP, XVF32GERPN, XVF32GERPP, XVF64GER, XVF64GERNN,
	XVF64GERNP, XVF64GERPN, XVF64GERPP, XVI16GER2, XVI16GER2PP, XVI16GER2S,
	XVI16GER2SPP, XVI4GER8, XVI4GER8PP, XVI8GER4, XVI8GER4PP, XVI8GER4SPP,
	XXMFACC, XXMTACC, XXSETACCZ): Add MMA built-ins.
	* config/rs6000/rs6000.c (rs6000_emit_move): Use CONST_INT_P.
	Allow zero constants.
	(print_operand) <case 'A'>: New output modifier.
	(rs6000_split_multireg_move): Add support for inserting accumulator
	priming and depriming instructions.  Add support for splitting an
	assemble accumulator pattern.
	* config/rs6000/rs6000-call.c (mma_init_builtins, mma_expand_builtin,
	rs6000_gimple_fold_mma_builtin): New functions.
	(RS6000_BUILTIN_M): New macro.
	(def_builtin): Handle RS6000_BTC_QUAD and RS6000_BTC_PAIR attributes.
	(bdesc_mma): Add new MMA built-in support.
	(htm_expand_builtin): Use RS6000_BTC_OPND_MASK.
	(rs6000_invalid_builtin): Add handling of RS6000_BTM_FUTURE and
	RS6000_BTM_MMA.
	(rs6000_builtin_valid_without_lhs): Handle RS6000_BTC_VOID attribute.
	(rs6000_gimple_fold_builtin): Call rs6000_builtin_is_supported_p
	and rs6000_gimple_fold_mma_builtin.
	(rs6000_expand_builtin): Call mma_expand_builtin.
	Use RS6000_BTC_OPND_MASK.
	(rs6000_init_builtins): Adjust comment.  Call mma_init_builtins.
	(htm_init_builtins): Use RS6000_BTC_OPND_MASK.
	(builtin_function_type): Handle VSX_BUILTIN_XVCVSPBF16 and
	VSX_BUILTIN_XVCVBF16SP.
	* config/rs6000/rs6000.h (RS6000_BTC_QUINARY, RS6000_BTC_SENARY,
	RS6000_BTC_OPND_MASK, RS6000_BTC_QUAD, RS6000_BTC_PAIR,
	RS6000_BTC_QUADPAIR, RS6000_BTC_GIMPLE): New defines.
	(RS6000_BTC_PREDICATE, RS6000_BTC_ABS, RS6000_BTC_DST,
	RS6000_BTC_TYPE_MASK, RS6000_BTC_ATTR_MASK): Adjust values.
	* config/rs6000/mma.md (MAX_MMA_OPERANDS): New define_constant.
	(UNSPEC_MMA_ASSEMBLE_ACC, UNSPEC_MMA_PMXVBF16GER2,
	UNSPEC_MMA_PMXVBF16GER2NN, UNSPEC_MMA_PMXVBF16GER2NP,
	UNSPEC_MMA_PMXVBF16GER2PN, UNSPEC_MMA_PMXVBF16GER2PP,
	UNSPEC_MMA_PMXVF16GER2, UNSPEC_MMA_PMXVF16GER2NN,
	UNSPEC_MMA_PMXVF16GER2NP, UNSPEC_MMA_PMXVF16GER2PN,
	UNSPEC_MMA_PMXVF16GER2PP, UNSPEC_MMA_PMXVF32GER,
	UNSPEC_MMA_PMXVF32GERNN, UNSPEC_MMA_PMXVF32GERNP,
	UNSPEC_MMA_PMXVF32GERPN, UNSPEC_MMA_PMXVF32GERPP,
	UNSPEC_MMA_PMXVF64GER, UNSPEC_MMA_PMXVF64GERNN,
	UNSPEC_MMA_PMXVF64GERNP, UNSPEC_MMA_PMXVF64GERPN,
	UNSPEC_MMA_PMXVF64GERPP, UNSPEC_MMA_PMXVI16GER2,
	UNSPEC_MMA_PMXVI16GER2PP, UNSPEC_MMA_PMXVI16GER2S,
	UNSPEC_MMA_PMXVI16GER2SPP, UNSPEC_MMA_PMXVI4GER8,
	UNSPEC_MMA_PMXVI4GER8PP, UNSPEC_MMA_PMXVI8GER4,
	UNSPEC_MMA_PMXVI8GER4PP, UNSPEC_MMA_PMXVI8GER4SPP,
	UNSPEC_MMA_XVBF16GER2, UNSPEC_MMA_XVBF16GER2NN,
	UNSPEC_MMA_XVBF16GER2NP, UNSPEC_MMA_XVBF16GER2PN,
	UNSPEC_MMA_XVBF16GER2PP, UNSPEC_MMA_XVF16GER2, UNSPEC_MMA_XVF16GER2NN,
	UNSPEC_MMA_XVF16GER2NP, UNSPEC_MMA_XVF16GER2PN, UNSPEC_MMA_XVF16GER2PP,
	UNSPEC_MMA_XVF32GER, UNSPEC_MMA_XVF32GERNN, UNSPEC_MMA_XVF32GERNP,
	UNSPEC_MMA_XVF32GERPN, UNSPEC_MMA_XVF32GERPP, UNSPEC_MMA_XVF64GER,
	UNSPEC_MMA_XVF64GERNN, UNSPEC_MMA_XVF64GERNP, UNSPEC_MMA_XVF64GERPN,
	UNSPEC_MMA_XVF64GERPP, UNSPEC_MMA_XVI16GER2, UNSPEC_MMA_XVI16GER2PP,
	UNSPEC_MMA_XVI16GER2S, UNSPEC_MMA_XVI16GER2SPP, UNSPEC_MMA_XVI4GER8,
	UNSPEC_MMA_XVI4GER8PP, UNSPEC_MMA_XVI8GER4, UNSPEC_MMA_XVI8GER4PP,
	UNSPEC_MMA_XVI8GER4SPP, UNSPEC_MMA_XXMFACC, UNSPEC_MMA_XXMTACC): New.
	(MMA_ACC, MMA_VV, MMA_AVV, MMA_PV, MMA_APV, MMA_VVI4I4I8,
	MMA_AVVI4I4I8, MMA_VVI4I4I2, MMA_AVVI4I4I2, MMA_VVI4I4,
	MMA_AVVI4I4, MMA_PVI4I2, MMA_APVI4I2, MMA_VVI4I4I4,
	MMA_AVVI4I4I4): New define_int_iterator.
	(acc, vv, avv, pv, apv, vvi4i4i8, avvi4i4i8, vvi4i4i2,
	avvi4i4i2, vvi4i4, avvi4i4, pvi4i2, apvi4i2, vvi4i4i4,
	avvi4i4i4): New define_int_attr.
	(*movpxi): Add zero constant alternative.
	(mma_assemble_pair, mma_assemble_acc): New define_expand.
	(*mma_assemble_acc): New define_insn_and_split.
	(mma_<acc>, mma_xxsetaccz, mma_<vv>, mma_<avv>, mma_<pv>, mma_<apv>,
	mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>,
	mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>,
	mma_<vvi4i4i4>, mma_<avvi4i4i4>): New define_insn.
	* config/rs6000/rs6000.md (define_attr "type"): New type mma.
	* config/rs6000/vsx.md (UNSPEC_VSX_XVCVBF16SP): New.
	(UNSPEC_VSX_XVCVSPBF16): Likewise.
	(XVCVBF16): New define_int_iterator.
	(xvcvbf16): New define_int_attr.
	(vsx_<xvcvbf16>): New define_insn.
	* doc/extend.texi: Document the mma built-ins.

gcc/testsuite/
	* gcc.target/powerpc/mma-builtin-1.c: New test.
	* gcc.target/powerpc/mma-builtin-2.c: New test.
	* gcc.target/powerpc/mma-builtin-3.c: New test.
	* gcc.target/powerpc/mma-builtin-4.c: New test.
	* gcc.target/powerpc/mma-builtin-5.c: New test.
	* gcc.target/powerpc/mma-builtin-6.c: New test.

(cherry picked from commit 8ee2640bfdc62f835ec9740278f948034bc7d9f1)

Backport from master.

2020-05-11  Kelvin Nilsen  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/predicates.md (u8bit_cint_operand): New predicate.

Add the new -mmma option as well as the initial MMA support, which includes
the target specific __vector_pair and __vector_quad types, the POImode and
PXImode partial integer modes they are mapped to, and their associated
move patterns.  Support for the restrictions on the registers these modes
can be assigned to as also been added.

2020-06-20  Peter Bergner  <bergner@linux.ibm.com>
	    Michael Meissner  <meissner@linux.ibm.com>

gcc/
	* config/rs6000/mma.md: New file.
	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
	__MMA__ for mma.
	* config/rs6000/rs6000-call.c (rs6000_init_builtins): Add support
	for __vector_pair and __vector_quad types.
	* config/rs6000/rs6000-cpus.def (OTHER_FUTURE_MASKS): Add
	OPTION_MASK_MMA.
	(POWERPC_MASKS): Likewise.
	* config/rs6000/rs6000-modes.def (OI, XI): New integer modes.
	(POI, PXI): New partial integer modes.
	* config/rs6000/rs6000.c (TARGET_INVALID_CONVERSION): Define.
	(rs6000_hard_regno_nregs_internal): Use VECTOR_ALIGNMENT_P.
	(rs6000_hard_regno_mode_ok_uncached): Likewise.
	Add support for POImode being allowed in VSX registers and PXImode
	being allowed in FP registers.
	(rs6000_modes_tieable_p): Adjust comment.
	Add support for POImode and PXImode.
	(rs6000_debug_reg_global) <print_tieable_modes>: Add OImode, POImode
	XImode, PXImode, V2SImode, V2SFmode and CCFPmode..
	(rs6000_setup_reg_addr_masks): Use VECTOR_ALIGNMENT_P.
	Set up appropriate addr_masks for vector pair and vector quad addresses.
	(rs6000_init_hard_regno_mode_ok): Add support for vector pair and
	vector quad registers.  Setup reload handlers for POImode and PXImode.
	(rs6000_builtin_mask_calculate): Add support for RS6000_BTM_MMA.
	(rs6000_option_override_internal): Error if -mmma is specified
	without -mcpu=future.
	(rs6000_slow_unaligned_access): Use VECTOR_ALIGNMENT_P.
	(quad_address_p): Change size test to less than 16 bytes.
	(reg_offset_addressing_ok_p): Add support for ISA 3.1 vector pair
	and vector quad instructions.
	(avoiding_indexed_address_p): Likewise.
	(rs6000_emit_move): Disallow POImode and PXImode moves involving
	constants.
	(rs6000_preferred_reload_class): Prefer VSX registers for POImode
	and FP registers for PXImode.
	(rs6000_split_multireg_move): Support splitting POImode and PXImode
	move instructions.
	(rs6000_mangle_type): Adjust comment.  Add support for mangling
	__vector_pair and __vector_quad types.
	(rs6000_opt_masks): Add entry for mma.
	(rs6000_builtin_mask_names): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
	(rs6000_function_value): Use VECTOR_ALIGNMENT_P.
	(address_to_insn_form): Likewise.
	(reg_to_non_prefixed): Likewise.
	(rs6000_invalid_conversion): New function.
	* config/rs6000/rs6000.h (MASK_MMA): Define.
	(BIGGEST_ALIGNMENT): Set to 512 if MMA support is enabled.
	(VECTOR_ALIGNMENT_P): New helper macro.
	(ALTIVEC_VECTOR_MODE): Use VECTOR_ALIGNMENT_P.
	(RS6000_BTM_MMA): Define.
	(RS6000_BTM_COMMON): Add RS6000_BTM_MMA and RS6000_BTM_FUTURE.
	(rs6000_builtin_type_index): Add RS6000_BTI_vector_pair and
	RS6000_BTI_vector_quad.
	(vector_pair_type_node): New.
	(vector_quad_type_node): New.
	* config/rs6000/rs6000.md: Include mma.md.
	(define_mode_iterator RELOAD): Add POI and PXI.
	* config/rs6000/t-rs6000 (MD_INCLUDES): Add mma.md.
	* config/rs6000/rs6000.opt (-mmma): New.
	* doc/invoke.texi: Document -mmma.

(cherry picked from commit f002c046e37d0027513af5297d9259e1fad29c27)

conversion_path points to the base where we found the using-declaration, not
where the function is actually a member; look up the actual base.  And then
maybe look back to the derived class if the base is primary.

gcc/cp/ChangeLog:

	PR c++/95719
	* call.c (build_over_call): Look up the overrider in base_binfo.
	* class.c (lookup_vfn_in_binfo): Look through BINFO_PRIMARY_P.

gcc/testsuite/ChangeLog:

	PR c++/95719
	* g++.dg/tree-ssa/final4.C: New test.

(cherry picked from commit 7d6baf68fe22b6ef5b1d6fabbef97c0e1b4d7abf)

The parser for binary numbers returned an error if the entire string
contains more digits than the result type. Leading zeros should be
ignored.

libstdc++-v3/ChangeLog:

	* include/std/charconv (__from_chars_binary): Ignore leading zeros.
	* testsuite/20_util/from_chars/1.cc: Check "0x1" for all bases,
	not just 10 and 16.
	* testsuite/20_util/from_chars/3.cc: New test.

(cherry picked from commit eb0ff770e29715deb8b2e6f5da736e0c1e8f8d07)

libstdc++-v3/ChangeLog:

	* include/bits/stl_algobase.h (__find_if): Add FALLTHRU markers.
	* include/std/charconv (__detail::__to_chars): Avoid
	-Wsign-compare warning.

(cherry picked from commit 25920dd18ad12ea501309b1487366e22f35db631)

The __detail::__to_chars_2 function assumes it won't be called with zero
values. However, when the output buffer is empty the caller doesn't
handle zero values correctly, and calls __to_chars_2 with a zero value,
resulting in an overflow of the empty buffer.

The __detail::__to_chars_i function should just return immediately for
an empty buffer, and otherwise ensure zero values are handled properly.

libstdc++-v3/ChangeLog:

	PR libstdc++/95851
	* include/std/charconv (__to_chars_i): Check for zero-sized
	buffer unconditionally.
	* testsuite/20_util/to_chars/95851.cc: New test.

(cherry picked from commit be50843754b4c4d47f0d628a84b3dbf2a4145a43)

This fixes yet another issue with the custom SSA updating in the
vectorizer when we copy from the non-if-converted loop.  We must
not mess with current defs before we updated the BB copies.

2020-06-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/95717
	* tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
	Move BB SSA updating before exit/latch PHI current def copying.

	* g++.dg/torture/pr95717.C: New testcase.

(cherry picked from commit d0909f5858ad81e6d8b73fa6193be19cb5e6ed7b)

The recent patch for dependency checking introduced one failing test
case for pointer assignments in a forall statement.  This test case
was invalid because of an interdependency in a forall statement.
This patch fixes that by removing that dependency.

gcc/testsuite/ChangeLog:

2020-06-23  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/95812
	* gfortran.fortran-torture/execute/forall_5.f90: Make forall
	statement conforming.

(cherry picked from commit 6f609029c7078fbd29e2f842074e2b99ea099096)

The problem is that Has_Constrained_Partial_View must be tested on the
base type of the designated type of an allocator.

gcc/ada/ChangeLog:
	* gcc-interface/trans.c (gnat_to_gnu) <N_Allocator>: Minor tweaks.
	Call Has_Constrained_Partial_View on base type of designated type.

The following patch avoids keeping the inherited MEM_ATTRS when
set_mem_attributes_minus_bitpos is called with a variable ARRAY_REF.
The inherited ones may not reflect the correct offset and neither
does the updated alias-set match the inherited MEM_EXPR.  This all
ends up confusing path-based alias-analysis, causing wrong-code.

The fix is to stop not adopting a MEM_EXPR for certain kinds of
expressions and instead handle everything we can.  There's still
the constant kind trees case which I'm too lazy to look into right
now.  I did refrain from adding SSA_NAME there and instead avoided
calling set_mem_attributes_minus_bitpos when debug expression
expansion ended up expanding a SSA definition RHS which should
already have taken care of setting the appropriate MEM_ATTRS.

It also avoids calling set_mem_attributes on the
DECL_INITIAL of a CONST_DECL which seems pointless since there
cannot be a sensible MEM_EXPR derived from that.  We're overwriting
both other possibly useful info, alias-set and alignment immediately
so the following patch simply removes the call instead of making
the function deal with even more (unexpected) trees that are not
memory accesses.

2020-06-23  Richard Biener  <rguenther@suse.de>

	PR middle-end/95493
	PR middle-end/95690
	* cfgexpand.c (expand_debug_expr): Avoid calling
	set_mem_attributes_minus_bitpos when we were expanding
	an SSA name.
	* emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
	ARRAY_REF special-casing, add CONSTRUCTOR to the set of
	special-cases we do not want MEM_EXPRs for.  Assert
	we end up with reasonable MEM_EXPRs.
	* varasm.c (build_constant_desc): Remove set_mem_attributes call.

	* g++.dg/torture/pr95493.C: New testcase.
	* g++.dg/torture/pr95493-1.C: Likewise.
	* gfortran.dg/pr95690.f90: Likewise.

Previously, handling of full vs. full references failed to take
AR_FULL vs. AR_FULL into account.  A change in dependency
checking in gcc 10 created a code path that could lead there;
with this patch, this is now correctly handled.

gcc/fortran/ChangeLog:

2020-06-23  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/95812
	* dependency.c (ref_same_as_full_array): Handle case of AR_FULL
	vs. AR_FULL.

gcc/testsuite/ChangeLog:

2020-06-23  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/95812
	* gfortran.dg/dependency_59.f90: New test.

(cherry picked from commit abcde0a658e17dbbabcb396eaae5a3612e07d401)

This makes sure to get a truth type for scatter masks even when they
are invariant.

2020-06-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/95487
	* tree-vect-stmts.c (vectorizable_store): Use a truth type
	for the scatter mask.

	* g++.dg/vect/pr95487.cc: New testcase.

This fixes a hole that still allowed forwarding of TARGET_MEM_REF
addresses.

2020-05-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/95308
	* tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
	test for TARGET_MEM_REFs.

	* g++.dg/torture/pr95308.C: New testcase.

This fixes an integer overflow warning that ultimatively happens because
of TREE_OVERFLOW propagating through transforms and the existing guard
against this,

375           if (TREE_OVERFLOW_P (ret)
376               && !TREE_OVERFLOW_P (op0)
377               && !TREE_OVERFLOW_P (op1))
378             overflow_warning (EXPR_LOC_OR_LOC (expr, input_location,

being insufficient.  Rather than trying to use sth like walk_tree to
exhaustively walk operands (with the possibility of introducing
quadraticness when folding larger expressions recursively) the
following amends the above with an ad-hoc test for a binary op0
with a possibly constant op1.

2020-05-30  Richard Biener  <rguenther@suse.de>

	PR c/95141
gcc/c
	* c-fold.c (c_fully_fold_internal): Enhance guard on
	overflow_warning.

gcc/testsuite
	* gcc.dg/pr95141.c: New testcase.

When path splitting tries to detect a CFG diamond make sure it
is composed of normal (non-EH, not abnormal) edges.  Otherwise
CFG manipulation later may fail.

2020-05-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/95133
	* gimple-ssa-split-paths.c
	(find_block_to_duplicate_for_splitting_paths): Check for
	normal edges.

	* gcc.dg/pr95133.c: New testcase.

This fixes printing a REAL_CST generated from value-numbering
punning some bits to a real which turns out as zero with big
negative exponent.  This causes the loop in real_to_decimal_for_mode to
never terminate.

2020-05-14  Richard Biener  <rguenther@suse.de>

	PR middle-end/95118
	* real.c (real_to_decimal_for_mode): Make sure we handle
	a zero with nonzero exponent.

	* gcc.dg/pr95118.c: New testcase.

This rejects lattice changes from one constant to another.

2020-05-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/95049
	* tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
	between different constants.

	* gcc.dg/torture/pr95049.c: New testcase.

Loop optimizers expect to be able to insert on the preheader
edge w/o splitting it thus avoid ending up with a preheader
that enters the loop via an EH edge (or an abnormal edge).

2020-05-06  Richard Biener  <rguenther@suse.de>

	PR middle-end/94964
	* cfgloopmanip.c (create_preheader): Require non-complex
	preheader edge for CP_SIMPLE_PREHEADERS.

Now issues an error "Intrinsic procedure 'num_images' not
allowed in PROCEDURE" instead of an ICE.

2020-06-22  Steven G. Kargl  <kargl@gcc.gnu.org>

gcc/fortran/

	PR fortran/95708
	* intrinsic.c (add_functions): Replace CLASS_INQUIRY with
	CLASS_TRANSFORMATIONAL for intrinsic num_images.
	(make_generic): Replace ACTUAL_NO with ACTUAL_YES for
	intrinsic team_number.
	* resolve.c (resolve_fl_procedure): Check pointer ts.u.derived
	exists before using it.

2020-06-22  Mark Eggleston  <markeggleston@gcc.gnu.org>

gcc/testsuite/

	PR fortran/95708
	* gfortran.dg/pr95708.f90: New test.

(cherry picked from commit 647340c92a042e8e6f7d004637f07060dbde49c0)

	* sv.po: Update.

P2113 from the last C++ meeting clarified that we only compare constraints
on functions or function templates that have equivalent template parameters
and function parameters.

I'm not currently implementing the complicated handling of reversed
comparison operators here; thinking about it now, it seems like a lot of
complexity to support a very weird usage.  If I write two similar comparison
operators to be distinguished by their constraints, why would I write one
reversed?  If they're two unrelated operators, they're very unlikely to be
similar enough for the complexity to help.  I've started a discussion on the
committee reflector about changing these rules.

This change breaks some greedy_ops tests in libstdc++ that were relying on
comparing constraints on unrelated templates, which seems pretty clearly
wrong, so I'm removing those tests for now.

gcc/cp/ChangeLog:

	* call.c (joust): Only compare constraints for non-template
	candidates with matching parameters.
	* pt.c (tsubst_pack_expansion): Fix getting a type parameter
	pack.
	(more_specialized_fn): Only compare constraints for candidates with
	matching parameters.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/concepts-return-req1.C: Expect error.
	* g++.dg/cpp2a/concepts-p2113a.C: New test.
	* g++.dg/cpp2a/concepts-p2113b.C: New test.

libstdc++-v3/ChangeLog:

	* testsuite/24_iterators/move_iterator/rel_ops_c++20.cc:
	Remove greedy_ops tests.
	* testsuite/24_iterators/reverse_iterator/rel_ops_c++20.cc:
	Remove greedy_ops tests.

P2002R1, adopted at the February C++ meeting, made several refinements to
the wording for operator<=>.  This implements clarifications in how the
implicit operator== is declared: as a duplicate of the operator<=>, with
only the return type and name changed.  To that end I factored out the
declaration copying from build_clone.  For GCC 10 I'm leaving build_clone
alone, to reduce the chance of non-C++20-mode regressions.

The decl.c changes are a hack to avoid complaining about constraints on a
non-template friend that isn't defined in the class.  In this case the
defaulted comparison operator should be considered defined, but we weren't
setting funcdef_flag properly.  For GCC 11 I fixed it properly.

gcc/cp/ChangeLog:

	* cp-tree.h (copy_fndecl_with_name): Declare.
	* class.c (copy_fndecl_with_name): Copy from build_clone.
	(add_implicitly_declared_members): Add op== to TYPE_FIELDS.
	* method.c (implicitly_declare_fn): Use copy_fndecl_with_name.
	* decl.c (grokfndecl): Add initialized parm.
	(grokdeclarator): Pass it down.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/spaceship-synth9.C: New test.

With submodules and equivalence declarations, name mangling may result in
long internal symbols overflowing internal buffers.  We now check that
we do not exceed the enlarged buffer sizes.

gcc/fortran/
	PR fortran/95707
	* gfortran.h (gfc_common_head): Enlarge buffer.
	* trans-common.c (gfc_sym_mangled_common_id): Enlarge temporary
	buffers, and add check on length on mangled name to prevent
	overflow.

(cherry picked from commit 3345e74299687de6144b87c0632018cafd4ccf3b)