Commits · c0587ee5deda229a18dd129d69c17c540214bcf8 · lvzhengyang / riscv-gcc-1

29 Jun, 2016 2 commits

pa.md (call_symref_64bit_post_reload): Don't call pa_output_arg_descriptor. · c0587ee5

	* config/pa/pa.md (call_symref_64bit_post_reload): Don't call
	pa_output_arg_descriptor.
	(call_val_symref_64bit_post_reload): Likewise.
	(call_val_powf_64bit_post_reload): Likewise.
	(sibcall_internal_symref_64bit): Likewise.
	(sibcall_value_internal_symref_64bit): Likewise.

From-SVN: r237837

committed Jun 29, 2016

c0587ee5 Browse Files

Daily bump. · 12e03598
```
From-SVN: r237836
```
GCC Administrator committed Jun 29, 2016
12e03598 Browse Files

28 Jun, 2016 19 commits

re PR c/71685 (Segmentation fault in gcc when compiling the attached file.) · 152ef731

	PR c/71685
	* c-typeck.c (c_build_qualified_type): Don't clear
	C_TYPE_INCOMPLETE_VARS for the main variant.

	* gcc.dg/pr71685.c: New test.

From-SVN: r237830

committed Jun 29, 2016

152ef731 Browse Files

PR c/71552 - Confusing error for incorrect struct initialization · 4378d117

gcc/c/ChangeLog:

	PR c/71552
	* c-typeck.c (output_init_element): Diagnose incompatible types
	before non-constant initializers.

gcc/testsuite/ChangeLog:

	PR c/71552
	* gcc.dg/init-bad-9.c: New test.

From-SVN: r237829

committed Jun 28, 2016

4378d117 Browse Files

abs128-1.c: Require VSX. · d41dc215

2016-06-28  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/abs128-1.c: Require VSX.
	* gcc.target/powerpc/copysign128-1.c: Likewise.
	* gcc.target/powerpc/inf128-1.c: Likewise.
	* gcc.target/powerpc/nan128-1.c: Likewise.

From-SVN: r237828

committed Jun 28, 2016

d41dc215 Browse Files

re PR middle-end/71626 (ICE at -O1 and above on x86_64-linux-gnu (in… · 6a20b538

re PR middle-end/71626 (ICE at -O1 and above on x86_64-linux-gnu (in output_constant_pool_2, at varasm.c:3837))

	PR middle-end/71626
	* config/i386/i386.c (ix86_expand_vector_move): For SUBREG of
	a constant, force its SUBREG_REG into memory or register instead
	of whole op1.

	* gcc.c-torture/execute/pr71626-1.c: New test.
	* gcc.c-torture/execute/pr71626-2.c: New test.

From-SVN: r237826

committed Jun 28, 2016

6a20b538 Browse Files

re PR target/58655 ([avr] -mfract-convert-truncate not documented) · 0f0f4f91

	PR target/58655
	* config/avr/avr.opt (-mfract-convert-truncate): Update description.
	* doc/invoke.texi (AVR Options): Document it.

From-SVN: r237825

committed Jun 28, 2016

0f0f4f91 Browse Files

linux.h: Do not include arch/icache.h · ba6be749

gcc/ChangeLog
	* config/tilegx/linux.h: Do not include arch/icache.h
	(CLEAR_INSN_CACHE): Provide inlined definition directly.
	* config/tilepro/linux.h: Do not include arch/icache.h
	(CLEAR_INSN_CACHE): Provide inlined definition directly.

libgcc/ChangeLog
	* config/tilepro/atomic.h: Do not include arch/spr_def.h and
	asm/unistd.h.
	(SPR_CMPEXCH_VALUE): Define for tilegx.
	(__NR_FAST_cmpxchg): Define for tilepro.
	(__NR_FAST_atomic_update): Define for tilepro.
	(__NR_FAST_cmpxchg64): Define for tilepro.

From-SVN: r237824

committed Jun 28, 2016

ba6be749 Browse Files

re PR target/71656 (ICE in reload when generating code for -mcpu=power9 -mpower9-dform-vector) · 77d93c47
```
	PR target/71656
	* gcc.target/powerpc/pr71656-2.c: Fix syntax errors.

From-SVN: r237823
```
Peter Bergner committed Jun 28, 2016
77d93c47 Browse Files

This patch fixes a bug in the bswap pass. · f6922a56

This patch fixes a bug in the bswap pass.  In big-endian BIT_FIELD_REF uses
big-endian bit numbering so we need to adjust the bit position.
The existing version could potentially generate incorrect code however GCC
doesn't emit a BIT_FIELD_REF to access the low byte in a register, so the
symbolic number never matches in big-endian.

    gcc/
	* tree-ssa-math-opts.c (find_bswap_or_nop_1): Adjust bitnumbering
	for big-endian BIT_FIELD_REF.

From-SVN: r237822

committed Jun 28, 2016

f6922a56 Browse Files

rs6000.md ('type' attribute): Add htmsimple/dfp types. · eda328bf

	* config/rs6000/rs6000.md ('type' attribute): Add htmsimple/dfp types.
	('size' attribute): Add '128'.
	Include power9.md.
	(*mov<mode>_hardfloat32, *mov<mode>_hardfloat64, *movdi_internal32,
	*movdi_internal64, *movdf_update1): Set size attribute to '64'.
	(add<mode>3, sub<mode>3, mul<mode>3, div<mode>3, sqrt<mode>2,
	copysign<mode>3, neg<mode>2_hw, abs<mode>2_hw, *nabs<mode>2_hw,
	*fma<mode>4_hw, *fms<mode>4_hw, *nfma<mode>4_hw, *nfms<mode>4_hw,
	extend<SFDF:mode><IEEE128:mode>2_hw, trunc<mode>df2_hw,
	*xscvqp<su>wz_<mode>, *xscvqp<su>dz_<mode>, *xscv<su>dqp_<mode>,
	*trunc<mode>df2_odd): Set size attribute to '128'.
	(*cmp<mode>_hw): Change type to veccmp and set size attribute to '128'.
	* config/rs6000/power6.md (power6-fp): Include dfp type.
	* config/rs6000/power7.md (power7-fp): Likewise.
	* config/rs6000/power8.md (power8-fp): Likewise.
	* config/rs6000/power9.md: New file.
	* config/rs6000/t-rs6000 (MD_INCLUDES): Add power9.md.
	* config/rs6000/htm.md (*tabort, *tabort<wd>c, *tabort<wd>ci,
	*trechkpt, *treclaim, *tsr, *ttest): Change type attribute to
	htmsimple.
	* config/rs6000/dfp.md (extendsddd2, truncddsd2, extendddtd2,
	trunctddd2, adddd3, addtd3, subdd3, subtd3, muldd3, multd3, divdd3,
	divtd3, *cmpdd_internal1, *cmptd_internal1, floatdidd2, floatditd2,
	ftruncdd2, fixdddi2, ftrunctd2, fixtddi2, dfp_ddedpd_<mode>,
	dfp_denbcd_<mode>, dfp_dxex_<mode>, dfp_diex_<mode>, dfp_dscli_<mode>,
	dfp_dscri_<mode>): Change type attribute to dfp.
	* config/rs6000/crypto.md (crypto_vshasigma<CR_char>): Change type
	attribute to vecsimple.
	* config/rs6000/rs6000.c (power9_cost): Update costs, cache size
	and prefetch streams.
	(rs6000_option_override_internal): Remove temporary code setting
	tuning to power8.  Don't set rs6000_sched_groups for power9.
	(last_scheduled_insn): Change to rtx_insn *.
	(divide_cnt, vec_load_pendulum): New variables.
	(rs6000_adjust_cost): Add Power9 to test for store->load separation.
	(rs6000_issue_rate): Set issue rate for Power9.
	(is_power9_pairable_vec_type): New.
	(power9_sched_reorder2): New.
	(rs6000_sched_reorder2): Call new function for Power9 specific
	reordering.
	(insn_must_be_first_in_group): Remove Power9.
	(insn_must_be_last_in_group): Likewise.
	(force_new_group): Likewise.
	(rs6000_sched_init): Fix initialization of last_scheduled_insn.
	Initialize divide_cnt/vec_load_pendulum.
	(_rs6000_sched_context, rs6000_init_sched_context,
	rs6000_set_sched_context): Handle context save/restore of new
	variables.

From-SVN: r237820

committed Jun 28, 2016

eda328bf Browse Files

tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p): Properly handle… · 7d4cdbd4

tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p): Properly handle DECL_BIT_FIELD_REPRESENTATIVE occuring as COMPONENT_REF operand.

2016-06-28  Richard Biener  <rguenther@suse.de>

	* tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p):
	Properly handle DECL_BIT_FIELD_REPRESENTATIVE occuring as
	COMPONENT_REF operand.
	(nonoverlapping_component_refs_p): Likewise.
	* stor-layout.c (start_bitfield_representative): Mark
	DECL_BIT_FIELD_REPRESENTATIVE as DECL_NONADDRESSABLE_P.

From-SVN: r237818

committed Jun 28, 2016

7d4cdbd4 Browse Files

Makefile.in: Don't cat ../stage_current if it does not exist. · e9ac1f86

	* Makefile.in: Don't cat ../stage_current if it does not exist.
c/
	* Make-lang.in: Don't cat ../stage_current if it does not exist.
cp/
	* Make-lang.in: Don't cat ../stage_current if it does not exist.
lto/
	* Make-lang.in: Don't cat ../stage_current if it does not exist.

From-SVN: r237817

committed Jun 28, 2016

e9ac1f86 Browse Files

extend.texi (__builtin_add_overflow_p): Clarify behavior when last argument is a bit-field. · 35ca24a2
```
	* doc/extend.texi (__builtin_add_overflow_p): Clarify behavior when
	last argument is a bit-field.

From-SVN: r237816
```
Jakub Jelinek committed Jun 28, 2016
35ca24a2 Browse Files

re PR rtl-optimization/71673 (FAIL:… · 95ef39f4

re PR rtl-optimization/71673 (FAIL: c-c++-common/torture/builtin-arith-overflow-p-19.c -O2  (internal compiler error))

	PR rtl-optimization/71673
	* internal-fn.c (expand_arith_overflow_result_store): Use
	OPTAB_LIB_WIDEN instead of OPTAB_DIRECT as last argument to
	expand_simple_binop.

From-SVN: r237815

committed Jun 28, 2016

95ef39f4 Browse Files

re PR middle-end/66867 (Suboptimal code generation for atomic_compare_exchange) · 849a76a5

	PR middle-end/66867
	* builtins.c (expand_ifn_atomic_compare_exchange_into_call,
	expand_ifn_atomic_compare_exchange): New functions.
	* internal-fn.c (expand_ATOMIC_COMPARE_EXCHANGE): New function.
	* tree.h (build_call_expr_internal_loc): Rename to ...
	(build_call_expr_internal_loc_array): ... this.  Fix up type of
	last argument.
	* internal-fn.def (ATOMIC_COMPARE_EXCHANGE): New internal fn.
	* predict.c (expr_expected_value_1): Handle IMAGPART_EXPR of
	ATOMIC_COMPARE_EXCHANGE result.
	* builtins.h (expand_ifn_atomic_compare_exchange): New prototype.
	* gimple-fold.h (optimize_atomic_compare_exchange_p,
	fold_builtin_atomic_compare_exchange): New prototypes.
	* gimple-fold.c (optimize_atomic_compare_exchange_p,
	fold_builtin_atomic_compare_exchange): New functions..
	* tree-ssa.c (execute_update_addresses_taken): If
	optimize_atomic_compare_exchange_p, ignore &var in 2nd argument
	of call when finding addressable vars, and if such var becomes
	non-addressable, call fold_builtin_atomic_compare_exchange.

From-SVN: r237814

committed Jun 28, 2016

849a76a5 Browse Files

rs6000: Fix split of ashdi3_extswsli_dot for memory (PR71670) · a8264058

The splitter for ashdi3_extswsli_dot for cr0 with memory uses emit_insn
gen_ashdi3_extswsli_dot, which does not work because that emits a scratch,
while the splitter runs after reload so there should be a real register
instead.  We can laboriously fix that up, or emit using
gen_ashdi3_extswsli_dot2 instead.  This patch does the latter.


	PR target/71670
	* config/rs6000/rs6000.md (ashdi3_extswsli_dot): Use
	gen_ashdi3_extswsli_dot2 instead of gen_ashdi3_extswsli_dot.

gcc/testsuite/
	PR target/71670
	* gcc.target/powerpc/pr71670.c: New testcase.

From-SVN: r237813

committed Jun 28, 2016

a8264058 Browse Files

rs6000.md ('type' attribute): Add veclogical,veccmpfx,vecexts,vecmove insn types. · 7c788ce2

	* config/rs6000/rs6000.md ('type' attribute): Add
	veclogical,veccmpfx,vecexts,vecmove insn types.
	(*abs<mode>2_fpr, *nabs<mode>2_fpr, *neg<mode>2_fpr, *extendsfdf2_fpr,
	copysign<mode>3_fcpsgn, trunc<mode>df2_internal1, neg<mode>2_internal,
	p8_fmrgow_<mode>, pack<mode>): Change type to fpsimple.
	(*xxsel<mode>, copysign<mode>3_hard, neg<mode>2_hw, abs<mode>2_hw,
	*nabs<mode>2_hw): Change type to vecmove.
	(*and<mode>3_internal, *bool<mode>3_internal, *boolc<mode>3_internal,
	*boolcc<mode>3_internal, *eqv<mode>3_internal,
	*one_cmpl<mode>3_internal, *ieee_128bit_vsx_neg<mode>2_internal,
	*ieee_128bit_vsx_abs<mode>2_internal,
	*ieee_128bit_vsx_nabs<mode>2_internal, extendkftf2, trunctfkf2,
	*ieee128_mfvsrd_64bit, *ieee128_mfvsrd_32bit, *ieee128_mtvsrd_64bit,
	*ieee128_mtvsrd_32bit): Change type to veclogical.
	(mov<mode>_hardfloat, *mov<mode>_hardfloat32, *mov<mode>_hardfloat64,
	*movdi_internal32, *movdi_internal64): Update insn types.
	* config/rs6000/vsx.md (*vsx_le_undo_permute_<mode>,
	vsx_extract_<mode>): Change type to veclogical.
	(*vsx_xxsel<mode>, *vsx_xxsel<mode>_uns): Change type to vecmove.
	(vsx_sign_extend_qi_<mode>, *vsx_sign_extend_hi_<mode>,
	*vsx_sign_extend_si_v2di): Change type to vecexts.
	* config/rs6000/altivec.md (*altivec_mov<mode>, *altivec_movti): Change
	type to veclogical.
	(*altivec_eq<mode>, *altivec_gt<mode>, *altivec_gtu<mode>,
	*altivec_vcmpequ<VI_char>_p, *altivec_vcmpgts<VI_char>_p,
	*altivec_vcmpgtu<VI_char>_p): Change type to veccmpfx.
	(*altivec_vsel<mode>, *altivec_vsel<mode>_uns): Change type to vecmove.
	* config/rs6000/dfp.md (*negdd2_fpr, *absdd2_fpr, *nabsdd2_fpr,
	negtd2, *abstd2_fpr, *nabstd2_fpr): Change type to fpsimple.
	* config/rs6000/40x.md (ppc405-float): Add fpsimple.
	* config/rs6000/440.md (ppc440-fp): Add fpsimple.
	* config/rs6000/476.md (ppc476-fp): Add fpsimple.
	* config/rs6000/601.md (ppc601-fp): Add fpsimple.
	* config/rs6000/603.md (ppc603-fp): Add fpsimple.
	* config/rs6000/6xx.md (ppc604-fp): Add fpsimple.
	* config/rs6000/7xx.md (ppc750-fp): Add fpsimple.
	(ppc7400-vecsimple): Add veclogical, vecmove, veccmpfx.
	* config/rs6000/7450.md (ppc7450-fp): Add fpsimple.
	(ppc7450-vecsimple): Add veclogical, vecmove.
	(ppc7450-veccmp): Add veccmpfx.
	* config/rs6000/8540.md (ppc8540_simple_vector): Add veclogical,
	vecmove.
	(ppc8540_vector_compare): Add veccmpfx.
	* config/rs6000/a2.md (ppca2-fp): Add fpsimple.
	* config/rs6000/cell.md (cell-fp): Add fpsimple.
	(cell-vecsimple): Add veclogical, vecmove.
	(cell-veccmp): Add veccmpfx.
	* config/rs6000/e300c2c3.md (ppce300c3_fp): Add fpsimple.
	* config/rs6000/e6500.md (e6500_vecsimple): Add veclogical, vecmove,
	veccmpfx.
	* config/rs6000/mpc.md (mpccore-fp): Add fpsimple.
	 * config/rs6000/power4.md (power4-fp): Add fpsimple.
	(power4-vecsimple): Add veclogical, vecmove.
	(power4-veccmp): Add veccmpfx.
	* config/rs6000/power5.md (power5-fp): Add fpsimple.
	* config/rs6000/power6.md (power6-fp): Add fpsimple.
	(power6-vecsimple): Add veclogical, vecmove.
	(power6-veccmp): Add veccmpfx.
	* config/rs6000/power7.md (power7-fp): Add fpsimple.
	(power7-vecsimple): Add veclogical, vecmove, veccmpfx.
	* config/rs6000/power8.md (power8-fp): Add fpsimple.
	(power8-vecsimple): Add veclogical, vecmove, veccmpfx.
	* config/rs6000/rs64.md (rs64a-fp): Add fpsimple.
	* config/rs6000/titan.md (titan_fp): Add fpsimple.
	* config/rs6000/xfpu.md (fp-default, fp-addsub-s, fp-addsub-d): Add
	fpsimple.
	* config/rs6000/rs6000.c (rs6000_adjust_cost): Add TYPE_FPSIMPLE.

From-SVN: r237812

committed Jun 28, 2016

7c788ce2 Browse Files

re PR target/71656 (ICE in reload when generating code for -mcpu=power9 -mpower9-dform-vector) · 0dc47331

gcc/
	PR target/71656
	* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add
	OPTION_MASK_P9_DFORM_VECTOR.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
	disable -mpower9-dform-vector when using reload.
	(quad_address_p): Remove 'gpr_p' argument and all associated code.
	New 'strict' argument.  Update all callers.  Add strict addressing
	support.
	(rs6000_legitimate_offset_address_p): Remove call to
	virtual_stack_registers_memory_p.
	(rs6000_legitimize_reload_address): Add quad address support.
	(rs6000_legitimate_address_p): Move call to quad_address_p above
	call to virtual_stack_registers_memory_p.  Adjust quad_address_p args
	to account for new strict usage.
	(rs6000_output_move_128bit): Adjust quad_address_p args to account
	for new strict usage.
	* config/rs6000/predicates.md (quad_memory_operand): Likewise.

gcc/testsuite/
	PR target/71656
	* gcc.target/powerpc/pr71656-1.c: New test.
	* gcc.target/powerpc/pr71656-2.c: New test.

From-SVN: r237811

committed Jun 27, 2016

0dc47331 Browse Files

Daily bump. · f0388d83
```
From-SVN: r237810
```
GCC Administrator committed Jun 28, 2016
f0388d83 Browse Files

vsx.md (UNSPEC_P9_MEMORY): New unspec to support loading and storing… · ac11b8c0

vsx.md (UNSPEC_P9_MEMORY): New unspec to support loading and storing byte/half-word values in the vector...

[gcc]
2016-06-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (UNSPEC_P9_MEMORY): New unspec to support
	loading and storing byte/half-word values in the vector registers.
	(vsx_sign_extend_hi_<mode>): Enable the generator function.
	(p9_lxsi<wd>zx): New insns to load zero-extended bytes and
	half-words on ISA 3.0 to the vector registers.
	(p9_stxsi<wd>zx): New insns to store zero-extended bytes and
	half-words on ISA 3.0 from the vector registers.
	* config/rs6000/rs6000.md (FP_ISA3): New iterator to optimize
	converting char/half-word items to floating point on ISA 3.0.
	(float<QHI:mode><FP_ISA3:mode>2): On ISA 3.0 generate the lxsihzx
	and lxsibzx instructions if we are converting an 8-bit or 16-bit
	item from memory to floating point.
	(float<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
	(floatuns<QHI:mode><FP_ISA3:mode>2): Likewise.
	(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
	(fix_trunc<SFDF:mode><QHI:mode>2): On ISA 3.0 generate the stxsihx
	and stxsibx instructions to store floating point values converted
	to 8 or 16-bit integers.
	(fixuns_trunc<mode>si2): Likewise.

[gcc/testsuite]
2016-06-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/p9-fpcvt-1.c: New test to test ISA 3.0 load
	byte/half-word to vector registers and store byte/half-word from
	vector register instructions.
	* gcc.target/powerpc/p9-fpcvt-2.c: Likewise.

From-SVN: r237806

committed Jun 28, 2016

ac11b8c0 Browse Files

27 Jun, 2016 3 commits

re PR libstdc++/71640 (include/c++/7.0.0/bits/hashtable.h:293:7: error: too many… · dc448fa0

re PR libstdc++/71640 (include/c++/7.0.0/bits/hashtable.h:293:7: error: too many template parameters in template redeclaration)

2016-06-27  François Dumont  <fdumont@gcc.gnu.org>

	PR libstdc++/71640
	* include/bits/hashtable.h: Remove _Unique_keya parameter in _Insert
	friend declaration.

From-SVN: r237803

committed Jun 27, 2016

dc448fa0 Browse Files

[ARM][testsuite] Add missing guards to fp16 AdvSIMD tests · b65ffc79

2016-06-27  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vget_lane.c: Add ifdef
	around fp16 code.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c:
	Add arm_neon_fp16_ok effective target.
	* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c: Likewise.

From-SVN: r237798

committed Jun 27, 2016

b65ffc79 Browse Files

Daily bump. · 74a1b6ff
```
From-SVN: r237797
```
GCC Administrator committed Jun 27, 2016
74a1b6ff Browse Files

26 Jun, 2016 6 commits

i386.c (ix86_spill_class): Disable condition to always return NO_REGS. · fb4f1c08
```
	* config/i386/i386.c (ix86_spill_class): Disable condition to
	always return NO_REGS.

From-SVN: r237793
```
Uros Bizjak committed Jun 26, 2016
fb4f1c08 Browse Files

re PR rtl-optimization/70902 (GCC freezes while compiling for 'skylake-avx512' target) · 6423315e

	PR target/70902
	PR target/71453
	PR target/71555
	PR target/71596
	PR target/71657
	* config/i386/i386.c (TARGET_SPILL_CLASS): #if 0 out the definition.
	(ix86_spill_class): Disable to always return NO_REGS.

From-SVN: r237792

committed Jun 26, 2016

6423315e Browse Files

predict-12.c: New testcase. · 9bb86f40


	* gcc.dg/predict-12.c: New testcase.

	* predict.c: Include gimple-pretty-print.h
	(predicted_by_loop_heuristics_p): Check also
	PRED_LOOP_EXIT_WITH_RECURSION
	(predict_loops): Find self recursive calls and use special purpose
	predictors for them; dump log about decisions.
	(pass_profile::execute): Dump info about #of iterations.
	* predict.def (PRED_LOOP_EXIT_WITH_RECURSION,
	(PRED_LOOP_GUARD_WITH_RECURSION): New predictors.

From-SVN: r237791

committed Jun 26, 2016

9bb86f40 Browse Files

pa.c (pa_output_indirect_call): Rework to combine output_asm_insn calls and shorten long lines. · 445f9a50

	* config/pa/pa.c (pa_output_indirect_call): Rework to combine
	output_asm_insn calls and shorten long lines.  Output .CALL
	argument descriptor using pa_output_arg_descriptor.  Add various
	inline $$dyncall and other optimizations.
	(pa_attr_length_indirect_call): Adjust ordering and lengths.

From-SVN: r237790

committed Jun 26, 2016

445f9a50 Browse Files

re PR fortran/71649 (Internal compiler error) · 46db0fd4

2016-06-25  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

	PR fortran/71649
	* module.c (create_intrinsic_function): Check for NULL values and
	return after giving error.

	PR fortran/71649
	* gfortran.dg/pr71649.f90: New test.

From-SVN: r237789

committed Jun 26, 2016

46db0fd4 Browse Files

Daily bump. · 9bbbddab
```
From-SVN: r237788
```
GCC Administrator committed Jun 26, 2016
9bbbddab Browse Files

25 Jun, 2016 6 commits

Add missing ChangeLog entries for r237765 · b20b79f2
```
From-SVN: r237784
```
H.J. Lu committed Jun 25, 2016
b20b79f2 Browse Files

re PR tree-optimization/71643 (internal compiler error: in redirect_eh_edge_1,… · f8a06e24

re PR tree-optimization/71643 (internal compiler error: in redirect_eh_edge_1, at tree-eh.c:2318 after r237427)

	PR tree-optimization/71643
	* tree-ssa-tail-merge.c (find_clusters_1): Ignore basic blocks with
	EH preds.

	* tree-ssa-tail-merge.c (deps_ok_for_redirect_from_bb_to_bb): Don't
	leak a bitmap if dep_bb is NULL.

	* g++.dg/opt/pr71643.C: New test.

From-SVN: r237783

committed Jun 25, 2016

f8a06e24 Browse Files

re PR tree-optimization/71631 (Wrong constant folding) · 2a65e70b

	PR tree-optimization/71631
	* tree-ssa-reassoc.c (reassociate_bb): Pass true as last argument
	to rewrite_expr_tree even if negate_result, move new_lhs var
	declaration and initialization earlier, for powi_result set afterwards
	new_lhs to lhs.  For negate_result, use new_lhs instead of tmp
	if new_lhs != lhs, and don't shadow gsi var.

	* gcc.c-torture/execute/pr71631.c: New test.

From-SVN: r237782

committed Jun 25, 2016

2a65e70b Browse Files

predict.c (predict_paths_leading_to, [...]): Add in_loop parameter. · 7805417a


	* predict.c (predict_paths_leading_to, predict_paths_leading_to_edge):
	Add in_loop parameter.
	(predict_loops): Add loop guard heuristics.
	* predict.def (PRED_LOOP_GUARD): New heuristics.

	* gcc.dg/predict-11.c: New testcase.
	* gfortran.dg/predict-2.f90: New testcase.

From-SVN: r237781

committed Jun 25, 2016

7805417a Browse Files

predict.c: Include ipa-utils.h · 888ed1a3

	* predict.c: Include ipa-utils.h
	(tree_bb_level_prediction): Predict recursive calls.
	(tree_estimate_probability_bb): Skip inexpensive calls for call
	predictor.
	* predict.def (PRED_RECURSIVE_CALL): New.

	* gcc.dg/predict-10.c: New test.

From-SVN: r237780

committed Jun 25, 2016

888ed1a3 Browse Files

Daily bump. · 1527dee9
```
From-SVN: r237779
```
GCC Administrator committed Jun 25, 2016
1527dee9 Browse Files

24 Jun, 2016 4 commits

P0145R2: Refining Expression Order for C++ (complex LHS of =). · a25bd9e6

gcc/c-common/
	* c-common.c (verify_tree) [COMPOUND_EXPR]: Fix handling on LHS of
	MODIFY_EXPR.
gcc/cp/
	* typeck.c (cp_build_modify_expr): Leave COMPOUND_EXPR on LHS.

From-SVN: r237775

committed Jun 24, 2016

a25bd9e6 Browse Files

rs6000-builtin.def (BU_FLOAT128_2): New #define. · 53605f35

[gcc]

2016-06-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000-builtin.def (BU_FLOAT128_2): New #define.
	(BU_FLOAT128_1): Likewise.
	(FABSQ): Likewise.
	(COPYSIGNQ): Likewise.
	(RS6000_BUILTIN_NANQ): Likewise.
	(RS6000_BUILTIN_NANSQ): Likewise.
	(RS6000_BUILTIN_INFQ): Likewise.
	(RS6000_BUILTIN_HUGE_VALQ): Likewise.
	* config/rs6000/rs6000.c (rs6000_fold_builtin): New prototype.
	(TARGET_FOLD_BUILTIN): New #define.
	(rs6000_builtin_mask_calculate): Add TARGET_FLOAT128 entry.
	(rs6000_invalid_builtin): Add handling for RS6000_BTM_FLOAT128.
	(rs6000_fold_builtin): New target hook implementation, handling
	folding of 128-bit NaNs and infinities.
	(rs6000_init_builtins): Initialize const_str_type_node; ensure all
	entries are filled in to avoid problems during bootstrap
	self-test; define builtins for 128-bit NaNs and infinities.
	(rs6000_opt_mask): Add entry for float128.
	* config/rs6000/rs6000.h (RS6000_BTM_FLOAT128): New #define.
	(RS6000_BTM_COMMON): Include RS6000_BTM_FLOAT128.
	(rs6000_builtin_type_index): Add RS6000_BTI_const_str.
	(const_str_type_node): New #define.
	* config/rs6000/rs6000.md (copysign<mode>3 for IEEE128): Convert
	to a define_expand that dispatches to either copysign<mode>3_soft
	or copysign<mode>3_hard.
	(copysign<mode>3_hard): Rename from copysign<mode>3.
	(copysign<mode>3_soft): New define_insn.
	* doc/extend.texi: Document new builtins.

[gcc/testsuite]

2016-06-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/abs128-1.c: New.
	* gcc.target/powerpc/copysign128-1.c: New.
	* gcc.target/powerpc/inf128-1.c: New.
	* gcc.target/powerpc/nan128-1.c: New.

From-SVN: r237774

committed Jun 24, 2016

53605f35 Browse Files

Fix get_target_expr for bit-field expressions. · 6e085858

	* tree.c (get_target_expr_sfinae): Handle bit-fields.
	(build_target_expr): Call mark_rvalue_use.

From-SVN: r237773

committed Jun 24, 2016

6e085858 Browse Files

cfgloop.c (flow_loop_dump): Cast nit to uint64_t and print it using PRIu64 instead of lu. · 65e009bb
```
	* cfgloop.c (flow_loop_dump): Cast nit to uint64_t and print it using
	PRIu64 instead of lu.

From-SVN: r237772
```
Jakub Jelinek committed Jun 24, 2016
65e009bb Browse Files