1. 18 Oct, 2013 17 commits
  2. 17 Oct, 2013 23 commits
    • p8vector-fp.c: New test for floating point scalar operations when... · bbeb4553
      2013-10-03  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* gcc.target/powerpc/p8vector-fp.c: New test for floating point
      	scalar operations when using -mupper-regs-sf and -mupper-regs-df.
      	* gcc.target/powerpc/ppc-target-1.c: Update tests to allow either
      	VSX scalar operations or the traditional floating point form of
      	the instruction.
      	* gcc.target/powerpc/ppc-target-2.c: Likewise.
      	* gcc.target/powerpc/recip-3.c: Likewise.
      	* gcc.target/powerpc/recip-5.c: Likewise.
      	* gcc.target/powerpc/pr72747.c: Likewise.
      	* gcc.target/powerpc/vsx-builtin-3.c: Likewise.
      
      From-SVN: r203800
      Michael Meissner committed
    • builtin-apply2.c: Skip test on arm hardfloat ABI targets. · 92fd70fb
      2013-10-17  Charles Bayis  <charles.baylis@linaro.org>
      
      	* gcc.dg/builtin-apply2.c: Skip test on arm hardfloat ABI targets.
      	* gcc.dg/tls/pr42894.c: Remove dg-options for arm*-*-* targets.
      	* gcc.target/arm/thumb-ltu.c: Remove dg-skip-if and require
      	effective target arm_thumb1_ok.
      	* lib/target-supports.exp
      	(check_effective_target_arm_fp16_ok_nocache): Don't force
      	-mfloat-abi=soft when building for hardfloat target.
      
      From-SVN: r203799
      Charles Baylis committed
    • regex.h (regex_token_iterator<>::regex_token_iterator): Fix initialization… · ab1c993b
      regex.h (regex_token_iterator<>::regex_token_iterator): Fix initialization orders in initialization list and add explicit braces for...
      
      2013-10-17  Tim Shen  <timshen91@gmail.com>
      
      	* include/bits/regex.h (regex_token_iterator<>::regex_token_iterator):
      	Fix initialization orders in initialization list and add explicit braces
      	for potentially ambiguous(actually not) `else` branch to eliminate
      	warnings.
      	* include/bits/regex_automaton.h (_NFA<>::_NFA): Likewise.
      	* include/bits/regex_compiler.h (_CharMatcher<>::_CharMatcher,
      	_BracketMatcher<>::_BracketMatcher): Likewise.
      	* include/bits/regex_compiler.tcc (_Compiler<>::_Compiler,
      	_Compiler<>::_M_atom): Likewise.
      	* include/bits/regex_executor.h (_Executor<>::_Executor): Likewise.
      	* include/bits/regex_executor.tcc (_DFSExecutor<>::_M_dfs,
      	_Executor<>::_M_word_boundry): Likewise.
      	* include/bits/regex_scanner.tcc (_Scanner<>::_Scanner,
      	_Scanner<>::_M_eat_class): Likewise.
      	* include/bits/regex.tcc (__regex_algo_impl<>,
      	regex_iterator<>::operator++): Likewise, and remove unused typedef.
      
      From-SVN: r203798
      Tim Shen committed
    • Fix typo in ChangeLog · 358e1993
      From-SVN: r203797
      Michael Meissner committed
    • rs6000.c (enum rs6000_reload_reg_type): Add new fields to the reg_addr array… · 3170766c
      rs6000.c (enum rs6000_reload_reg_type): Add new fields to the reg_addr array that describes the valid addressing mode...
      
      2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
      	fields to the reg_addr array that describes the valid addressing
      	mode for any register, general purpose registers, floating point
      	registers, and Altivec registers.
      	(FIRST_RELOAD_REG_CLASS): Likewise.
      	(LAST_RELOAD_REG_CLASS): Likewise.
      	(struct reload_reg_map_type): Likewise.
      	(reload_reg_map_type): Likewise.
      	(RELOAD_REG_VALID): Likewise.
      	(RELOAD_REG_MULTIPLE): Likewise.
      	(RELOAD_REG_INDEXED): Likewise.
      	(RELOAD_REG_OFFSET): Likewise.
      	(RELOAD_REG_PRE_INCDEC): Likewise.
      	(RELOAD_REG_PRE_MODIFY): Likewise.
      	(reg_addr): Likewise.
      	(mode_supports_pre_incdec_p): New helper functions to say whether
      	a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
      	(mode_supports_pre_modify_p): Likewise.
      	(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
      	print the valid address mode bits for each mode.
      	(rs6000_debug_print_mode): Likewise.
      	(rs6000_debug_reg_global): Likewise.
      	(rs6000_setup_reg_addr_masks): New function to set up the address
      	mask bits for each type.
      	(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
      	Call rs6000_setup_reg_addr_masks to set up the address mask bits.
      	(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
      	mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
      	PRE_MODIFY are supported.
      	(rs6000_output_move_128bit): Change to use {src,dest}_vmx_p for altivec
      	registers, instead of {src,dest}_av_p.
      	(rs6000_print_options_internal): Tweak the debug output slightly.
      
      From-SVN: r203791
      Michael Meissner committed
    • rs6000.c (enum rs6000_reload_reg_type): Add new fields to the reg_addr array… · 5845f602
      rs6000.c (enum rs6000_reload_reg_type): Add new fields to the reg_addr array that describes the valid addressing mode...
      
      2013-10-07  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	* config/rs6000/rs6000.c (enum rs6000_reload_reg_type): Add new
      	fields to the reg_addr array that describes the valid addressing
      	mode for any register, general purpose registers, floating point
      	registers, and Altivec registers.
      	(FIRST_RELOAD_REG_CLASS): Likewise.
      	(LAST_RELOAD_REG_CLASS): Likewise.
      	(struct reload_reg_map_type): Likewise.
      	(reload_reg_map_type): Likewise.
      	(RELOAD_REG_VALID): Likewise.
      	(RELOAD_REG_MULTIPLE): Likewise.
      	(RELOAD_REG_INDEXED): Likewise.
      	(RELOAD_REG_OFFSET): Likewise.
      	(RELOAD_REG_PRE_INCDEC): Likewise.
      	(RELOAD_REG_PRE_MODIFY): Likewise.
      	(reg_addr): Likewise.
      	(mode_supports_pre_incdec_p): New helper functions to say whether
      	a given mode supports PRE_INC, PRE_DEC, and PRE_MODIFY.
      	(mode_supports_pre_modify_p): Likewise.
      	(rs6000_debug_vector_unit): Rearrange the -mdebug=reg output to
      	print the valid address mode bits for each mode.
      	(rs6000_debug_print_mode): Likewise.
      	(rs6000_debug_reg_global): Likewise.
      	(rs6000_setup_reg_addr_masks): New function to set up the address
      	mask bits for each type.
      	(rs6000_init_hard_regno_mode_ok): Use memset to clear arrays.
      	Call rs6000_setup_reg_addr_masks to set up the address mask bits.
      	(rs6000_legitimate_address_p): Use mode_supports_pre_incdec_p and
      	mode_supports_pre_modify_p to determine if PRE_INC, PRE_DEC, and
      	PRE_MODIFY are supported.
      	(rs6000_print_options_internal): Tweak the debug output slightly.
      
      From-SVN: r203790
      Michael Meissner committed
    • sse.md (*vec_widen_smult_even_v8si): Remove isa attribute. · 82e33890
      	* config/i386/sse.md (*vec_widen_smult_even_v8si): Remove
      	isa attribute.
      
      From-SVN: r203787
      Uros Bizjak committed
    • tree-flow.h (struct omp_region): Move to omp-low.c. · 0645c1a2
      	* tree-flow.h (struct omp_region): Move to omp-low.c.
      	Remove omp_ prototypes and variables.
      	* gimple.h (omp_reduction_init): Move prototype to omp-low.h.
      	(copy_var_decl): Relocate prototype from tree-flow.h.
      	* gimple.c (copy_var_decl): Relocate from omp-low.c.
      	* tree.h: Move prototype to omp-low.h.
      	* omp-low.h: New File.  Relocate prototypes here.
      	* omp-low.c (struct omp_region): Make local here.
      	(root_omp_region): Make static.
      	(copy_var_decl) Move to gimple.c.
      	(new_omp_region): Make static.
      	(make_gimple_omp_edges): New.  Refactored from tree-cfg.c make_edges.
      	* tree-cfg.c: Include omp-low.h.
      	(make_edges): Factor out OMP specific bits to make_gimple_omp_edges.
      	* gimplify.c: Include omp-low.h.
      	* tree-parloops.c: Likewise.
      
      	c
      	* c-parser.c: Include omp-low.h.
      	* c-typeck.c: Likewise.
      
      	cp
      	* parser.c: Include omp-low.h.
      	* semantics.c: Likewise.
      
      	fortran
      	* trans-openmp.c: Include omp-low.h.
      
      From-SVN: r203786
      Andrew MacLeod committed
    • i386.c (ix86_fixup_binary_operands): When both source operands are in memory... · 6f1abb55
      	* config/i386/i386.c (ix86_fixup_binary_operands): When both source
      	operands are in memory, prefer to force non-matched operand 1 to
      	the register.
      
      From-SVN: r203785
      Uros Bizjak committed
    • re PR libmudflap/58230 (multiple test fail in german language version) · 5ce6ee81
      2013-10-17  Bernd Edlinger  <bernd.edlinger@hotmail.de>
      
              PR libmudflap/58230
              * testsuite/lib/mfdg.exp: Use C locale.
      
      From-SVN: r203783
      Bernd Edlinger committed
    • re PR target/58673 (ICE in final_scan_insn for movti_ppc64 with base+offset address) · 74fee7e9
      [gcc]
      2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	PR target/58673
      	* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
      	restrict TImode addresses to single indirect registers if both
      	-mquad-memory and -mvsx-timode are used.
      	(rs6000_output_move_128bit): Use quad_load_store_p to determine if
      	we should emit load/store quad.  Remove using %y for quad memory
      	addresses.
      
      	* config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add
      	constraints to allow load/store quad on machines where TImode is
      	not allowed in VSX registers.  Use 'n' instead of 'F' constraint
      	for TImode to load integer constants.
      
      [gcc/testsuite]
      2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	PR target/58673
      	* gcc.target/powerpc/pr58673-1.c: New file to test whether
      	-mquad-word + -mno-vsx-timode causes errors.
      	* gcc.target/powerpc/pr58673-2.c: Likewise.
      
      From-SVN: r203782
      Michael Meissner committed
    • re PR target/58673 (ICE in final_scan_insn for movti_ppc64 with base+offset address) · 1ddbbbc0
      [gcc]
      2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	PR target/58673
      	* config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
      	restrict TImode addresses to single indirect registers if both
      	-mquad-memory and -mvsx-timode are used.
      	(rs6000_output_move_128bit): Use quad_load_store_p to determine if
      	we should emit load/store quad.  Remove using %y for quad memory
      	addresses.
      
      	* config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add
      	constraints to allow load/store quad on machines where TImode is
      	not allowed in VSX registers.  Use 'n' instead of 'F' constraint
      	for TImode to load integer constants.
      
      [gcc/testsuite]
      2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	PR target/58673
      	* gcc.target/powerpc/pr58673-1.c: New file to test whether
      	-mquad-word + -mno-vsx-timode causes errors.
      	* gcc.target/powerpc/pr58673-2.c: Likewise.
      
      From-SVN: r203781
      Michael Meissner committed
    • re PR c++/58596 ([c++11] ICE with decltype in non-static data member initializer) · 206b48e4
      /cp
      2013-10-17  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR c++/58596
      	* lambda.c (lambda_expr_this_capture): Handle NSDMIs in the
      	cp_unevaluated_operand case.
      
      /testsuite
      2013-10-17  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR c++/58596
      	* g++.dg/cpp0x/lambda/lambda-nsdmi5.C: New
      
      From-SVN: r203780
      Paolo Carlini committed
    • aarch64.c (aarch64_print_operand): Handle 'c'. · f541a481
      [gcc/]
      2013-10-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
      
      	* config/aarch64/aarch64.c (aarch64_print_operand): Handle 'c'.
      
      [gcc/testsuite/]
      2013-10-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
      
      	* gcc.target/aarch64/c-output-template.c: New testcase.
      	* gcc.target/aarch64/c-output-template-2.c: Likewise.
      	* gcc.target/aarch64/c-output-template-3.c: Likewise.
      
      From-SVN: r203779
      Kyrylo Tkachov committed
    • [AArch64] Enable building libatomic on AArch64. · a115cf9c
      From-SVN: r203774
      Michael Hudson-Doyle committed
    • [AArch64] Enable effective_target_sync_long_long* · fbb1d5dc
      From-SVN: r203773
      Michael Hudson-Doyle committed
    • [multiple changes] · 2ed3eba1
      2013-10-17  Hristian Kirtchev  <kirtchev@adacore.com>
      
      	* sem_prag.adb (Check_Dependency_Clause):
      	Recognize the scenario where successful clause matching has
      	depleted the available refinement items and the clause to match
      	technically refines to null => null.
      
      2013-10-17  Tristan Gingold  <gingold@adacore.com>
      
      	* exp_prag.adb (Expand_Pragma_Import_Or_Interface): Specify
      	External_Name instead of Link_Name for the RTTI declaration.
      
      From-SVN: r203769
      Arnaud Charlet committed
    • [multiple changes] · a7d08a38
      2013-10-17  Yannick Moy  <moy@adacore.com>
      
      	* sem_res.adb (Resolve_Short_Circuit): Only
      	generate expression-with-action when full expansion is set.
      
      2013-10-17  Yannick Moy  <moy@adacore.com>
      
      	* debug.adb Remove obsolete comment.
      
      2013-10-17  Thomas Quinot  <quinot@adacore.com>
      
      	* exp_ch4.adb (Process_Transient_Object.Find_Enclosing_Contexts):
      	Avoid late insertion when expanding an expression with action
      	nested within a transient block; Do not inconditionally generate
      	a finalization call if the generated object is from a specific
      	branch of a conditional expression.
      
      2013-10-17  Pascal Obry  <obry@adacore.com>
      
      	* g-arrspl.adb: Ensure Finalize call is idempotent.
      	* g-arrspl.adb (Finalize): Makes the call idempotent.
      
      From-SVN: r203768
      Arnaud Charlet committed
    • [multiple changes] · a9895094
      2013-10-17  Robert Dewar  <dewar@adacore.com>
      
      	* sem_prag.adb (Record_Possible_Body_Reference): Fix test for
      	being in body.
      	(Add_Constituent): Merged into Check_Refined_Global_Item.
      	(Check_Matching_Constituent): A constituent that has the proper Part_Of
      	option and comes from a private child or a sibling is now collected.
      	(Check_Matching_Modes): Merged into Check_Refined_Global_Item.
      	(Check_Refined_Global_Item): Code cleanup.
      	(Collect_Constituent): New routine.
      	(Inconsistent_Mode_Error): Moved out from Check_Matching_Modes.
      
      2013-10-17  Ed Schonberg  <schonberg@adacore.com>
      
      	* freeze.adb (Check_Current_Instance, Process): Add RM reference
      	and mention immutably limited types, when the current instance
      	is illegal in Ada 2012.
      
      2013-10-17  Ed Schonberg  <schonberg@adacore.com>
      
      	* sem_warn.adb (Check_Unused_Withs): If the main unit is a
      	subunit, apply the check to the units mentioned in its context
      	only. This provides additional warnings on with_clauses that
      	are superfluous.
      
      2013-10-17  Hristian Kirtchev  <kirtchev@adacore.com>
      
      	* sem_ch3.adb (Analyze_Declarations): Emit an
      	error message concerning state refinement when the spec defines at
      	least one non-null abstract state and the body's SPARK mode is On.
      	(Requires_State_Refinement): New routine.
      
      2013-10-17  Robert Dewar  <dewar@adacore.com>
      
      	* sem_ch7.ads: Comment fixes.
      
      2013-10-17  Robert Dewar  <dewar@adacore.com>
      
      	* sem_ch7.adb (Analyze_Package_Specification): Remove circuit
      	for ensuring that a package spec requires a body for some other
      	reason than that it contains the declaration of an abstract state.
      
      2013-10-17  Tristan Gingold  <gingold@adacore.com>
      
      	* exp_ch11.adb (Expand_N_Raise_Expression): Fix call of
      	Possible_Local_Raise.
      
      2013-10-17  Thomas Quinot  <quinot@adacore.com>
      
      	* exp_pakd.adb (Expand_Bit_Packed_Element_Set): Unchecked
      	conversion of Or_Rhs to Etype of New_Rhs is required only when
      	the latter is the result of a byte swap operation.
      
      2013-10-17  Thomas Quinot  <quinot@adacore.com>
      
      	* exp_dist.adb (Build_To_Any_Function): For a type with opaque
      	representation that is not transmitted as an unconstrained value,
      	use 'Write, not 'Output, to generate the opaque representation.
      
      2013-10-17  Yannick Moy  <moy@adacore.com>
      
      	* sem_res.adb (Resolve_Short_Circuit): Only
      	generate expression-with-action when full expansion is set.
      
      2013-10-17  Yannick Moy  <moy@adacore.com>
      
      	* debug.adb Remove obsolete comment.
      
      2013-10-17  Thomas Quinot  <quinot@adacore.com>
      
      	* exp_ch4.adb (Process_Transient_Object.Find_Enclosing_Contexts):
      	Avoid late insertion when expanding an expression with action
      	nested within a transient block; Do not inconditionally generate
      	a finalization call if the generated object is from a specific
      	branch of a conditional expression.
      
      2013-10-17  Pascal Obry  <obry@adacore.com>
      
      	* g-arrspl.adb: Ensure Finalize call is idempotent.
      	* g-arrspl.adb (Finalize): Makes the call idempotent.
      
      From-SVN: r203767
      Arnaud Charlet committed