2018-07-13  Tom de Vries  <tdevries@suse.de>

	* maintainers-verify.sh: New file.

	* gcc.src/maintainers.exp: New file.

From-SVN: r262627

	* config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp): Use
	arrays instead of numbered variables.

From-SVN: r262626

	* config/sparc/sparc-protos.h (sparc_compute_frame_size): Delete.
	* config/sparc/sparc.c (sparc_compute_frame_size): Make static

From-SVN: r262625

2018-07-13  Richard Biener  <rguenther@suse.de>

	PR debug/86452
	* dwarf2out.c (gen_type_die_with_usage): Use scope_die_for
	instead of get_context_die.

From-SVN: r262624

re PR tree-optimization/86489 (ICE in gimple_phi_arg starting with r261682 when building 531.deepsjeng_r with FDO + LTO)

gcc/ChangeLog:

2018-07-13  Kugan Vivekanandarajah  <kuganv@linaro.org>
	    Richard Biener  <rguenther@suse.de>

	PR middle-end/86489
	* tree-ssa-loop-niter.c (number_of_iterations_popcount): Check
	that the loop latch destination where phi is defined.

gcc/testsuite/ChangeLog:

2018-07-13  Kugan Vivekanandarajah  <kuganv@linaro.org>

	PR middle-end/86489
	* gcc.dg/pr86489.c: New test.


Co-Authored-By: Richard Biener <rguenther@suse.de>

From-SVN: r262622

From-SVN: r262620

gcc/testsuite/ChangeLog:
	g++.dg/warn/pr86453.C: Adjust.

From-SVN: r262609

	gcc/testsuite/
	* gnat.dg/warn5.adb: Expect warning for riscv*-*-*.

From-SVN: r262608

	gcc/
	2018-07-06  Kito Cheng  <kito.cheng@gmail.com>
        * config/riscv/riscv.c (enum riscv_privilege_levels): Add UNKNOWN_MODE.
        (riscv_expand_epilogue): Add assertion to check interrupt mode.
        (riscv_set_current_function): Extract getting interrupt type to new
        function.
        (riscv_get_interrupt_type): New function.
        (riscv_merge_decl_attributes): New function, checking interrupt type is
        same.
        (TARGET_MERGE_DECL_ATTRIBUTES): Define.

	gcc/testsuite/
	2018-07-06  Kito Cheng  <kito.cheng@gmail.com>
        * gcc.target/riscv/interrupt-conflict-mode.c: New.

From-SVN: r262607

	* c-attribs.c (c_common_attribute_table): Add
	"omp declare target implicit" attribute.

	* c-decl.c (c_decl_attributes): Don't diagnose vars without mappable
	type here, instead add "omp declare target implicit" attribute.
	(finish_decl): Diagnose vars without mappable type here.

	* decl2.c (cplus_decl_attributes): Don't diagnose vars without mappable
	type here, instead add "omp declare target implicit" attribute.  Add
	that attribute instead of "omp declare target" also when
	processing_template_decl.
	* decl.c (cp_finish_decl): Diagnose vars without mappable type here,
	and before calling cp_omp_mappable_type call complete_type.

	* c-c++-common/gomp/declare-target-3.c: New test.
	* g++.dg/gomp/declare-target-2.C: New test.

From-SVN: r262605

	* config/pdp11/pdp11.c (pdp11_output_def): Fix typo in .set
	directive.

From-SVN: r262604

	* doc/rtl.texi (REG_NONNEG): Remove decrement and branch until
	zero reference, add doloop_end instead.
	* doc/md.texi (decrement_and_branch_until_zero): Remove.
	(Looping patterns): Remove decrement_and_branch_until_zero.  Add
	detail for doloop_end.

From-SVN: r262603

2018-07-12  Christophe Lyon  <christophe.lyon@linaro.org>

	* compare_tests: Print number of tests in each category.

From-SVN: r262600

gcc/ChangeLog:

	PR c/86453
	* attribs.c (decl_attributes): Reject conflicting attributes before
	calling attribute handlers.

gcc/testsuite/ChangeLog:

	PR c/86453
	* c-c++-common/Wattributes.c: Adjust.
	* gcc.dg/Wattributes-10.c: New test.
	* g++.dg/Wattributes-3.C: Adjust.
	* gcc.dg/Wattributes-6.c: Adjust.
	* gcc.dg/pr18079.c: Adjust.
	* gcc.dg/torture/pr42363.c: Adjust.

From-SVN: r262596

Remove 128bit version from gcc.target/i386/avx512vl-vpclmulqdq-2.c for:

commit 336f029101465aad8f497c753a3d5a77ff78ec88
Author: kyukhin <kyukhin@138bc75d-0d04-0410-961f-82ee72b054a4>
Date:   Mon Jun 11 11:10:38 2018 +0000

    Remove redundant intrinsics

    gcc/
            * config/i386/vaesintrin.h (_mm_aesdec_epi128, _mm_aesdeclast_epi128)
            _mm_aesenc_epi128, _mm_aesenclast_epi128: Remove.
            * config/i386/vpclmulqdqintrin.h (_mm_clmulepi64_epi128): Remove.
    gcc/testsuite/
            * gcc.target/i386/avx512fvl-vaes-1.c: Remove 128bit versions from test.
            * gcc.target/i386/vpclmulqdq.c: Ditto.

	 * gcc.target/i386/avx512vl-vpclmulqdq-2.c: Remove 128bit
	 version.

From-SVN: r262595

	* dumpfile.c (gcc::dump_manager::get_dump_file_name): Add PART
	 parameter.
	(gcc::dump_manager::get_dump_file_name): likewise.
	(dump_begin): Likewise.
	* dumpfile.h (dump_begin): Update prototype.
	(gcc::dump_manager::get_dump_file_name,
	gcc::dump_manager::get_dump_file_name): Update prototype.

From-SVN: r262591

SLP of calls was previously restricted to built-in functions.
This patch extends it to internal functions.

2018-07-12  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* internal-fn.h (vectorizable_internal_fn_p): New function.
	* tree-vect-slp.c (compatible_calls_p): Likewise.
	(vect_build_slp_tree_1): Remove nops argument.  Handle calls
	to internal functions.
	(vect_build_slp_tree_2): Update call to vect_build_slp_tree_1.

gcc/testsuite/
	* gcc.dg/vect/vect-cond-arith-6.c: New test.
	* gcc.target/aarch64/sve/cond_arith_4.c: Likewise.
	* gcc.target/aarch64/sve/cond_arith_4_run.c: Likewise.
	* gcc.target/aarch64/sve/cond_arith_5.c: Likewise.
	* gcc.target/aarch64/sve/cond_arith_5_run.c: Likewise.
	* gcc.target/aarch64/sve/slp_14.c: Likewise.
	* gcc.target/aarch64/sve/slp_14_run.c: Likewise.

From-SVN: r262590

This patch uses IFN_COND_* to vectorise conditionally-executed,
potentially-trapping arithmetic, such as most floating-point
ops with -ftrapping-math.  E.g.:

    if (cond) { ... x = a + b; ... }

becomes:

    ...
    x = .COND_ADD (cond, a, b, else_value);
    ...

When this transformation is done on its own, the value of x for
!cond isn't important, so else_value is simply the target's
preferred_else_value (i.e. the value it can handle the most
efficiently).

However, the patch also looks for the equivalent of:

    y = cond ? x : c;

in which the "then" value is the result of the conditionally-executed
operation and the "else" value "c" is some value that is available at x.
In that case we can instead use:

    x = .COND_ADD (cond, a, b, c);

and replace uses of y with uses of x.

The patch also looks for:

    y = !cond ? c : x;

which can be transformed in the same way.  This involved adding a new
utility function inverse_conditions_p, which was already open-coded
in a more limited way in match.pd.

2018-07-12  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* fold-const.h (inverse_conditions_p): Declare.
	* fold-const.c (inverse_conditions_p): New function.
	* match.pd: Use inverse_conditions_p.  Add folds of view_converts
	that test the inverse condition of a conditional internal function.
	* internal-fn.h (vectorized_internal_fn_supported_p): Declare.
	* internal-fn.c (internal_fn_mask_index): Handle conditional
	internal functions.
	(vectorized_internal_fn_supported_p): New function.
	* tree-if-conv.c: Include internal-fn.h and fold-const.h.
	(any_pred_load_store): Replace with...
	(need_to_predicate): ...this new variable.
	(redundant_ssa_names): New variable.
	(ifcvt_can_use_mask_load_store): Move initial checks to...
	(ifcvt_can_predicate): ...this new function.  Handle tree codes
	for which a conditional internal function exists.
	(if_convertible_gimple_assign_stmt_p): Use ifcvt_can_predicate
	instead of ifcvt_can_use_mask_load_store.  Update after variable
	name change.
	(predicate_load_or_store): New function, split out from
	predicate_mem_writes.
	(check_redundant_cond_expr): New function.
	(value_available_p): Likewise.
	(predicate_rhs_code): Likewise.
	(predicate_mem_writes): Rename to...
	(predicate_statements): ...this.  Use predicate_load_or_store
	and predicate_rhs_code.
	(combine_blocks, tree_if_conversion): Update after above name changes.
	(ifcvt_local_dce): Handle redundant_ssa_names.
	* tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Handle
	general conditional functions.
	* tree-vect-stmts.c (vectorizable_call): Likewise.

gcc/testsuite/
	* gcc.dg/vect/vect-cond-arith-4.c: New test.
	* gcc.dg/vect/vect-cond-arith-5.c: Likewise.
	* gcc.target/aarch64/sve/cond_arith_1.c: Likewise.
	* gcc.target/aarch64/sve/cond_arith_1_run.c: Likewise.
	* gcc.target/aarch64/sve/cond_arith_2.c: Likewise.
	* gcc.target/aarch64/sve/cond_arith_2_run.c: Likewise.
	* gcc.target/aarch64/sve/cond_arith_3.c: Likewise.
	* gcc.target/aarch64/sve/cond_arith_3_run.c: Likewise.

From-SVN: r262589

This patch adds support for fusing a conditional add or subtract
with a multiplication, so that we can use fused multiply-add and
multiply-subtract operations for fully-masked reductions.  E.g.
for SVE we vectorise:

  double res = 0.0;
  for (int i = 0; i < n; ++i)
    res += x[i] * y[i];

using a fully-masked loop in which the loop body has the form:

  res_1 = PHI<0(preheader), res_2(latch)>;
  avec = .MASK_LOAD (loop_mask, a)
  bvec = .MASK_LOAD (loop_mask, b)
  prod = avec * bvec;
  res_2 = .COND_ADD (loop_mask, res_1, prod, res_1);

where the last statement does the equivalent of:

  res_2 = loop_mask ? res_1 + prod : res_1;

(operating elementwise).  The point of the patch is to convert the last
two statements into:

  res_s = .COND_FMA (loop_mask, avec, bvec, res_1, res_1);

which is equivalent to:

  res_2 = loop_mask ? fma (avec, bvec, res_1) : res_1;

(again operating elementwise).

2018-07-12  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* internal-fn.h (can_interpret_as_conditional_op_p): Declare.
	* internal-fn.c (can_interpret_as_conditional_op_p): New function.
	* tree-ssa-math-opts.c (convert_mult_to_fma_1): Handle conditional
	plus and minus and convert them into IFN_COND_FMA-based sequences.
	(convert_mult_to_fma): Handle conditional plus and minus.

gcc/testsuite/
	* gcc.dg/vect/vect-fma-2.c: New test.
	* gcc.target/aarch64/sve/reduc_4.c: Likewise.
	* gcc.target/aarch64/sve/reduc_6.c: Likewise.
	* gcc.target/aarch64/sve/reduc_7.c: Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r262588

This patch adds conditional equivalents of the IFN_FMA built-in functions.
Most of it is just a mechanical extension of the binary stuff.

2018-07-12  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* doc/md.texi (cond_fma, cond_fms, cond_fnma, cond_fnms): Document.
	* optabs.def (cond_fma_optab, cond_fms_optab, cond_fnma_optab)
	(cond_fnms_optab): New optabs.
	* internal-fn.def (COND_FMA, COND_FMS, COND_FNMA, COND_FNMS): New
	internal functions.
	(FMA): Use DEF_INTERNAL_FLT_FN rather than DEF_INTERNAL_FLT_FLOATN_FN.
	* internal-fn.h (get_conditional_internal_fn): Declare.
	(get_unconditional_internal_fn): Likewise.
	* internal-fn.c (cond_ternary_direct): New macro.
	(expand_cond_ternary_optab_fn): Likewise.
	(direct_cond_ternary_optab_supported_p): Likewise.
	(FOR_EACH_COND_FN_PAIR): Likewise.
	(get_conditional_internal_fn): New function.
	(get_unconditional_internal_fn): Likewise.
	* gimple-match.h (gimple_match_op::MAX_NUM_OPS): Bump to 5.
	(gimple_match_op::gimple_match_op): Add a new overload for 5
	operands.
	(gimple_match_op::set_op): Likewise.
	(gimple_resimplify5): Declare.
	* genmatch.c (decision_tree::gen): Generate simplifications for
	5 operands.
	* gimple-match-head.c (gimple_simplify): Define an overload for
	5 operands.  Handle calls with 5 arguments in the top-level overload.
	(convert_conditional_op): Handle conversions from unconditional
	internal functions to conditional ones.
	(gimple_resimplify5): New function.
	(build_call_internal): Pass a fifth operand.
	(maybe_push_res_to_seq): Likewise.
	(try_conditional_simplification): Try converting conditional
	internal functions to unconditional internal functions.
	Handle 3-operand unconditional forms.
	* match.pd (UNCOND_TERNARY, COND_TERNARY): Operator lists.
	Define ternary equivalents of the current rules for binary conditional
	internal functions.
	* config/aarch64/aarch64.c (aarch64_preferred_else_value): Handle
	ternary operations.
	* config/aarch64/iterators.md (UNSPEC_COND_FMLA, UNSPEC_COND_FMLS)
	(UNSPEC_COND_FNMLA, UNSPEC_COND_FNMLS): New unspecs.
	(optab): Handle them.
	(SVE_COND_FP_TERNARY): New int iterator.
	(sve_fmla_op, sve_fmad_op): New int attributes.
	* config/aarch64/aarch64-sve.md (cond_<optab><mode>)
	(*cond_<optab><mode>_2, *cond_<optab><mode_4)
	(*cond_<optab><mode>_any): New SVE_COND_FP_TERNARY patterns.

gcc/testsuite/
	* gcc.dg/vect/vect-cond-arith-3.c: New test.
	* gcc.target/aarch64/sve/vcond_13.c: Likewise.
	* gcc.target/aarch64/sve/vcond_13_run.c: Likewise.
	* gcc.target/aarch64/sve/vcond_14.c: Likewise.
	* gcc.target/aarch64/sve/vcond_14_run.c: Likewise.
	* gcc.target/aarch64/sve/vcond_15.c: Likewise.
	* gcc.target/aarch64/sve/vcond_15_run.c: Likewise.
	* gcc.target/aarch64/sve/vcond_16.c: Likewise.
	* gcc.target/aarch64/sve/vcond_16_run.c: Likewise.

From-SVN: r262587

This patch adds match.pd support for applying normal folds to their
IFN_COND_* forms.  E.g. the rule:

  (plus @0 (negate @1)) -> (minus @0 @1)

also allows the fold:

  (IFN_COND_ADD @0 @1 (negate @2) @3) -> (IFN_COND_SUB @0 @1 @2 @3)

Actually doing this by direct matches in gimple-match.c would
probably lead to combinatorial explosion, so instead, the patch
makes gimple_match_op carry a condition under which the operation
happens ("cond"), and the value to use when the condition is false
("else_value").  Thus in the example above we'd do the following

(a) convert:

      cond:NULL_TREE (IFN_COND_ADD @0 @1 @4 @3) else_value:NULL_TREE

    to:

      cond:@0 (plus @1 @4) else_value:@3

(b) apply gimple_resimplify to (plus @1 @4)

(c) reintroduce cond and else_value when constructing the result.

Nested operations inherit the condition of the outer operation
(so that we don't introduce extra faults) but have a null else_value.
If we try to build such an operation, the target gets to choose what
else_value it can handle efficiently: obvious choices include one of
the operands or a zero constant.  (The alternative would be to have some
representation for an undefined value, but that seems a bit invasive,
and isn't likely to be useful here.)

I've made the condition a mandatory part of the gimple_match_op
constructor so that it doesn't accidentally get dropped.

2018-07-12  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* target.def (preferred_else_value): New target hook.
	* doc/tm.texi.in (TARGET_PREFERRED_ELSE_VALUE): New hook.
	* doc/tm.texi: Regenerate.
	* targhooks.h (default_preferred_else_value): Declare.
	* targhooks.c (default_preferred_else_value): New function.
	* internal-fn.h (conditional_internal_fn_code): Declare.
	* internal-fn.c (FOR_EACH_CODE_MAPPING): New macro.
	(get_conditional_internal_fn): Use it.
	(conditional_internal_fn_code): New function.
	* gimple-match.h (gimple_match_cond): New struct.
	(gimple_match_op): Add a cond member function.
	(gimple_match_op::gimple_match_op): Update all forms to take a
	gimple_match_cond.
	* genmatch.c (expr::gen_transform): Use the same condition as res_op
	for the suboperation, but don't specify a particular else_value.
	* tree-ssa-sccvn.c (vn_nary_simplify, vn_reference_lookup_3)
	(visit_nary_op, visit_reference_op_load): Pass
	gimple_match_cond::UNCOND to the gimple_match_op constructor.
	* gimple-match-head.c: Include tree-eh.h
	(convert_conditional_op): New function.
	(maybe_resimplify_conditional_op): Likewise.
	(gimple_resimplify1): Call maybe_resimplify_conditional_op.
	(gimple_resimplify2): Likewise.
	(gimple_resimplify3): Likewise.
	(gimple_resimplify4): Likewise.
	(maybe_push_res_to_seq): Return null for conditional operations.
	(try_conditional_simplification): New function.
	(gimple_simplify): Call it.  Pass conditions to the gimple_match_op
	constructor.
	* match.pd: Fold VEC_COND_EXPRs of an IFN_COND_* call to a new
	IFN_COND_* call.
	* config/aarch64/aarch64.c (aarch64_preferred_else_value): New
	function.
	(TARGET_PREFERRED_ELSE_VALUE): Redefine.

gcc/testsuite/
	* gcc.dg/vect/vect-cond-arith-2.c: New test.
	* gcc.target/aarch64/sve/loop_add_6.c: Likewise.

From-SVN: r262586

	* lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
	DECL_FCONTEXT
	(hash_tree): Do not hash DECL_FCONTEXT
	* tree-streamer-in.c (lto_input_ts_field_decl_tree_pointers):
	Do not stream DECL_FCONTEXT.
	* tree-streamer-out.c (write_ts_field_decl_tree_pointers): Likewise.
	* tree.c (free_lang_data_in_decl): Free DECL_FCONTEXT.

From-SVN: r262585

2018-07-12  Richard Biener  <rguenther@suse.de>

	PR debug/86462
	* dwarf2out.c (gen_block_die): Only output blocks when they have
	at least one !DECL_IGNORED_P variable.

From-SVN: r262583

2018-07-12  Richard Biener  <rguenther@suse.de>

	PR target/84829
	* config/gnu-user.h (GNU_USER_TARGET_NO_PTHREADS_LIB_SPEC):
	Remove -mieee-fp handling.

	* gcc.target/i386/pr84829.c: New testcase.

From-SVN: r262582

From-SVN: r262579

2018-07-12  Richard Biener  <rguenther@suse.de>

	* tree-ssa-sccvn.c (vn_lookup_simplify_result): Remove bogus
	left-over from last patch.

From-SVN: r262578

	PR tree-optimization/86492
	* gimple-ssa-store-merging.c
	(imm_store_chain_info::coalesce_immediate_stores): Call
	check_no_overlap even for the merge_overlapping case.  Formatting fix.

	* gcc.c-torture/execute/pr86492.c: New test.

From-SVN: r262576

2018-07-12  Richard Biener  <rguenther@suse.de>

	PR c/86453
	* c-attribs.c (handle_packed_attribute): Do not build a variant
	type with TYPE_PACKED, instead ignore the attribute if we may
	not apply to the original type.

	* g++.dg/warn/pr86453.C: New testcase.

From-SVN: r262575

2018-07-12  Richard Biener  <rguenther@suse.de>

	PR middle-end/86479
	* fold-const.c (fold_binary_op_with_conditional_arg): Do not
	move possibly trapping operations into the conditional.

	* gcc.dg/graphite/pr86479.c: New testcase.

From-SVN: r262574

2018-07-12  Richard Biener  <rguenther@suse.de>

	* tree-ssa-sccvn.c (mprts_hook_cnt): Remove.
	(vn_lookup_simplify_result): Remove recursion limit applied
	here.
	(vn_nary_build_or_lookup_1): Adjust.
	(try_to_simplify): Likewise.
	* gimple-match-head.c (gimple_resimplify1): Instead apply one
	here.
	(gimple_resimplify2): Likewise.
	(gimple_resimplify3): Likewise.
	(gimple_resimplify4): Likewise.

From-SVN: r262573

    
    A type alias and its underlying type are identical. Build a
    single backend type for them. Previously we build two backend
    types, which sometimes confuse the backend's type system.
    
    Also don't include type aliases into the list of named type
    declarations, since they are not named types.
    
    Reviewed-on: https://go-review.googlesource.com/123362

From-SVN: r262572

From-SVN: r262571

avx512bitalgintrin.h (_mm512_mask_bitshuffle_epi64_mask): Use __mmask64 type instead of __mmask8 for __M argument.

	* config/i386/avx512bitalgintrin.h (_mm512_mask_bitshuffle_epi64_mask):
	Use __mmask64 type instead of __mmask8 for __M argument.
	* config/i386/avx512fintrin.h (_mm512_mask_xor_epi64,
	_mm512_maskz_xor_epi64): Use __mmask8 type instead of __mmask16 for
	__U argument.
	(_mm512_mask_cmpneq_epi64_mask): Use __mmask8 type instead of
	__mmask16 for __M argument.
	(_mm512_maskz_insertf32x4, _mm512_maskz_inserti32x4,
	_mm512_mask_insertf32x4, _mm512_mask_inserti32x4): Cast last argument
	to __mmask16 instead of __mmask8.
	* config/i386/avx512vlintrin.h (_mm_mask_add_ps, _mm_maskz_add_ps,
	_mm256_mask_add_ps, _mm256_maskz_add_ps, _mm_mask_sub_ps,
	_mm_maskz_sub_ps, _mm256_mask_sub_ps, _mm256_maskz_sub_ps,
	_mm256_maskz_cvtepi32_ps, _mm_maskz_cvtepi32_ps): Use __mmask8 type
	instead of __mmask16 for __U argument.
	* config/i386/avx512vlbwintrin.h (_mm_mask_cmp_epi8_mask): Use
	__mmask16 instead of __mmask8 for __U argument.
	(_mm256_mask_cmp_epi8_mask): Use __mmask32 instead of __mmask16 for
	__U argument.
	(_mm256_cmp_epi8_mask): Use __mmask32 return type instead of
	__mmask16.
	(_mm_mask_cmp_epu8_mask): Use __mmask16 instead of __mmask8 for __U
	argument.
	(_mm256_mask_cmp_epu8_mask): Use __mmask32 instead of __mmask16 for
	__U argument.
	(_mm256_cmp_epu8_mask): Use __mmask32 return type instead of
	__mmask16.
	(_mm_mask_cmp_epi16_mask): Cast last argument to __mmask8 instead
	of __mmask16.
	(_mm256_mask_cvtepi8_epi16): Use __mmask16 instead of __mmask32 for
	__U argument.
	(_mm_mask_cvtepi8_epi16): Use __mmask8 instead of __mmask32 for
	__U argument.
	(_mm256_mask_cvtepu8_epi16): Use __mmask16 instead of __mmask32 for
	__U argument.
	(_mm_mask_cvtepu8_epi16): Use __mmask8 instead of __mmask32 for
	__U argument.
	(_mm256_mask_cmpneq_epu8_mask, _mm256_mask_cmplt_epu8_mask,
	_mm256_mask_cmpge_epu8_mask, _mm256_mask_cmple_epu8_mask): Change
	return type as well as __M argument type and all casts from __mmask8
	to __mmask32.
	(_mm256_mask_cmpneq_epu16_mask, _mm256_mask_cmplt_epu16_mask,
	_mm256_mask_cmpge_epu16_mask, _mm256_mask_cmple_epu16_mask): Change
	return type as well as __M argument type and all casts from __mmask8
	to __mmask16.
	(_mm256_mask_cmpneq_epi8_mask, _mm256_mask_cmplt_epi8_mask,
	_mm256_mask_cmpge_epi8_mask, _mm256_mask_cmple_epi8_mask): Change
	return type as well as __M argument type and all casts from __mmask8
	to __mmask32.
	(_mm256_mask_cmpneq_epi16_mask, _mm256_mask_cmplt_epi16_mask,
	_mm256_mask_cmpge_epi16_mask, _mm256_mask_cmple_epi16_mask): Change
	return type as well as __M argument type and all casts from __mmask8
	to __mmask16.
	* config/i386/avx512vbmi2vlintrin.h (_mm_mask_shrdi_epi32,
	_mm_mask_shldi_epi32): Cast last argument to __mmask8 instead of
	__mmask16.

	* gcc.target/i386/avx512bw-vpcmpb-2.c (CMP): Use SIZE macro instead
	of hardcoding size.  Cast (rel) to MASK_TYPE.
	* gcc.target/i386/avx512bw-vpcmpub-2.c (CMP): Likewise.
	* gcc.target/i386/avx512f-vinserti32x4-3.c: New test.
	* gcc.target/i386/avx512f-vinsertf32x4-3.c: New test.
	* gcc.target/i386/avx512vl-vpcmpnequb-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpgeub-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpleb-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpgeb-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpltb-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpltub-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpleub-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpneqb-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpnequw-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpgeuw-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmplew-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpgew-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpltw-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpltuw-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpleuw-2.c: New test.
	* gcc.target/i386/avx512vl-vpcmpneqw-2.c: New test.

2018-07-11  Grazvydas Ignotas  <notasas@gmail.com>

	* config/i386/avx512bwintrin.h: (_mm512_mask_cmp_epi8_mask,
	_mm512_mask_cmp_epu8_mask): Use __mmask64 type instead of __mmask32
	for __U argument.

	* gcc.target/i386/avx512bw-vpcmpb-2.c (SIZE): Define to
	(AVX512F_LEN / 8) instead of (AVX512F_LEN / 16).
	* gcc.target/i386/avx512bw-vpcmpub-2.c (SIZE): Likewise.

From-SVN: r262566

From-SVN: r262563

md.texi (define_subst): Document how multiple occurrences of the same argument in the replacement...

	* doc/md.texi (define_subst): Document how multiple occurrences of
	the same argument in the replacement pattern are handled.

From-SVN: r262562

	* doc/extend.texi (Common Variable Attributes): Move "mode" into
	alphabetical order.
	(Common Type Attributes): Add "mode" attribute.

From-SVN: r262561

	* lto-streamer-out.c (DFS::DFS_write_tree_body): Do not
	stream DECL_ORIGINAL_TYPE.
	(DFS::DFS_write_tree_body): Drop hack handling local external decls.
	(hash_tree): Do not walk DECL_ORIGINAL_TYPE.
	* tree-streamer-in.c (lto_input_ts_decl_non_common_tree_pointers):
	Do not walk original type.
	* tree-streamer-out.c (streamer_write_chain): Drop hack handling
	external decls.
	(write_ts_decl_non_common_tree_pointers): Do not stream
	DECL_ORIGINAL_TYPE
	* tree.c (free_lang_data_in_decl): Clear DECL_ORIGINAL_TYPE.
	(find_decls_types_r): Do not walk DEC_ORIGINAL_TYPE.

From-SVN: r262560

tree-ssa-threadupdate.c (thread_through_all_blocks): Do not jump thread twice from the same starting edge.

        * tree-ssa-threadupdate.c (thread_through_all_blocks): Do not jump
	thread twice from the same starting edge.

From-SVN: r262559

        * vr-values.c (gimple_stmt_nonzero_p): Abstract common code to...
        * gimple.c (gimple_call_nonnull_result_p): ...here...
        (gimple_call_nonnull_arg): ...and here.
        * gimple.h (gimple_call_nonnull_result_p): New.
        (gimple_call_nonnull_arg): New.

From-SVN: r262557

As part of the transition from the original support for named FPUs to
general FPU properties I defined an entry in the CPU definitions in
arm-cpus.in to use a named FPU.  However, that has now outlived its
usefulness and increasingly we are likely to find that newer cores do
not fit the legacy FPU names very well.  Furthermore it is now possible
to encode all the FPU capatilities directly in the ISA definitions, often
as simply as using +fp or +simd.

So this patch removes the fpu field from the "define cpu" entries and
instead encodes the same information in the isa field.  This also alows us
to remove a bit of now-dead code from parsecpu.awk.

	* config/arm/arm-cpus.in: Move information from fpu field of each
	cpu definition to the isa field.
	* config/arm/parsecpu.awk (fpu): Delete match rule.
	(gen_comm_data): Don't add bits from the CPU's FPU entry.

From-SVN: r262556