re PR testsuite/83883 (FAIL: gcc.dg/tree-ssa/ssa-dse-26.c scan-tree-dump-times dse1 "Deleted dead store" 2 (found 4 times))

	PR testsuite/83883
	* gcc.dg/tree-ssa/ssa-dse-26.c: Tighten expected output.

From-SVN: r256833

rs6000.md (*call_indirect_nonlocal_sysv<mode>): Generate different code for -mno-speculate-indirect-jumps.

[gcc]

2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000.md (*call_indirect_nonlocal_sysv<mode>):
	Generate different code for -mno-speculate-indirect-jumps.
	(*call_value_indirect_nonlocal_sysv<mode>): Likewise.
	(*call_indirect_aix<mode>): Disable for
	-mno-speculate-indirect-jumps.
	(*call_indirect_aix<mode>_nospec): New define_insn.
	(*call_value_indirect_aix<mode>): Disable for
	-mno-speculate-indirect-jumps.
	(*call_value_indirect_aix<mode>_nospec): New define_insn.
	(*sibcall_nonlocal_sysv<mode>): Generate different code for
	-mno-speculate-indirect-jumps.
	(*sibcall_value_nonlocal_sysv<mode>): Likewise.

[gcc/testsuite]

2018-01-17  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/safe-indirect-jump-1.c: Remove endian
	restriction, but still restrict to 64-bit.
	* gcc.target/powerpc/safe-indirect-jump-7.c: New file.
	* gcc.target/powerpc/safe-indirect-jump-8.c: New file.

From-SVN: r256831

From-SVN: r256827

2018-01-17  Harald Anlauf  <anlauf@gmx.de>

	PR fortran/83874
	* decl.c (add_init_expr_to_sym): Do not dereference NULL pointer.


2018-01-17  Harald Anlauf  <anlauf@gmx.de>
                         
	PR fortran/83874
	* gfortran.dg/pr83874.f90: New test.

From-SVN: r256824

	PR c++/83824
	* parser.c (attr_chainon): New function.
	(cp_parser_label_for_labeled_statement, cp_parser_decl_specifier_seq,
	cp_parser_namespace_definition, cp_parser_init_declarator,
	cp_parser_type_specifier_seq, cp_parser_parameter_declaration,
	cp_parser_gnu_attributes_opt): Use it.
	(cp_parser_member_declaration, cp_parser_objc_class_ivars,
	cp_parser_objc_struct_declaration): Likewise.  Don't reset
	prefix_attributes if attributes is error_mark_node.

	* g++.dg/cpp0x/pr83824.C: New test.

From-SVN: r256823

[gcc]
2018-01-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_emit_move): If we load or store a
	long double type, set the flags for noting the default long double
	type, even if we don't pass or return a long double type.

[gcc/testsuite]
2018-01-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/gnuattr1.c: New test to make sure we set the
	appropriate .gnu_attribute for the long double type, if we use the
	long double type, but do not generate any calls.
	* gcc.target/powerpc/gnuattr2.c: Likewise.
	* gcc.target/powerpc/gnuattr3.c: Likewise.

From-SVN: r256822

re PR c++/78344 (ICE on invalid c++ code on x86_64-linux-gnu (internal compiler error: tree check: expected tree_list, have error_mark in cp_check_const_attributes, at cp/decl2.c:1347))

/cp
2018-01-17  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/78344
	* decl.c (grokdeclarator): Do not append the error_mark_node
	due to an erroneous optional attribute-specifier-seq.

/testsuite
2018-01-17  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/78344
	* g++.dg/cpp0x/alignas13.C: New.

From-SVN: r256821

    
    The runtime package was hard-coded non-escape, and the escape
    analysis was not run for the runtime package. This CL removes
    the hard-code, and lets the escape analysis decide. It is not
    allowed for local variables and closures in the runtime to be
    heap allocated. This CL adds the check that make sure that they
    indeed do not escape.
    
    The escape analysis is always run when compiling the runtime
    now.
    
    Fixes golang/go#17431
    
    Reviewed-on: https://go-review.googlesource.com/86246

From-SVN: r256820

	PR c++/83897
	* cp-gimplify.c (cp_maybe_instrument_return): Handle
	CLEANUP_POINT_EXPR.

	* g++.dg/cpp0x/pr83897.C: New test.

From-SVN: r256819

	PR ipa/83051
	* ipa-inline.c (flatten_function): Do not overwrite final inlining
	failure.
	* gcc.c-torture/compile/pr83051-2.c: New testcase.

From-SVN: r256818

/cp
2018-01-17  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/81054
	* constexpr.c (ensure_literal_type_for_constexpr_object): Return
	error_mark_node when we give an error.
	* decl.c (cp_finish_decl): Use the latter.

/testsuite
2018-01-17  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/81054
	* g++.dg/cpp0x/constexpr-ice19.C: New.

From-SVN: r256817

/cp
2018-01-17  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/81054
	* constexpr.c (ensure_literal_type_for_constexpr_object): Return
	error_mark_node when we give an error.
	* decl.c (cp_finish_decl): Use the latter.

/testsuite
2018-01-17  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/81054
	* g++.dg/cpp0x/constexpr-ice19.C: New.

From-SVN: r256816

[testsuite]

2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-mergehl-char.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-double.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-float.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-int.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-longlong.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-pixel.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-short.c: New.
	* gcc.target/powerpc/builtins-1-be-folded.c: New.
	* gcc.target/powerpc/builtins-1-le-folded.c: New.
	* gcc.target/powerpc/builtins-1.fold.h: New.

From-SVN: r256815

[gcc]

2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
	support for merge[hl].
	(fold_mergehl_helper): New helper function.
	(tree-vector-builder.h): New #include for tree_vector_builder usage.
	* config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
	(altivec_vmrglw_direct): Add xxmrglw insn.

[testsuite]

2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-mergehl-char.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-double.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-float.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-int.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-longlong.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-pixel.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-short.c: New.
	* gcc.target/powerpc/builtins-1-be.c: Disable gimple-folding.
	* gcc.target/powerpc/builtins-1-le.c: Disable gimple-folding.
	* gcc.target/powerpc/builtins-1-be-folded.c: New.
	* gcc.target/powerpc/builtins-1-le-folded.c: New.
	* gcc.target/powerpc/builtins-1.fold.h: New.

From-SVN: r256814

	PR sanitizer/82825
	* sanitizer_common/sanitizer_internal_defs.h: Cherry-pick upstream
	r??????.

From-SVN: r256813

These -mcpu=xscale tests are ARM-only tests and they go to great pains to reject
explicit overriding options, but they're missing the -marm in their dg-options, which means
they will still give that nasty Thumb1 hard-float error when testing an implicit --with-mode=thumb
toolchain (--with-cpu=cortex-a15 --with-fpu=neon-vfpv4 --with-float=hard --with-mode=thumb, for example).

This patch adds the missing -marm and all is good again.

     * gcc.target/arm/g2.c: Add -marm to dg-options.
     * gcc.target/arm/scd42-2.c: Likewise.

From-SVN: r256812

	2018-01-17  Andrew Waterman  <andrew@sifive.com>
	gcc/
	* config/riscv/riscv.c (riscv_conditional_register_usage): If
	UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.

From-SVN: r256811

    
    Reviewed-on: https://go-review.googlesource.com/87198

From-SVN: r256810

https://gcc.gnu.org/ml/gcc-patches/2018-01/msg01580.html
	PR c++/83287
	* init.c (build_raw_new_expr): Scan list for lookups to keep.

	PR c++/83287
	* g++.dg/lookup/pr83287-2.C: New.

From-SVN: r256809

gcc/c-family/ChangeLog:
	PR c++/83814
	* c-common.c (fold_for_warn): Move to c/c-fold.c and cp/expr.c.

gcc/c/ChangeLog:
	PR c++/83814
	* c-fold.c (fold_for_warn): Move from c-common.c, reducing to just
	the C part.

gcc/cp/ChangeLog:
	PR c++/83814
	* expr.c (fold_for_warn): Move from c-common.c, reducing to just
	the C++ part.  If processing a template, call
	fold_non_dependent_expr rather than fully folding.

gcc/testsuite/ChangeLog:
	PR c++/83814
	PR c++/83902
	* g++.dg/wrappers/pr83814.C: New test case.
	* g++.dg/wrappers/pr83902.C: New test case.

From-SVN: r256804

	* call.c (convert_like_real): Restore null_node handling.

From-SVN: r256803

	PR c++/72801
	* pt.c (unify_pack_expansion): Don't try to deduce enclosing
	template args.

From-SVN: r256802

PR lto/83121 reports an ICE deep inside the linemap code when -Wodr
reports on a type mismatch.

The root cause is that the warning can access the DECL_SOURCE_LOCATION
of a streamed-in decl before the lto_location_cache has been applied.

lto_location_cache::input_location stores RESERVED_LOCATION_COUNT (==2)
as a poison value until the cache is applied:
250	  /* Keep value RESERVED_LOCATION_COUNT in *loc as linemap lookups will
251	     ICE on it.  */

The fix is relatively simple: apply the cache before reading the
DECL_SOURCE_LOCATION.

Triggering the ICE was fiddly: it seems to be affected by many things,
including the order of files, and (I think) by filenames.  My theory is
that it's affected by the ordering of the tree nodes in the LTO stream:
for the ICE to occur, the types in question need to be compared before
some other operation flushes the lto_location_cache.  This ordering
is affected by the hash-based ordering in DFS in lto-streamer-out.c, which
might explain why r255066 seemed to trigger the bug; the only relevant
change to LTO there seemed to be:
  * lto-streamer-out.c (hash_tree): Hash TYPE_EMPTY_P and DECL_PADDING_P.
If so, then the bug was presumably already present, but hidden.

The patch also adds regression test coverage for the ICE, which is more
involved - as far as I can tell, we don't have an existing way to verify
diagnostics emitted during link-time optimization.

Hence the patch adds some machinery to lib/lto.exp to support two new
directives: dg-lto-warning and dg-lto-message, corresponding to
dg-warning and dg-message respectively, where the diagnostics are
expected to be emitted at link-time.

The test case includes examples of LTO warnings and notes in both the
primary and secondary source files

Doing so required reusing the logic from DejaGnu for handling diagnostics.
Unfortunately the pertinent code is a 50 line loop within a ~200 line Tcl
function in dg.exp (dg-test), so I had to copy it from DejaGnu, making
various changes as necessary (see lto_handle_diagnostics_for_file in the
patch; for example the LTO version supports multiple source files,
identifying which source file emitted a diagnostic).

For non-LTO diagnostics we currently ignore surplus "note" diagnostics.
This patch updates lto_prune_warns to follow this behavior (since
otherwise we'd need numerous dg-lto-message directives for the motivating
test case).

The patch adds these PASS results to g++.sum:

PASS: g++.dg/lto/pr83121 cp_lto_pr83121_0.o assemble, -O0 -flto
PASS: g++.dg/lto/pr83121 cp_lto_pr83121_1.o assemble, -O0 -flto
PASS: g++.dg/lto/pr83121  (test for LTO warnings, pr83121_0.C line 6)
PASS: g++.dg/lto/pr83121  (test for LTO warnings, pr83121_0.C line 8)
PASS: g++.dg/lto/pr83121  (test for LTO warnings, pr83121_1.C line 2)
PASS: g++.dg/lto/pr83121  (test for LTO warnings, pr83121_1.C line 3)
PASS: g++.dg/lto/pr83121 cp_lto_pr83121_0.o-cp_lto_pr83121_1.o link, -O0 -flto

The output for dg-lto-message above refers to "warnings", rather than
"messages" but that's the same as for the non-LTO case, where dg-message
also refers to "warnings".

gcc/ChangeLog:
	PR lto/83121
	* ipa-devirt.c (add_type_duplicate): When comparing memory layout,
	call the lto_location_cache before reading the
	DECL_SOURCE_LOCATION of the types.

gcc/testsuite/ChangeLog:
	PR lto/83121
	* g++.dg/lto/pr83121_0.C: New test case.
	* g++.dg/lto/pr83121_1.C: New test case.
	* lib/lto.exp (lto_handle_diagnostics_for_file): New procedure,
	adapted from DejaGnu's dg-test.
	(lto_handle_diagnostics): New procedure.
	(lto_prune_warns): Ignore informational notes.
	(lto-link-and-maybe-run): Add "messages_by_file" param.
	Call lto_handle_diagnostics.  Avoid issuing "unresolved" for
	"execute" when "link" fails if "execute" was not specified.
	(lto-can-handle-directive): New procedure.
	(lto-get-options-main): Call lto-can-handle-directive.  Add a
	dg-messages local, using it to set the caller's
	dg-messages-by-file for the given source file.
	(lto-get-options): Likewise.
	(lto-execute): Add dg-messages-by-file local, and pass it to
	lto-link-and-maybe-run.

From-SVN: r256801

This fixes PR82964 which reports ICEs for some CONST_WIDE_INT immediates.
It turns out decimal floating point CONST_DOUBLE get changed into
CONST_WIDE_INT without checking the constraint on the operand, which 
results in failures.  Avoid this by only allowing SF/DF/TF mode floating
point constants in aarch64_legitimate_constant_p.  A similar issue can
occur with 128-bit immediates which may be emitted even when disallowed
in aarch64_legitimate_constant_p, and the constraints in movti_aarch64
don't match.  Fix this with a new constraint and allowing valid immediates
in aarch64_legitimate_constant_p.

Rather than allowing all 128-bit immediates and expanding in up to 8
MOV/MOVK instructions, limit them to 4 instructions and use a literal
load for other cases.  Improve a few TImode tests to use a literal and
ensure they are skipped with -fpic.

This fixes all reported failures.

    gcc/
	PR target/82964
	* config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
	* config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
	(aarch64_legitimate_constant_p): Just support CONST_DOUBLE 
	SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
	* config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
	Add declaration.
	* config/aarch64/constraints.md (aarch64_movti_operand):
	Limit immediates.
	* config/aarch64/predicates.md (Uti): Add new constraint.

    gcc/testsuite/
	PR target/79041
	PR target/82964
	* gcc.target/aarch64/pr79041-2.c: Improve test, disable with fpic.
	* gcc.target/aarch64/pr78733.c: Improve test, disable with fpic.

Co-Authored-By: Richard Sandiford <richard.sandiford@linaro.org>

From-SVN: r256800

There is a typo in the armv8.1-a and armv8.2-a effective target check generators.
They are not actually used anywhere in the testsuite as far as I can tell, but the fix is obvious.

     * lib/target-supports.exp: Fix -march arguments in arm arch effective
     target check autogenerator for armv8.1-a and armv8.2-a.

From-SVN: r256799

gcc/ChangeLog:

2018-01-17 Carl Love  <cel@us.ibm.com>
	* config/rs6000/vsx.md (define_expand xl_len_r,
	define_expand stxvl, define_expand *stxvl): Add match_dup argument.
	(define_insn): Add, match_dup 1 argument to define_insn stxvll and
	lxvll.
	(define_expand, define_insn): Move the shift left from	the
	define_insn to the define_expand for lxvl and stxvl instructions.
	* config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
	and XL_LEN_R definitions to PURE.

gcc/testsuite/ChangeLog:

2018-01-17  Carl Love  <cel@us.ibm.com>
	* gcc.target/powerpc/builtins-6-p9-runnable.c: Add additional tests.
	Add debug print statements.
	* gcc.target/powerpc/builtins-5-p9-runnable.c: Add test to do
	16 byte vector load followed by a partial vector load.

From-SVN: r256798

	* config/i386/i386.c (indirect_thunk_name): Declare regno
	as unsigned int.  Compare regno with INVALID_REGNUM.
	(output_indirect_thunk): Ditto.
	(output_indirect_thunk_function): Ditto.
	(ix86_code_end): Declare regno as unsigned int.  Use INVALID_REGNUM
	in the call to output_indirect_thunk_function.

From-SVN: r256797

PR c++/83799 reports a failure building LLVM due to a bogus
"no matching function for call to" error at a callsite like this:
  TLI->getTypeLegalizationCost(DL);
where "DL" is from:
  using TargetTransformInfoImplBase::DL;

The root cause is that type_dependent_expression_p on a USING_DECL
should return true when processing a template, but after r256448 the
the argument at the callsite is a location wrapper around the USING_DECL,
and type_dependent_expression_p erroneously returns false for it, as
it is comparing tree codes, and failing a match, then looking at types.

This prevents cp_parser_postfix_expression from using the
"build_min_nt_call_vec" path for handling the call, instead erroneously
handling it via build_new_method_call (which fails for this case).

This patch fixes the problem by stripping any location wrappers before
the various tree code tests in type_dependent_expression_p.   It fixes
the reduced test case, and the full BasicTargetTransformInfo.ii; after
this patch, the assembly generated for that latter case is identical to
that generated before r256448.

gcc/cp/ChangeLog:
	PR c++/83799
	* pt.c (type_dependent_expression_p): Strip any location wrapper
	before testing tree codes.
	(selftest::test_type_dependent_expression_p): New function.
	(selftest::cp_pt_c_tests): Call it.

gcc/testsuite/ChangeLog:
	PR c++/83799
	* g++.dg/wrappers/pr83799.C: New test case.

From-SVN: r256796

https://gcc.gnu.org/ml/gcc-patches/2018-01/msg01554.html
	PR c++/83739
	* pt.c (tsubst_expr) <case RANGE_FOR_STMT>: Rebuild a range_for if
	this not a final instantiation.

	PR c++/83739
	* g++.dg/cpp1y/pr83739.C: New.

From-SVN: r256795

    
    Reviewed-on: https://go-review.googlesource.com/87897

From-SVN: r256794

	* gcc.target/visium/overflow8.c: Pass -fno-if-conversion.
	* gcc.target/visium/overflow16.c: Likewise.
	* gcc.target/visium/overflow32.c: Likewise.

From-SVN: r256793

From-SVN: r256787

This is an awkward testsuite failure. The original bug was that we were failing to put out
the conditional code in the conditional form of the STL instruction (oops!).
So we wanted to output STLNE, but instead output STL.
The testacase relies on if-conversion to conditionalise the insn for STL.
However, ever since r251643 the expansion of a non-relaxed atomic store
always includes a compiler barrier. That blocks if-conversion in all cases.

So there's no easy way to get to a conditional STL instruction from a C program.
But we do want to test for the original bug fix that if the RTL insn for STL is conditionalised
it should output the conditional code.

The solution in this patch is to convert the test into an RTL test with the COND_EXEC form
of the STL insn and scan the assembly output there.
This seems to work fine, and gives us an opportunity to create a gcc.dg/rtl/arm directory
in the RTL tests.

This now makes the gcc.target/arm/stl-cond.c disappear (as the test is deleted) and
the new test in gcc.dg/rtl/arm/stl-cond.c passes.

     * gcc.dg/rtl/arm/stl-cond.c: New test.
     * gcc.target/arm/stl-cond.c: Delete.

From-SVN: r256785

This patch converts gcc.target/arm/pr40887.c to use the proper effective target check and dg-add-options for armv5te
so that we avoid situations where we end up trying to compile the test with a Thumb1 hard-float ABI, which makes the
compiler complain.

This allows the test to pass gracefully for me for my compiler configured with:
--with-cpu=cortex-a15 --with-fpu=neon-vfpv4 --with-float=hard --with-mode=thumb

     * gcc.target/arm/pr40887.c: Add armv5te effective target checks and
     directives.

From-SVN: r256784

	PR tree-optimization/83843
	* gcc.dg/store_merging_18.c: Don't expect "Merging successful" on arm.
	* gcc.dg/store_merging_19.c: New test.

From-SVN: r256783

This test is naughty because it doesn't use the proper effective target checks
and add-options mechanisms for setting a Thumb1 target, which leads to Thumb1 hard-float errors
when testing a toolchain configured with --with-cpu=cortex-a15 --with-fpu=neon-vfpv4 --with-float=hard --with-mode=thumb.

This patch fixes that in the obvious way.

	* gcc.target/arm/xor-and.c: Fix armv6 effective target checks
	and options.

From-SVN: r256782

re PR rtl-optimization/83771 (ICE: verify_flow_info failed (error: non-cold basic block 3 reachable only by paths crossing the cold partition))

	PR rtl-optimization/83771
	* gcc.dg/pr83771.c: New test.

From-SVN: r256781

re PR tree-optimization/81184 (gcc.dg/pr21643.c and gcc.dg/tree-ssa/phi-opt-11.c fail starting with r249450)

	PR tree-optimization/81184
	* gcc.dg/pr21643.c: Adjust dg-final line for logical_op_short_circuit
	targets.
	* gcc.dg/tree-ssa/phi-opt-11.c: Likewise.

From-SVN: r256780

This PR is about a case in which we VIEW_CONVERT a variable-sized
unaligned record:

 <record_type 0x7ffff6d92888 check_displace_generation__T245b sizes-gimplified type_7 BLK
    size <var_decl 0x7ffff6846510 D.3499 ...>
    unit-size <var_decl 0x7ffff68465a0 D.3500 ...>
    align:8 ...>

to an aligned 32-bit integer.  The strict-alignment handling of
this case creates an aligned temporary slot, moves the operand
into the slot in the operand's original mode, then accesses the
slot in the more-aligned result mode.

Previously the size of the temporary slot was calculated using:

                  HOST_WIDE_INT temp_size
                    = MAX (int_size_in_bytes (inner_type),
                           (HOST_WIDE_INT) GET_MODE_SIZE (mode));

int_size_in_bytes would return -1 for the variable-length type,
so we'd use the size of the result mode for the slot.  r256152 replaced
int_size_in_bytes with tree_to_poly_uint64, which triggered an ICE.

If op0 has BLKmode we do a block copy of GET_MODE_SIZE (mode) bytes
and then convert the slot to "mode":

                  poly_uint64 mode_size = GET_MODE_SIZE (mode);
                  ...
                  if (GET_MODE (op0) == BLKmode)
                    {
                      rtx size_rtx = gen_int_mode (mode_size, Pmode);
                      emit_block_move (new_with_op0_mode, op0, size_rtx,
                                       (modifier == EXPAND_STACK_PARM
                                        ? BLOCK_OP_CALL_PARM
                                        : BLOCK_OP_NORMAL));
                    }
                  else
                    ...

                  op0 = new_rtx;
                }
            }

          op0 = adjust_address (op0, mode, 0);

so I think in that case just the size of "mode" is enough, even if op0
is a fixed-size type.  For non-BLKmode op0 we first move in op0's mode
and then convert the slot to "mode":

                    emit_move_insn (new_with_op0_mode, op0);

                  op0 = new_rtx;
                }
            }

          op0 = adjust_address (op0, mode, 0);

so I think we want the maximum of the two mode sizes in that case.

2018-01-17  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	PR middle-end/83884
	* expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
	rather than the size of inner_type to determine the stack slot size
	when handling VIEW_CONVERT_EXPRs on strict-alignment targets.

From-SVN: r256779

From-SVN: r256778