Skip to content

R
riscv-gcc-1
Switch branch/tag
  1. 22 Mar, 2017 9 commits
    • Add deduction guides for C++17 (P0433R2, partial) · af181c91 
      	* include/bits/shared_ptr.h (shared_ptr, weak_ptr): Add deduction
	guides for C++17.
	* include/bits/std_function.h (function): Likewise.
	* include/bits/stl_pair.h (pair): Likewise.
	* include/debug/array (__gnu_debug::array): Likewise.
	* include/std/array (array): Likewise.
	* include/std/functional (make_default_searcher)
	(make_boyer_moore_searcher, make_boyer_moore_horspool_searcher):
	Remove generator functions.
	* include/std/tuple (tuple): Add deduction guides.
	* include/std/valarray (valarray): Likewise.
	* testsuite/20_util/function_objects/searchers.cc: Adjust to use
	class template argument deduction instead of generator functions.
	* testsuite/20_util/function/cons/deduction.cc: New test.
	* testsuite/20_util/optional/cons/deduction_guide.cc: Rename to ...
	* testsuite/20_util/optional/cons/deduction.cc: ... here.
	* testsuite/20_util/pair/cons/deduction.cc: New test.
	* testsuite/20_util/shared_ptr/cons/deduction.cc: New test.
	* testsuite/20_util/tuple/cons/deduction.cc: New test.
	* testsuite/20_util/tuple/element_access/get_neg.cc: Adjust dg-error.
	* testsuite/20_util/unique_ptr/cons/deduction_neg.cc: New test.
	* testsuite/20_util/weak_ptr/cons/deduction.cc: New test.
	* testsuite/23_containers/array/cons/deduction.cc: New test.
	* testsuite/23_containers/array/cons/deduction_neg.cc: New test.
	* testsuite/23_containers/array/tuple_interface/get_debug_neg.cc:
	Adjust dg-error.
	* testsuite/23_containers/array/tuple_interface/get_neg.cc: Likewise.
	* testsuite/23_containers/array/tuple_interface/tuple_element_neg.cc:
	Likewise.
	* testsuite/26_numerics/valarray/deduction.cc: New test.
	* testsuite/30_threads/lock_guard/cons/deduction.cc: New test.
	* testsuite/30_threads/scoped_lock/cons/deduction.cc: New test.
	* testsuite/30_threads/unique_lock/cons/deduction.cc: New test.

From-SVN: r246389
      Jonathan Wakely committed
    • re PR fortran/80142 (Warning: No location in expression ... with -O / -ffrontend-optimize) · 918b6c9e 
      2017-03-22  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/80142
	* frontend-passes.c (combine_array_constructor): Take
	location of new expression from constructor expression instead
	of constructor.

2017-03-22  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/80142
	* gfortran.dg/any_loc.f90: New test case.

From-SVN: r246388
      Thomas Koenig committed
    • re PR go/80128 (go1: internal compiler error: in write_specific_type_functions,… · b1fb3cb0 
      re PR go/80128 (go1: internal compiler error: in write_specific_type_functions, at go/gofrontend/types.cc:2002)

	PR go/80128
    compiler: check backend alignment for memequalNN functions
    
    The code was assuming the usual required alignment for the memequalNN
    functions (16 bits for int16, 32 for int32, etc.). However, on m68k
    the required alignment of int32 is only 16 bits. Assuming the
    memequalNN alignment caused the compiler to incorrectly decide that
    int32 required a specially generated function rather than calling
    memequal32. This then crashed if the type descriptor were generated
    after type-specific functions had been written.
    
    Fixes GCC PR 80128.
    
    Reviewed-on: https://go-review.googlesource.com/38433

From-SVN: r246382
      Ian Lance Taylor committed
    • re PR c++/80029 (valgrind error in new_omp_context(omp_region_type) (gimplify.c:400)) · 7ba8651e 
      	PR c++/80029

	gcc/
	* gimplify.c (is_oacc_declared): New function.
	(oacc_default_clause): Use it to set default flags for acc declared
	variables inside parallel regions.
	(gimplify_scan_omp_clauses): Strip firstprivate pointers for acc
	declared variables.
	(gimplify_oacc_declare): Gimplify the declare clauses.  Add the
	declare attribute to any decl as necessary.

	libgomp/
	* testsuite/libgomp.oacc-c-c++-common/declare-vla.c: New test.

From-SVN: r246381
      Cesar Philippidis committed
    • Fix PR80082: LDRD erronously used for 64bit load on ARMv7-R · bf634d1c 
      2017-03-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR target/80082
    * config/arm/arm-isa.h (isa_bit_lpae): New feature bit.
    (ISA_ARMv7ve): Add isa_bit_lpae to the definition.
    * config/arm/arm-protos.h (arm_arch7ve): Rename into ...
    (arm_arch_lpae): This.
    * config/arm/arm.c (arm_arch7ve): Rename into ...
    (arm_arch_lpae): This.  Define it in term of isa_bit_lpae.
    * config/arm/arm.h (TARGET_HAVE_LPAE): Redefine in term of
    arm_arch_lpae.

    gcc/testsuite/
    PR target/80082
    * gcc.target/arm/atomic_loaddi_10.c: New testcase.
    * gcc.target/arm/atomic_loaddi_11.c: Likewise.

From-SVN: r246365
      Thomas Preud'homme committed
    • Error message on target attribute on power target (PR target/79906) · f7325b95 
      2017-03-22  Martin Liska  <mliska@suse.cz>

	PR target/79906
	* config/rs6000/rs6000.c (rs6000_inner_target_options): Show
	error message instead of an ICE.
2017-03-22  Martin Liska  <mliska@suse.cz>

	PR target/79906
	* g++.dg/ext/mv8.C: Add power* targets.

From-SVN: r246345
      Martin Liska committed
    • extend.texi (6.11 Additional Floating Types): Revise. · 17ceee7c 
      2017-03-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* doc/extend.texi (6.11 Additional Floating Types): Revise.

From-SVN: r246343
      Bill Schmidt committed
    • Daily bump. · 8d563e2e 
      From-SVN: r246342
      GCC Administrator committed
    • rs6000-c.c (rs6000_target_modify_macros): Add comments. · 2b33460a 
      gcc/ChangeLog:

2017-03-21  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Add
	comments.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
	comments.

From-SVN: r246339
      Kelvin Nilsen committed
  3. 21 Mar, 2017 27 commits
  5. 20 Mar, 2017 4 commits
    • combine: Fix 79910 · e091a0fe 
      If the dest of an I0 or I1 is used in an insn before I2, as can happen
in various uncommon cases, and we manage to do the combination, the set
is moved to I2, which is wrong.  Don't allow combining the insns in this
case.


	PR rtl-optimization/79910
	* combine.c (can_combine_p): Do not allow combining an I0 or I1
	if its dest is used by an insn before I2 (other than the combined
	insns themselves, which are properly handled already).

From-SVN: r246297
      Segher Boessenkool committed
    • Revert: · 366e9446 
      	2017-03-17  Bernd Schmidt  <bschmidt@redhat.com>

	* combine.c (record_used_regs): New static function.
	(try_combine): Handle situations where there is an additional
	instruction between I2 and I3 which needs to have a LOG_LINK
	updated.

	Revert:
	2017-03-17  Jim Wilson  <jim.wilson@linaro.org>

	* combine.c (try_combine): Delete redundant i1 test.  Call
	prev_nonnote_nondebug_insn instead of prev_nonnote_insn.

From-SVN: r246296
      Segher Boessenkool committed
    • * de.po, fr.po: Update. · 497e6150 
      From-SVN: r246295
      Joseph Myers committed
    • stl_deque.h (deque): Access allocator value_type only if concept checks are enabled. · fe62dd04 
      2017-03-20  François Dumont  <fdumont@gcc.gnu.org>

	* include/bits/stl_deque.h (deque): Access allocator value_type only if
	concept checks are enabled.
	* include/bits/stl_stack.h (stack): Likewise.
	* include/bits/stl_vector.h (vector): Likewise.
	* include/bits/stl_list.h (list): Likewise and check
	_SGIAssignableConcept only in C++03.
	* include/bits/stl_map.h (map): Likewise.
	* include/bits/stl_set.h (set): Likewise.
	* include/bits/stl_multimap.h (multimap): Likewise.
	* include/bits/stl_multiset.h (multiset): Likewise.
	* include/bits/stl_queue.h (queue, priority_queue): Likewise.

From-SVN: r246294
      François Dumont committed