PR target/69161
	* config/arm/predicates.md (arm_comparison_operator_mode):
	New predicate.
	* config/arm/arm.md (*mov_scc): Use arm_comparison_operator_mode
	instead of arm_comparison_operator.
	(*mov_negscc): Likewise.
	(*mov_notscc): Likewise.
	* config/arm/thumb2.md (*thumb2_mov_scc): Likewise.
	(*thumb2_mov_negscc): Likewise.
	(*thumb2_mov_negscc_strict_it): Likewise.
	(*thumb2_mov_notscc): Likewise.
	(*thumb2_mov_notscc_strict_it): Likewise.

From-SVN: r233495

2016-02-17  David Sherwood  <david.sherwood@arm.com>

    gcc/testsuite:
        PR target/69532
        * gcc.target/arm/fmaxmin.c: Change effective target to arm_v8_neon_hw.
        * gcc.target/arm/vect-fmaxmin.c: Likewise.

From-SVN: r233494

As part of the final cleanup of aarch64_internal_mov_immediate a return was
accidentally removed.  This causes the 2-instruction case to fallthrough
into the general case even when it found a match.  An example immediate is
0xcccccccccccccccd which was using 2 instructions in GCC5 but now requires 4.
Adding the return fixes the regressions.

2016-02-17  Wilco Dijkstra  <wdijkstr@arm.com>

    gcc/
	* config/aarch64/aarch64.c (aarch64_internal_mov_immediate):
	Add missing return.

From-SVN: r233490

From-SVN: r233489

	* config/visium/visium.c (machine_libfunc_index): New enum.
	(machine_libfuncs): New structure.
	(visium_libfuncs): New static variable.
	(TARGET_INIT_LIBFUNCS): Define to...
	(visium_init_libfuncs): ...this.  New function.
	(expand_block_move_4): Use the appropriate libfunc.
	(expand_block_move_2): Likewise.
	(expand_block_move_1): Likewise.
	(expand_block_set_4): Likewise.
	(expand_block_set_2): Likewise.
	(expand_block_set_1): Likewise.
	(visium_trampoline_init): Likewise.

From-SVN: r233488

	* config/msp430/msp430.c (msp430_mcu_data): Sync with data from
	TI's devices.csv file as of March 2016.

From-SVN: r233487

exp_ch4.adb (Expand_N_Indexed_Component): Active synchronization if the prefix denotes an entity which Has_Atomic_Components.

	* exp_ch4.adb (Expand_N_Indexed_Component): Active synchronization if
	the prefix denotes an entity which Has_Atomic_Components.
	* gcc-interface/trans.c (node_is_atomic): Return true if the prefix
	denotes an entity which Has_Atomic_Components.

From-SVN: r233485

	* gcc-interface/utils2.c (gnat_protect_expr): Make a SAVE_EXPR only
	for fat pointer or scalar types.

From-SVN: r233484

2016-02-16  Tim Shen  <timshen@google.com>

	PR libstdc++/69794
	* include/bits/regex_scanner.h: Add different special character
	sets for grep and egrep regex.
	* include/bits/regex_scanner.tcc: Use _M_spec_char more uniformly.
	* testsuite/28_regex/regression.cc: Add new testcase.

From-SVN: r233482

	PR c++/10200
	PR c++/69753
	* call.c, cp-tree.h, name-lookup.c, pt.c, search.c, semantics.c,
	tree.c, typeck2.c: Revert earlier changes.
	* parser.c (cp_parser_lookup_name): Ignore namespace-scope
	non-type templates after -> or .

From-SVN: r233481

From-SVN: r233480

[gcc]

2016-02-16  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	PR Target/48344
	* opts-global.c (handle_common_deferred_options): Introduce and
	initialize two global variables to remember command-line options
	specifying a stack-limiting register.
	* opts.h: Add extern declarations of the two new global variables. 
	* emit-rtl.c (init_emit_once): Initialize the stack_limit_rtx
	variable based on the values of the two new global variables.

[gcc/testsuite]

2016-02-16  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	PR Target/48344
	* gcc.target/powerpc/pr48344-1.c: New test.

From-SVN: r233477

2015-02-16  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/69742
	* frontend-passes.c (cfe-expr_0):  Don't register functions
	from within an ASSOCIATE statement.

2015-02-16  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/69742
	* gfortran.dg/associate_21.f90:  New test.

From-SVN: r233474

re PR c/69835 (-Wnonnull diagnoses parameter comparisons with NULL even when those could have changed)

	PR c/69835
	* common.opt (Wnonnull-compare): New warning.
	* doc/invoke.texi (-Wnonnull): Remove text about comparison
	of arguments against NULL.
	(-Wnonnull-compare): Document.
	* Makefile.in (OBJS): Add gimple-ssa-nonnull-compare.o.
	* tree-pass.h (make_pass_warn_nonnull_compare): Declare.
	* passes.def (pass_warn_nonnull_compare): Add.
	* gimple-ssa-nonnull-compare.c: New file.
c-family/
	* c.opt (Wnonnull-compare): Enable for -Wall.
c/
	* c-typeck.c (build_binary_op): Revert 2015-09-09 change.
cp/
	* typeck.c (cp_build_binary_op): Revert 2015-09-09 change.
testsuite/
	* c-c++-common/nonnull-1.c: Use -Wnonnull-compare instead of
	-Wnonnull in dg-options.
	* c-c++-common/nonnull-2.c: New test.

From-SVN: r233472

	PR c++/69657
	* name-lookup.c (lookup_qualified_name): Add find_hidden parm.
	(set_decl_namespace): Pass it.  Complain about finding a hidden friend.
	* name-lookup.h: Adjust.

From-SVN: r233470

	* gcc-interface/gigi.h (maybe_debug_type): New inline function.
	* gcc-interface/misc.c (gnat_get_array_descr_info): Use it.
	Call maybe_character_value on the array bounds.  Get to the base type
	of the index type and call maybe_debug_type on it.
	* gcc-interface/utils.c (finish_character_type): Add special treatment

From-SVN: r233469

	* gcc-interface/misc.c (gnat_enum_underlying_base_type): New function.
	(LANG_HOOKS_ENUM_UNDERLYING_BASE_TYPE): Define to above.

From-SVN: r233467

gcc/

	* config/aarch64/aarch64.c (cortexa57_tunings): Remove
	AARCH64_EXTRA_TUNE_RECIP_SQRT.

From-SVN: r233463

gcc/

	* config/aarch64/aarch64.c (use_rsqrt_p): Always use software
	reciprocal sqrt for -mlow-precision-recip-sqrt.

From-SVN: r233462

[Patch AArch64] GCC 6 regression in vector performance. - Fix vector initialization to happen with lane load instructions.

gcc/

	* config/aarch64/aarch64.c (aarch64_expand_vector_init): Refactor,
	always use lane loads to construct non-constant vectors.

gcc/testsuite/

	* gcc.target/aarch64/vector_initialization_nostack.c: New.


Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

From-SVN: r233461

gcc/

	* config/aarch64/aarch64.md
	(arch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Fix register
	constraints for	operand 3.
	(aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Likewise.

From-SVN: r233460

	PR middle-end/69801
	* gcc.dg/pr69801.c: Add empty dg-options.

From-SVN: r233459

	PR c/64748

	gcc/c/
	* c-parser.c (c_parser_oacc_data_clause_deviceptr): Allow parms.

	gcc/cp/
	* parser.c (cp_parser_oacc_data_clause_deviceptr): Remove checking.
	* semantics.c (finish_omp_clauses): Add deviceptr checking.

	gcc/testsuite/
	* c-c++-common/goacc/deviceptr-1.c: Add tests.
	* g++.dg/goacc/deviceptr-1.c: New file.

From-SVN: r233458

	PR tree-optimization/69820
	* tree-vect-patterns.c (type_conversion_p): Return false if
	*orig_type is unsigned single precision or boolean.
	(vect_recog_dot_prod_pattern, vect_recog_widen_mult_pattern):
	Formatting fix.

	* gcc.dg/vect/pr69820.c: New test.

Co-Authored-By: Richard Biener <rguenther@suse.de>

From-SVN: r233457

	PR rtl-optimization/69764
	PR rtl-optimization/69771
	* optabs.c (expand_binop): Ensure for shift optabs invalid CONST_INT
	op1 is valid for GET_MODE_INNER (mode) and force it into a reg.

From-SVN: r233456

2016-02-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/69776
	* tree-ssa-alias.c (indirect_ref_may_alias_decl_p): Get alias
	sets from caller.
	(indirect_refs_may_alias_p): Likewise.
	(refs_may_alias_p_1): Pass alias sets as from ao_ref.
	* tree-ssa-sccvn.c (vn_reference_lookup): Also adjust vr alias-set
	according to tbaa_p.
	* tree-ssa-dom.c (lookup_avail_expr): Add tbaa_p flag.
	(optimize_stmt): For redundant store discovery do not allow tbaa.

	* gcc.dg/torture/pr69776-2.c: New testcase.

From-SVN: r233453

	PR tree-optimization/69714
	* tree-ssa-math-opts.c (find_bswap_or_nop): Revert previous change.
	Return NULL if we have irrelevant high bytes on BIG_ENDIAN.

testsuite/
	PR tree-optimization/69714
	* gcc.dg/torture/pr69714.c: New test.

From-SVN: r233452

gcc/
2016-02-16  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc-modes.def (CC_FPU, CC_FPU_UNEQ): New modes.
	* config/arc/arc-opts.h (FPU_SP, FPU_SF, FPU_SC, FPU_SD, FPU_DP)
	(FPU_DF, FPU_DC, FPU_DD, FXP_DP): Define.
	* config/arc/arc.c (arc_init): Check FPU options.
	(get_arc_condition_code): Handle new CC_FPU* modes.
	(arc_select_cc_mode): Likewise.
	(arc_conditional_register_usage): Allow 64 bit datum into even-odd
	register pair only. Allow access for ARCv2 accumulator.
	(gen_compare_reg): Whenever we have FPU support use FPU compare
	instructions.
	(arc_reorg): Don't generate brcc insns when FPU compare
	instructions are involved.
	* config/arc/arc.h (TARGET_DPFP): Add TARGET_FP_DPAX condition.
	(TARGET_OPTFPE): Add condition when ARC EM can use optimized
	floating point emulation.
	(ACC_REG_FIRST, ACC_REG_LAST, ACCL_REGNO, ACCH_REGNO): Define.
	(REVERSE_CONDITION): Add new CC_FPU* modes.
	(TARGET_FP_SP_BASE): Define.
	(TARGET_FP_DP_BASE): Likewise.
	(TARGET_FP_SP_FUSED): Likewise.
	(TARGET_FP_DP_FUSED): Likewise.
	(TARGET_FP_SP_CONV): Likewise.
	(TARGET_FP_DP_CONV): Likewise.
	(TARGET_FP_SP_SQRT): Likewise.
	(TARGET_FP_DP_SQRT): Likewise.
	(TARGET_FP_DP_AX): Likewise.
	* config/arc/arc.md (ARCV2_ACC): New constant.
	(type): New fpu type attribute.
	(SDF): Conditional iterator.
	(cstore<mode>, cbranch<mode>): Change expand condition.
	(addsf3, subsf3, mulsf3, adddf3, subdf3, muldf3): New expands,
	handles FPU/FPX cases as well.
	* config/arc/arc.opt (mfpu): New option.
	* config/arc/fpx.md (addsf3_fpx, subsf3_fpx, mulsf3_fpx):
	Renamed.
	(adddf3, muldf3, subdf3): Removed.
	* config/arc/predicates.md (proper_comparison_operator): Recognize
	CC_FPU* modes.
	* config/arc/fpu.md: New file.
	* doc/invoke.texi (ARC Options): Document mfpu option.

From-SVN: r233451

re PR rtl-optimization/69291 (wrong code at -O1 for ruby-2.3.0/regcomp.c:985:compile_length_quantifier_node())

2016-02-16  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/69291
	* ifcvt.c (noce_try_store_flag_constants): Re-instantiate
	noce_operand_ok check.

From-SVN: r233448

2016-02-16  Tom de Vries  <tom@codesourcery.com>

	PR lto/67709
	* omp-low.c (simd_clone_create): Remove call to
	symtab->call_cgraph_insertion_hooks.

	* testsuite/libgomp.fortran/declare-simd-4.f90: New test.

From-SVN: r233447

re PR tree-optimization/69802 (gcc ICE at -O1 and above  on valid code on x86_64-linux-gnu with “seg fault”)

	PR tree-optimization/69802
	* tree-ssa-reassoc.c (update_range_test): If op is
	SSA_NAME_IS_DEFAULT_DEF, give up unless tem is a positive
	op == 1 test of precision 1 integral op, otherwise handle
	that case as op itself.  Fix up formatting.
	(optimize_range_tests_to_bit_test, optimize_range_tests): Fix
	up formatting.

	* gcc.dg/pr69802.c: New test.

From-SVN: r233446

2016-02-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/69586
	* tree-vrp.c (register_edge_assert_for_2): Handle all integral
	types for conversion sources.

From-SVN: r233445

2016-02-16  Richard Biener  <rguenther@suse.de>

	PR middle-end/69801
	* fold-const.c (operand_equal_p): For COND_EXPR zero operand
	mask OEP_ADDRESS_OF.

	* gcc.dg/pr69801.c: New testcase.

From-SVN: r233444

From-SVN: r233441

This is PR68973 part 2, caused by the reload_vsx_from_gprsf splitter
emitting an invalid move.  The patch also fixes uses of TFmode, which
cannot now be assumed to be IBM double-double.

	PR target/68973
	* config/rs6000/rs6000.md (reload_vsx_from_gprsf): Rewrite splitter.
	(p8_mtvsrd_df, p8_mtvsrd_sf): New.
	(p8_mtvsrd_1, p8_mtvsrd_2): Delete.
	(p8_mtvsrwz): New.
	(p8_mtvsrwz_1, p8_mtvsrwz_2): Delete.
	(p8_xxpermdi_<mode>): Take two DF inputs rather than one TF.
	(p8_fmrgow_<mode>): Likewise.
	(reload_vsx_from_gpr<mode>): Make clobber IF.  Adjust for above
	changes.
	(reload_fpr_from_gpr<mode>): Similarly. Use "d" for op0 constraint.
	(reload_vsx_from_gprsf): Use p8_mtvsrd_sf rather than attempting
	to use movdi_internal64.  Remove op0_di.
	* config/rs6000/vsx.md (vsx_xscvspdpn_directmove): Make op1 SFmode.

From-SVN: r233438

From-SVN: r233437

2016-02-15  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

	PR libgfortran/69651
	* io/list_read.c: Entire file trailing spaces removed.
	(CASE_SEPARATORS): Remove '!'.
	(is_separator): Add namelist mode as condition with '!'.
	(push_char): Remove un-needed memset. (push_char4): Likewise and remove
	'new' pointer. (eat_separator): Remove un-needed use of notify_std.
	(read_logical): If '!' bang encountered when not in namelist mode got
	bad_logical to give an error. (read_integer): Likewise reject '!'.
	(read_character): Remove condition testing c = '!' which is now inside
	the is_separator macro. (parse_real): Reject '!' unless in namelist mode.
	(read_complex): Reject '!' unless in namelist mode. (read_real): Likewise
	reject '!'.

	PR libgfortran/69651
	* gfortran.dg/read_bang.f90: New test.
	* gfortran.dg/read_bang4.f90: New test.

From-SVN: r233436

	PR c++/69658
	* init.c (expand_default_init): Only call reshape_init
	in the direct-initialization from an initializer list case.

	* g++.dg/init/pr69658.C: New test.

From-SVN: r233435

	PR c++/69797
	* c-common.c (sync_resolve_size): Diagnose too few arguments
	even when params is non-NULL empty vector.

	* c-c++-common/pr69797.c: New test.

From-SVN: r233434

2016-01-21  Evandro Menezes  <e.menezes@samsung.com>

gcc/
	* config/aarch64/aarch64.md (fccmp): Change insn type.
	(fccmpe): Likewise.
	* config/aarch64/thunderx.md (thunderx_fcmp): Add "fccmp{s,d}" types.
	* config/arm/cortex-a53.md (cortex_a53_fpalu): Likewise.
	* config/arm/cortex-a57.md (cortex_a57_fp_cmp): Likewise.
	* config/arm/xgene1.md (xgene1_fcmp): Likewise.
	* config/arm/exynos-m1.md (exynos_m1_fp_ccmp): New insn reservation.
	* config/arm/types.md (fccmps): Add new insn type.
	(fccmpd): Likewise.

From-SVN: r233432