2020-02-28  Michael Meissner  <meissner@linux.ibm.com>

	PR target/93937
	* config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
	Delete, the insn will never work.

When the underlying range models common_range, then reverse_view::begin() is
already O(1) without caching.  So we should disable the cache in this case too.

libstdc++-v3/ChangeLog:

	* include/std/ranges (reverse_view::_S_needs_cached_begin): Set to false
	whenever the underlying range models common_range.

	PR other/93965
	* configure.ac: Improve detection of ld_date by requiring
	either two dashes or none.
	* configure: Regenerate.

Seems I've missed one thing, as the first hunk in
https://github.com/cplusplus/draft/commit/c8e68ed202b4a9260616bcee8a9768b5dca4bbca
changes the wording so that only potentially-evaluated id-expressions that
denote immediate functions must appear only in the specified contexts.
That IMO means that in unevaluated contexts there aren't such restrictions
anymore, so I think in unevaluated contexts one should be able to take the
address of an immediate function.

2020-02-28  Jakub Jelinek  <jakub@redhat.com>

	P1937R2 - Fixing inconsistencies between const{expr,eval} functions
	* typeck.c (cp_build_addr_expr_1): Allow taking address of immediate
	functions in unevaluated contexts.

	* g++.dg/cpp2a/consteval3.C: Change dg-error about taking address of
	immediate function in unevaluated contexts into dg-bogus.
	* g++.dg/cpp2a/consteval16.C: New test.

2020-02-28  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/93564
	* ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
	do not honor reg alloc order.

The message for conflicting mcpu and march previously printed the
architecture of the CPU instead of the CPU name, as well as omitting the
extensions to the march string. This patch corrects both errors. This
patch fixes PR target/87612.

2020-02-27  Joel Hutton  <Joel.Hutton@arm.com>

        PR target/87612
        * config/aarch64/aarch64.c (aarch64_override_options): Fix
        misleading warning string.

This patch adds memoization to these four views so that their begin() has the
required amortized constant time complexity.

The cache is enabled only for forward_ranges and above because we need the
underlying iterator to be copyable and multi-pass in order for the cache to be
usable.  In the general case we represent the cached result of begin() as a bare
iterator.  This takes advantage of the fact that value-initialized forward
iterators can be compared to as per N3644, so we can use a value-initialized
iterator to denote the "empty" state of the cache.

As a special case, when the underlying range models random_access_range and when
it's profitable size-wise, then we cache the offset of the iterator from the
beginning of the range instead of caching the iterator itself.

Additionally, in drop_view and reverse_view we disable the cache when the
underlying range models random_access_range, because in these cases recomputing
begin() takes O(1) time anyway.

libstdc++-v3/ChangeLog:

	* include/std/ranges (__detail::_CachedPosition): New struct.
	(views::filter_view::_S_needs_cached_begin): New member variable.
	(views::filter_view::_M_cached_begin): New member variable.
	(views::filter_view::begin): Use _M_cached_begin to cache its
	result.
	(views::drop_view::_S_needs_cached_begin): New static member variable.
	(views::drop_view::_M_cached_begin): New member variable.
	(views::drop_view::begin): Use _M_cached_begin to cache its result
	when _S_needs_cached_begin.
	(views::drop_while_view::_M_cached_begin): New member variable.
	(views::drop_while_view::begin): Use _M_cached_begin to cache its
	result.
	(views::reverse_view::_S_needs_cached_begin): New static member
	variable.
	(views::reverse_view::_M_cached_begin): New member variable.
	(views::reverse_view::begin): Use _M_cached_begin to cache its result
	when _S_needs_cached_begin.
	* testsuite/std/ranges/adaptors/drop.cc: Augment test to check that
	drop_view::begin caches its result.
	* testsuite/std/ranges/adaptors/drop_while.cc: Augment test to check
	that drop_while_view::begin caches its result.
	* testsuite/std/ranges/adaptors/filter.cc: Augment test to check that
	filter_view::begin caches its result.
	* testsuite/std/ranges/adaptors/reverse.cc: Augment test to check that
	reverse_view::begin caches its result.

These tests were failing on XFS because it doesn't support setting file
timestamps past 2038, so the expected overflow when reading back a huge
timestamp into a file_time_type didn't happen.

Additionally, the std::filesystem::file_time_type::clock has an
epoch that is out of range of 32-bit time_t so testing times around that
epoch may also fail.

This fixes the tests to give up gracefully if the filesystem doesn't
support times that can't be represented in 32-bit time_t.

	* testsuite/27_io/filesystem/operations/last_write_time.cc: Fixes for
	filesystems that silently truncate timestamps.
	* testsuite/experimental/filesystem/operations/last_write_time.cc:
	Likewise.

This fixes a failure due to a (correct) warning seen when testing with
-D_GLIBCXX_USE_CXX11_ABI=0 -D_GLIBCXX_ASSERTIONS:

include/bits/char_traits.h:365: warning: 'void* __builtin_memcpy(void*, const void*, long unsigned int)'
specified bound 18446744073709551615 exceeds maximum object size 9223372036854775807 [-Wstringop-overflow=]

FAIL: 21_strings/basic_string/cons/char/1.cc (test for excess errors)

	* testsuite/21_strings/basic_string/cons/char/1.cc: Disable
	-Wstringop-overflow warnings.

2020-02-28  Joel Hutton  <joel.hutton@arm.com>

	* MAINTAINERS (Write After Approval) : Add myself.

2020-02-28  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/92152
	* g++.dg/torture/pr92152.C (size_t): Use decltype (sizeof (0)) instead
	of hardcoding unsigned long.
	(uint64_t): Use unsigned long long instead of unsigned long.

gcc/ChangeLog:

	* doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.

	* fr.po: Update.

	* testsuite/lib/libstdc++.exp (v3_target_compile): Add
	-fdiagnostics-urls=never to options.

[gcc]
2020-02-27  Michael Meissner  <meissner@linux.ibm.com>

	PR target/93932
	* config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
	Split the insn into two parts.  This insn only does variable
	extract from a register.
	(vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
	variable extract from memory.
	(vsx_extract_v4sf_var): Split the insn into two parts.  This insn
	only does variable extract from a register.
	(vsx_extract_v4sf_var_load): New insn, do variable extract from
	memory.
	(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
	into two parts.  This insn only does variable extract from a
	register.
	(vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
	do variable extract from memory.

[gcc/testsuite]
2020-02-27  Michael Meissner  <meissner@linux.ibm.com>

	PR target/93932
	* gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Adjust
	instruction counts.

This implements Jason's suggested approach: 'I'd think that the bug is
that we're treating them as types in the first place; they aren't
types, so they shouldn't reach comptypes.  I'd lean toward adding an
assert to that effect and fixing the caller to use
e.g. template_args_equal.'

	PR c++/93933
	* pt.c (template_args_equal): Pass ARGUMENT_PACKS through to
	cp_tree_equal.
	* tree.c (cp_tree_equal): Compare ARGUMENT_PACKS here,
	* typeck.c (comptypes): Assert we don't get any argument packs.

Some of the range adaptors have distinct constant and non-constant
iterator/sentinel types, along with converting constructors that can convert a
non-constant iterator/sentinel to a constant iterator/sentinel.  This patch adds
the missing appropriate friend declarations in order to make these converting
constructors well formed.

Strictly speaking it seems the friendship relations don't need to go both ways
-- we could get away with declaring e.g. friend _Iterator<false>; instead of
friend _Iterator<!_Const>; but both reference implementations seem to use the
latter symmetric form anyway.

libstdc++-v3/ChangeLog:

	* include/std/ranges (transform_view::_Iterator<_Const>): Befriend
	_Iterator<!_Const>.
	(transform_view::_Sentinel<_Const>): Befriend _Sentinel<!_Const>.
	(take_view::_Sentinel<_Const>): Likewise.
	(take_while_view::_Sentinel<_Const>): Likewise.
	(split_view::_OuterIter<_Const>): Befriend _OuterIter<!_Const>.
	* testsuite/std/ranges/adaptors/split.cc: Augment test.
	* testsuite/std/ranges/adaptors/take.cc: Augment test.
	* testsuite/std/ranges/adaptors/take_while.cc: Augment test.
	* testsuite/std/ranges/adaptors/transform.cc: Augment test.

This fixes the failures in the constrained algos tests when they are run in
debug mode.

libstdc++-v3/ChangeLog:

	* testsuite/25_algorithms/copy/constrained.cc: Don't assume that the
	base() of a vector<>::iterator is a pointer.
	* testsuite/25_algorithms/copy_backward/constrained.cc: Likewise.
	* testsuite/25_algorithms/move/constrained.cc: Likewise.
	* testsuite/25_algorithms/move_backward/constrained.cc: Likewise.
	* testsuite/25_algorithms/inplace_merge/constrained.cc: Use foo.data()
	instead of &foo[0].
	* testsuite/25_algorithms/partial_sort/constrained.cc: Likewise.
	* testsuite/25_algorithms/partial_sort_copy/constrained.cc: Likewise.
	* testsuite/25_algorithms/shuffle/constrained.cc: Likewise.
	* testsuite/25_algorithms/sort/constrained.cc: Likewise.
	* testsuite/25_algorithms/stable_sort/constrained.cc: Likewise.

2020-02-27  Martin Jambor  <mjambor@suse.cz>
	    Feng Xue  <fxue@os.amperecomputing.com>

	PR ipa/93707
	* ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
	new function calls_same_node_or_its_all_contexts_clone_p.
	(cgraph_edge_brings_value_p): Use it.
	(cgraph_edge_brings_value_p): Likewise.
	(self_recursive_pass_through_p): Return false if caller is a clone.
	(self_recursive_agg_pass_through_p): Likewise.

	testsuite/
	* gcc.dg/ipa/pr93707.c: New test.

FRE is checking stores for equivalence based on their address, value and
base+ref alias sets.  Because ref alias set is not always the alias set of
innermost type, but it may be one of refs in the access path (as decided by
component_uses_parent_alias_set_from) it means that we can not really rely on
the remaining part of access path to be meaningful in any way except for
offset+size computation.

The patch makes alias (which is used by FRE to validate transform) and
tree-ssa-alias to share same logic for ending the access path relevant for
TBAA. tree-ssa-alias previously ended access paths on VIEW_CONVERT_EXPR and
BIT_FIELD_REF so it is not hard to wire in common predicate.  However it led to
additional issues (I tried to read the code quite carefully for possible extra
fun, so I hope I found it all):

  1) alias_component_refs_walk compares base and reference sizes to see
     if one access path may continue by another.  This check can be confused
     by an union containing structure with zero sized array.  In this case we
     no longer see the refernece to zero sized array and think that ref size
     is 0.

     In an access path there can be at most one (valid) trailing/zero sized
     array access, so the sizes in the access path are decreasing with the
     this exception. This is already handled by the logic, however the access
     is not expected to happen past the end of TBAA segment.  I suppose this
     was kind of latent problem before because one can think of access path
     doing traling array past VIEW_CONVERT_EXPR, but since in C code we don't
     VCE and in non-C we don't do trailing arrays, we did not hit the problem.

     I fixed this by tracking if the trailing array references appearing after
     the end of TBAA access path and mostly punt in the second case (because we
     need to support kind of all type puning here). I do not think we can assume
     much of sanity here, in particular, we no longer know there is only one
     because FRE may mix things up.

     An exception is the walk that looks for occurence of basetype of path1
     within TBAA relevant part of path2.  Here we realy care about TBAA
     relevant parts of paths and thus do not need to give up.

     I broke out the logic into ends_tbaa_access_path_p to avoid duplication and
     to let me stick some detailed comments. This became much more complex
     than I originally imagined (still it is useful to make oracle both faster
     and more precise).

     Note that logic in aliasing_component_refs_walk is safe since it works
     on TBAA relevant segments of paths only.
  2) nonoverlapping_refs_since_match_p is using TBAA only in the corner case
     that the paths got out of sync and re-synchronize of types of same size
     are found.  I thus extended it to whole paths (not only TBAA relevant
     parts) and track if the TBAA part can be used by counting of number of
     TBAA relevant res on the stack.

     I have noticed that in one case we call nonoverlapping_refs_since_match_p
     before checking for view converting MEM_REFs and in others we check
     after.  I think we want to just disable TBAA part if view convert
     is in there but still disambiguate.  I will do this incrementaly.
  3) nonoverlapping_component_refs_p uses TBAA so it needs to punt on
     end of TBAA path. It deals with no sizes and thus there is not the issue
     as in 1).

I am also attaching one (most probably) valid C++ testcase (by Mark Williams)
where we incorrectly disambiguated while the code is valid by the common
initial sequence rule.  This happens to be fixed by same patch. Here one access
goes through union and follows by access path trhough one filed, while other
access path start by different field of the union with common initial sequence.
This made aliasing_component_refs_p to not find the overlapping type (because
there is none) and disambiguate.  Now we cut the first access path by the union
reference and this makes us to find the path continuation in
alias_component_refs_walk.

If FRE is ever made more careful about access paths past the fist union
reference (I think that would be good idea since unions are quite common in C++
and we throw away quite useful info) then we will need to teach access path
oracle about the common initial sequence rule (which, as Mark pointed out, is
part of both C and C++ standards).

Only argument that can possibly invalidate this testcase is that I do not see
that stadnard is clear about the situation where one access path contains the
union but other starts after the union.

Clearly if both start after the union reference we are right to disambiguate
(since there is no union unvolved).  If both starts before union then there is
common initial sequence and by standard it is defined. This case works on current
trunk because aliasing_component_refs_p resorts to base+offset after finding
the match. But even that is more or less an accident I would say.

I had to xfail three testcases.  While alias-access-path ones are artificial
and odd, 20030807-7 is derived from gcc and shows that we give up on
disambiguations of tree_node union, so this patch disables useful transform
in real world code.

I am still planning to collect some data on the effect of this change to TBAA,
but unless we want to reorganize FRE, I do not think there is better solution.

gcc/ChangeLog:

2020-02-26  Jan Hubicka  <hubicka@ucw.cz>

	PR middle-end/92152
	* alias.c (ends_tbaa_access_path_p): Break out from ...
	(component_uses_parent_alias_set_from): ... here.
	* alias.h (ends_tbaa_access_path_p): Declare.
	* tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
	handle trailing arrays past end of tbaa access path.
	(aliasing_component_refs_p): ... here; likewise.
	(nonoverlapping_refs_since_match_p): Track TBAA segment of the access
	path; disambiguate also past end of it.
	(nonoverlapping_component_refs_p): Use only TBAA segment of the access
	path.

gcc/testsuite/ChangeLog:

2020-02-26  Jan Hubicka  <hubicka@ucw.cz>

	PR middle-end/92152
	* gcc.dg/tree-ssa/alias-access-path-12.c: New testcase.
	* g++.dg/torture/pr92152.C: New testcase.
	* gcc.dg/torture/pr92152.c: New testcase.
	* gcc.dg/tree-ssa/20030807-7.c: xfail.
	* gcc.dg/tree-ssa/alias-access-path-4.c: xfail one case.
	* gcc.dg/tree-ssa/alias-access-path-5.c: xfail one case.

This patch adds support for the bf16 vector create, get, set,
duplicate and reinterpret intrinsics.
ACLE documents are at https://developer.arm.com/docs/101028/latest
ISA documents are at https://developer.arm.com/docs/ddi0596/latest

gcc/ChangeLog:

2020-02-27  Mihail Ionescu  <mihail.ionescu@arm.com>

	* (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
	beginning of the file.
	(vcreate_bf16, vcombine_bf16): New.
	(vdup_n_bf16, vdupq_n_bf16): New.
	(vdup_lane_bf16, vdup_laneq_bf16): New.
	(vdupq_lane_bf16, vdupq_laneq_bf16): New.
	(vduph_lane_bf16, vduph_laneq_bf16): New.
	(vset_lane_bf16, vsetq_lane_bf16): New.
	(vget_lane_bf16, vgetq_lane_bf16): New.
	(vget_high_bf16, vget_low_bf16): New.
	(vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
	(vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
	(vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
	(vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
	(vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
	(vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
	(vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
	(vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
	(vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
	(vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
	(vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
	(vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
	(vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
	(vreinterpretq_bf16_p128): New.
	(vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
	(vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
	(vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
	(vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
	(vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
	(vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
	(vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
	(vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
	(vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
	(vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
	(vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
	(vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
	(vreinterpretq_p128_bf16): New.
	* config/arm/arm_neon_builtins.def (VDX): Add V4BF.
	(V_elem): Likewise.
	(V_elem_l): Likewise.
	(VD_LANE): Likewise.
	(VQX) Add V8BF.
	(V_DOUBLE): Likewise.
	(VDQX): Add V4BF and V8BF.
	(V_two_elem, V_three_elem, V_four_elem): Likewise.
	(V_reg): Likewise.
	(V_HALF): Likewise.
	(V_double_vector_mode): Likewise.
	(V_cmp_result): Likewise.
	(V_uf_sclr): Likewise.
	(V_sz_elem): Likewise.
	(Is_d_reg): Likewise.
	(V_mode_nunits): Likewise.
	* config/arm/neon.md (neon_vdup_lane): Enable for BFloat.

gcc/testsuite/ChangeLog:

2020-02-27  Mihail Ionescu  <mihail.ionescu@arm.com>

	* gcc.target/arm/bf16_dup.c: New test.
	* gcc.target/arm/bf16_reinterpret.c: Likewise.

2020-02-27  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
	(<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
	(<expander><mode>3<exec>): Likewise.
	(<expander><mode>3): New.
	(v<expander><mode>3): New.
	(<expander><mode>3): New.
	(<expander><mode>3<exec>): Rename to ...
	(<expander>v64si3<exec>): ... this, and change modes to V64SI.
	* config/gcn/gcn.md (mnemonic): Use '%B' for not.

testsuite/

2020-02-25 Will Schmidt  <will_schmidt@vnet.ibm.com>

      * lib/target_supports.exp (check_effective_target_has_arch_pwr5): New.
      (check_effective_target_has_arch_pwr6): New.
      (check_effective_target_has_arch_pwr7): New.
      (check_effective_target_has_arch_pwr8): New.
      (check_effective_target_has_arch_pwr9): New.
      * gcc.target/powerpc/pr92132-fp-1.c: Add target check.

2020-02-27  Bill Schmidt  <wschmidt@linux.ibm.com>

        * gcc.target/powerpc/ppc64-abi-1.c: Compile with -mno-pcrel.
        * gcc.target/powerpc/ppc64-abi-2.c: Likewise.

There was a mistake in forward-porting and contributing some
vxworks7r2 changes, that caused a conditional to be dropped around a
couple of preprocessor directives, needed only up to vxworks6, that
change the compiler's behavior WRT introducing dollars and dots in
symbol names.

This deviates GCC's behavior from the native system compiler, in a way
that appears to have ABI implications, so we'd like to correct that,
even at this late stage in the development cycle.


for  gcc/ChangeLog

	* config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
	them alone on vx7.

Including limits.h on vxworks pollutes the global namespace with SH
and many other platform names; work around it.


for  gcc/testsuite/ChangeLog

	* gcc.target/aarch64/vect-mull.x (SH): Undefine.

This fixes a test failure with -D_GLIBCXX_DEBUG:

FAIL: 23_containers/array/comparison_operators/constexpr.cc (test for excess errors)

	* include/debug/array (operator<=>): Define for C++20.
	* testsuite/23_containers/array/tuple_interface/get_debug_neg.cc:
	Adjust dg-error line numbers.
	* testsuite/23_containers/array/tuple_interface/
	tuple_element_debug_neg.cc: Likewise.

This fixes several failures with -D_GLIBCXX_ASSERTIONS added to the
testsuite flags, such as:

FAIL: 23_containers/span/back_assert_neg.cc (test for excess errors)

	* testsuite/23_containers/span/back_assert_neg.cc: Add #undef before
	defining _GLIBCXX_ASSERTIONS.
	* testsuite/23_containers/span/first_2_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/first_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/front_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/index_op_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/last_2_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/last_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/subspan_2_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/subspan_3_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/subspan_4_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/subspan_5_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/subspan_6_assert_neg.cc: Likewise.
	* testsuite/23_containers/span/subspan_assert_neg.cc: Likewise.

This fixes a test failure with -std=gnu++98 -D_GLIBCXX_DEBUG:

FAIL: 21_strings/basic_string/modifiers/insert/char/1.cc (test for excess errors)

	* include/debug/string (__gnu_debug::basic_string::insert): Fix for
	C++98 where the member function of the base class returns void.

In implementing Jason's suggested direction for 93933, the compiler
exploded in a surprising way.  Turns out an assert had been passing
NULLS to comptypes, and therefore not checking what it intended.

Further comptypes, could silently accept such nulls under most
circumstances.

	* class.c (adjust_clone_args): Correct arg-checking assert.
	* typeck.c (comptypes): Assert not nulls.

Comparing value-initialized forward_iterator_wrapper<T> objects fails an
assertion, but should be valid in C++14 and later.

	* testsuite/util/testsuite_iterators.h (forward_iterator_wrapper): Add
	equality comparisons that support value-initialized iterators.

Value-numbering failed to handle __builtin_{memcpy,memset,...}_chk
variants when removing abstraction and also failed to use the
value-numbering lattice when requiring the length argument of the
call to be constant.

2020-02-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/93508
	* tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
	non-_CHK variants.  Valueize their length arguments.

	* gcc.dg/tree-ssa/ssa-fre-85.c: New testcase.

When possibly expanding a hash-map avoid keeping a reference to an
entry.

2020-02-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/93953
	* tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
	to the hash-map entry.

	* gcc.dg/pr93953.c: New testcase.

BImode usually only requires one bit, but instructions that write to VCC also
clobber the reset of the DImode register pair, so gcn_class_max_nregs reports
that two registers are needed for BImode.  Paradoxically, accessing VCC via
SImode is therefore uses fewer registers than accessing via BImode.

The LRA checking code takes this into account, but the DF liveness data also
looks at the subreg, so it says (subreg:SI (reg:BI VCC) 0) only makes the low
part live.  Both are "correct", but they disagree, which causes an ICE.

This doesn't happen when writing conditions to VCC; it happens when accessing
VCC_LO via a regular move to a regular SImode register.

If we transform the subregs so that BImode is always the outer mode then it
basically means the same thing, except that now both LRA and DF calculate nregs
the same, and ICE goes away.

As soon as LRA is done the subregs all evaporate anyway.

2020-02-27  Andrew Stubbs  <ams@codesourcery.com>

	gcc/
	* config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.

Although most of the old-style "concept checks" are only really usable
with C++98 because they enforce the wrong things, this is a simple
change that makes them a bit more useful for C++14 and up.

	* include/bits/boost_concept_check.h (__function_requires): Add
	_GLIBCXX14_CONSTEXPR.
	* testsuite/25_algorithms/min/concept_checks.cc: New test.

This applies file mapping when emitting the directory table
directly instead of using the assemblers .file directive where
we already correctly apply the map.  Notably the non-assembler
path is used for the early debug emission for LTO.

2020-02-27  Mark Williams  <mwilliams@fb.com>

	* dwarf2out.c (file_name_acquire): Call remap_debug_filename.
	* lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
	-ffile-prefix-map and -fmacro-prefix-map.
	* lto-streamer-out.c: Include file-prefix-map.h.
	(lto_output_location): Remap the file part of locations.

The following testcase is rejected, while it was accepted in 3.4 and earlier
(before tree-ssa merge).
The problem is that we decide to promote the const variable to TREE_STATIC,
but TREE_STATIC DECL_REGISTER VAR_DECLs may only be the global register vars
and so assemble_variable/make_decl_rtl diagnoses it.

Either we do what the following patch does, where we could consider
register as a hint the user doesn't want such optimization, because if
something is forced static, it is not "register" anymore and register static
is not valid in C either, or we could clear DECL_REGISTER instead, but would
still need to punt at least on DECL_HARD_REGISTER cases.

2020-02-27  Jakub Jelinek  <jakub@redhat.com>

	PR c/93949
	* gimplify.c (gimplify_init_constructor): Don't promote readonly
	DECL_REGISTER variables to TREE_STATIC.

	* gcc.c-torture/compile/pr93949.c: New test.

The following is the last spot in vn_reference_lookup_3 that didn't allow
non-byte aligned offsets or sizes.  To be precise, it did allow size that
wasn't multiple of byte size and that caused a wrong-code issue on
big-endian, as the pr93945.c testcase shows, so for GCC 9 we should add
&& multiple_p (ref->size, BITS_PER_UNIT) check instead.
For the memset with SSA_NAME middle-argument, it still requires byte-aligned
offset, as we'd otherwise need to rotate the value at runtime.

2020-02-27  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/93582
	PR tree-optimization/93945
	* tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
	non-zero INTEGER_CST second argument and ref->offset or ref->size
	not a multiple of BITS_PER_UNIT.

	* gcc.dg/tree-ssa/pr93582-9.c: New test.
	* gcc.c-torture/execute/pr93945.c: New test.

	* doc/install.texi (Binaries): Update description of BullFreeware.