1. 20 Jun, 2017 3 commits
    • re PR target/81121 (ICE: in extract_insn, at recog.c:2311) · a1aa2599
      	PR target/81121
      	* config/i386/i386.md (TARGET_USE_VECTOR_CONVERTS float si->{sf,df}
      	splitter): Require TARGET_SSE2 in the condition.
      
      	* gcc.target/i386/pr81121.c: New test.
      
      From-SVN: r249396
      Jakub Jelinek committed
    • re PR target/79799 (Improve vec_insert of float on Power9) · 16122c22
      [gcc]
      2017-06-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	PR target/79799
      	* config/rs6000/rs6000.c (rs6000_expand_vector_init): Add support
      	for doing vector set of SFmode on ISA 3.0.
      	* config/rs6000/vsx.md (vsx_set_v4sf_p9): Likewise.
      	(vsx_set_v4sf_p9_zero): Special case setting 0.0f to a V4SF
      	element.
      	(vsx_insert_extract_v4sf_p9): Add an optimization for inserting a
      	SFmode value into a V4SF variable that was extracted from another
      	V4SF variable without converting the element to double precision
      	and back to single precision vector format.
      	(vsx_insert_extract_v4sf_p9_2): Likewise.
      
      [gcc/testsuite]
      2017-06-20  Michael Meissner  <meissner@linux.vnet.ibm.com>
      
      	PR target/79799
      	* gcc.target/powerpc/pr79799-1.c: New test.
      	* gcc.target/powerpc/pr79799-2.c: Likewise.
      	* gcc.target/powerpc/pr79799-3.c: Likewise.
      	* gcc.target/powerpc/pr79799-4.c: Likewise.
      	* gcc.target/powerpc/pr79799-5.c: Likewise.
      
      From-SVN: r249395
      Michael Meissner committed
    • Daily bump. · 62be3709
      From-SVN: r249394
      GCC Administrator committed
  2. 19 Jun, 2017 25 commits
  3. 18 Jun, 2017 7 commits
  4. 17 Jun, 2017 5 commits