1. 24 Oct, 2012 15 commits
  2. 23 Oct, 2012 25 commits
    • re PR c++/54922 ([C++11][DR 1359] constexpr constructors require initialization… · 7c7e8c78
      re PR c++/54922 ([C++11][DR 1359] constexpr constructors require initialization of all union members)
      
      /cp
      2012-10-23  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR c++/54922
      	* semantics.c (cx_check_missing_mem_inits): Handle anonymous union
      	members.
      
      /testsuite
      2012-10-23  Paolo Carlini  <paolo.carlini@oracle.com>
      
      	PR c++/54922
      	* g++.dg/cpp0x/constexpr-union4.C: New.
      
      From-SVN: r192749
      Paolo Carlini committed
    • re PR bootstrap/54820 (ada: cannot find -lstdc++ since 4.8.0 20121002) · 0d6414b2
      	PR bootstrap/54820
      	* configure.ac (have_static_libs): Force 'no' for GCC version < 4.5.
      	* configure: Regenerate.
      
      From-SVN: r192748
      Eric Botcazou committed
    • * MAINTAINERS (aarch64): Add Marcus and myself. · a780583f
      From-SVN: r192747
      Richard Earnshaw committed
    • tree-ssa-threadedge.c (cond_arg_set_in_bb): Remove unused debugging argument. · daf61353
             * tree-ssa-threadedge.c (cond_arg_set_in_bb): Remove unused
              debugging argument.
      
      From-SVN: r192746
      Jeff Law committed
    • re PR tree-optimization/54985 (dom optimization erroneous remove conditional goto.) · c0258754
              PR tree-optimization/54985
              * tree-ssa-threadedge.c (cond_arg_set_in_bb): New function
              * extracted
              from thread_across_edge.
              (thread_across_edge): Use it in all cases where we might thread
              across a back edge.
      
              * gcc.c-torture/execute/pr54985.c: New test.
      
      From-SVN: r192745
      Jeff Law committed
    • lra-constraints.c (update_ebb_live_info): Process empty blocks. · 44b94bdb
      2012-10-23  Vladimir Makarov  <vmakarov@redhat.com>
      
      	* lra-constraints.c (update_ebb_live_info): Process empty blocks.
      
      From-SVN: r192743
      Vladimir Makarov committed
    • expmed.c (store_split_bit_field): Update the calls to extract_fixed_bit_field. · b8ab7fc8
      gcc/
      	* expmed.c (store_split_bit_field): Update the calls to
      	extract_fixed_bit_field.  In the big-endian case, always
      	use the mode of OP0 to count the number of significant bits.
      	(extract_bit_field_1): Remove unit, offset, bitpos and
      	byte_offset from the outermost scope.  Express conditions in terms
      	of bitnum rather than offset, bitpos and byte_offset.  Move the
      	computation of MODE1 to the block that needs it.  Use MODE unless
      	the TMODE-based mode_for_size calculation succeeds.  Split the
      	plain move cases into two, one for memory accesses and one for
      	register accesses.  Generalize the memory case, freeing it from
      	the old register-based endian checks.  Move the INT_MODE calculation
      	above the code that needs it.  Use simplify_gen_subreg to handle
      	multiword OP0s.  If the field still spans several words, pass it
      	directly to extract_split_bit_field.  Assume after that point
      	that both targets and register sources fit within a word.
      	Replace x-prefixed variables with non-prefixed forms.
      	Compute the bitpos for ext(z)v register operands directly in the
      	chosen unit size, rather than going through an intermediate
      	BITS_PER_WORD unit size.  Simplify the containment check
      	used when forcing OP0 into a register.  Update the call to
      	extract_fixed_bit_field.
      	(extract_fixed_bit_field): Replace the bitpos and offset parameters
      	with a single bitnum parameter, of the same form as extract_bit_field.
      	Assume that OP0 contains the full field.  Simplify the memory offset
      	calculation and containment check for volatile bitfields.  Make the
      	offset explicit when volatile bitfields force a misaligned access.
      	Remove WARNED and fix long lines.  Assert that the processed OP0
      	has an integral mode.
      	(store_split_bit_field): Update the call to store_fixed_bit_field.
      
      From-SVN: r192741
      Richard Sandiford committed
    • expmed.c (lowpart_bit_field_p): New function. · bebf0797
      gcc/
      	* expmed.c (lowpart_bit_field_p): New function.
      	(store_bit_field_1): Remove unit, offset, bitpos and byte_offset
      	from the outermost scope.  Express conditions in terms of bitnum
      	rather than offset, bitpos and byte_offset.  Split the plain move
      	cases into two, one for memory accesses and one for register accesses.
      	Allow simplify_gen_subreg to fail rather than calling validate_subreg.
      	Move the handling of multiword OP0s after the code that coerces VALUE
      	to an integer mode.  Use simplify_gen_subreg for this case and assert
      	that it succeeds.  If the field still spans several words, pass it
      	directly to store_split_bit_field.  Assume after that point that
      	both sources and register targets fit within a word.  Replace
      	x-prefixed variables with non-prefixed forms.  Compute the bitpos
      	for insv register operands directly in the chosen unit size, rather
      	than going through an intermediate BITS_PER_WORD unit size.
      	Update the call to store_fixed_bit_field.
      	(store_fixed_bit_field): Replace the bitpos and offset parameters
      	with a single bitnum parameter, of the same form as store_bit_field.
      	Assume that OP0 contains the full field.  Simplify the memory offset
      	calculation.  Assert that the processed OP0 has an integral mode.
      	(store_split_bit_field): Update the call to store_fixed_bit_field.
      
      From-SVN: r192740
      Richard Sandiford committed
    • re PR debug/54508 (Wrong debug information emitted if data members not referenced) · a17d5a98
      PR debug/54508
      * dwarf2out.c (prune_unused_types_prune): If pruning a class and
      not all its children were marked, add DW_AT_declaration flag.
      
      * g++.dg/debug/dwarf2/pr54508.C: New.
      
      From-SVN: r192739
      Paul Koning committed
    • re PR c++/54844 (ice tsubst_copy, at cp/pt.c:12352) · 22531fb1
      	PR c++/54844
      	* pt.c (tsubst_copy, tsubst_copy_and_build) <case SIZEOF_EXPR>: Use
      	tsubst instead of tsubst_copy* on types.
      
      	* g++.dg/template/sizeof14.C: New test.
      
      From-SVN: r192736
      Jakub Jelinek committed
    • runtime: Disable crash tests that runs go tool. · 8d672b26
      From-SVN: r192735
      Ian Lance Taylor committed
    • re PR c++/54988 (fpmath=sse target pragma causes inlining failure because of… · 66f2cabc
      re PR c++/54988 (fpmath=sse target pragma causes inlining failure because of target specific option mismatch)
      
      	PR c++/54988
      	* decl2.c (cplus_decl_attributes): Don't return early
      	if attributes is NULL.
      
      	* c-c++-common/pr54988.c: New test.
      
      From-SVN: r192734
      Jakub Jelinek committed
    • AArch64 [8/10] Fixup botched commit. · d507e9a3
      From-SVN: r192733
      Marcus Shawcroft committed
    • AArch64 [1/10] · 24034425
      2012-10-23  Ian Bolton  <ian.bolton@arm.com>
      	    James Greenhalgh  <james.greenhalgh@arm.com>
      	    Jim MacArthur  <jim.macarthur@arm.com>
      	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
      	    Nigel Stephens  <nigel.stephens@arm.com>
      	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
      	    Richard Earnshaw  <rearnsha@arm.com>
      	    Sofiane Naci  <sofiane.naci@arm.com>
      	    Stephen Thomas  <stephen.thomas@arm.com>
      	    Tejas Belagod  <tejas.belagod@arm.com>
      	    Yufeng Zhang  <yufeng.zhang@arm.com>
      
      	* config.gcc: Add AArch64.
      	* configure.ac: Add AArch64 TLS support detection.
      	* configure: Regenerate.
      
      
      Co-Authored-By: James Greenhalgh <james.greenhalgh@arm.com>
      Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
      Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
      Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
      Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
      Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
      Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
      Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
      Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
      Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>
      
      From-SVN: r192732
      Ian Bolton committed
    • AArch64 [10/10] · 597ee901
      2012-10-23  Yufeng Zhang  <yufeng.zhang@arm.com>
      
      	* config/cpu/aarch64/cxxabi_tweaks.h: New file.
      	* configure.host: Enable aarch64.
      
      From-SVN: r192731
      Yufeng Zhang committed
    • AArch64 [9/10] · c1f37c00
      2012-10-23  Ian Bolton  <ian.bolton@arm.com>
      	    Jim MacArthur  <jim.macarthur@arm.com>
      	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
      	    Nigel Stephens  <nigel.stephens@arm.com>
      	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
      	    Richard Earnshaw  <rearnsha@arm.com>
      	    Sofiane Naci  <sofiane.naci@arm.com>
      	    Stephen Thomas  <stephen.thomas@arm.com>
      	    Tejas Belagod  <tejas.belagod@arm.com>
      	    Yufeng Zhang  <yufeng.zhang@arm.com>
      
      	* configure.tgt: Add AArch64.
      
      
      
      Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
      Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
      Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
      Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
      Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
      Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
      Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
      Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
      Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>
      
      From-SVN: r192730
      Ian Bolton committed
    • AArch64 [8/10] · 1e3d5096
      2012-10-23  Ian Bolton  <ian.bolton@arm.com>
      	    Jim MacArthur  <jim.macarthur@arm.com>
      	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
      	    Nigel Stephens  <nigel.stephens@arm.com>
      	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
      	    Richard Earnshaw  <rearnsha@arm.com>
      	    Sofiane Naci  <sofiane.naci@arm.com>
      	    Stephen Thomas  <stephen.thomas@arm.com>
      	    Tejas Belagod  <tejas.belagod@arm.com>
      	    Yufeng Zhang  <yufeng.zhang@arm.com>
      
      	* config.host (aarch64*-*-elf, aarch64*-*-linux*): New.
      	* config/aarch64/crti.S: New file.
      	* config/aarch64/crtn.S: New file.
      	* config/aarch64/linux-unwind.h: New file.
      	* config/aarch64/sfp-machine.h: New file.
      	* config/aarch64/sync-cache.c: New file.
      	* config/aarch64/t-aarch64: New file.
      	* config/aarch64/t-softfp: New file.
      
      
      Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
      Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
      Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
      Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
      Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
      Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
      Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
      Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
      Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>
      
      From-SVN: r192729
      Ian Bolton committed
    • AArch64 [7/10] · 04ce690f
      2012-10-23  Ian Bolton  <ian.bolton@arm.com>
      	    Jim MacArthur  <jim.macarthur@arm.com>
      	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
      	    Nigel Stephens  <nigel.stephens@arm.com>
      	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
      	    Richard Earnshaw  <rearnsha@arm.com>
      	    Sofiane Naci  <sofiane.naci@arm.com>
      	    Stephen Thomas  <stephen.thomas@arm.com>
      	    Tejas Belagod  <tejas.belagod@arm.com>
      	    Yufeng Zhang  <yufeng.zhang@arm.com>
      
      	* configure.ac: Enable AArch64.
      	* configure: Regenerate.
      
      
      Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
      Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
      Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
      Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
      Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
      Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
      Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
      Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
      Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>
      
      From-SVN: r192728
      Ian Bolton committed
    • AArch64 [6/10] · 34f8442e
      2012-10-23  Sofiane Naci <sofiane.naci@arm.com>
      
      	Mark libatomic unsupported in AArch64.
      
      	* configure.tgt: Mark libatomic unsupported.
      
      From-SVN: r192727
      Sofiane Naci committed
    • AArch64 [4/10] · 402d3de3
      2012-10-23  Ian Bolton  <ian.bolton@arm.com>
      	    Jim MacArthur  <jim.macarthur@arm.com>
      	    Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
      	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
      	    Nigel Stephens  <nigel.stephens@arm.com>
      	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
      	    Richard Earnshaw  <rearnsha@arm.com>
      	    Sofiane Naci  <sofiane.naci@arm.com>
      	    Stephen Thomas  <stephen.thomas@arm.com>
      	    Tejas Belagod  <tejas.belagod@arm.com>
      	    Yufeng Zhang  <yufeng.zhang@arm.com>
      
      	* lib/target-supports.exp
      	(check_profiling_available): Add AArch64.
      	(check_effective_target_vect_int): Likewise.
      	(check_effective_target_vect_shift): Likewise.
      	(check_effective_target_vect_float): Likewise.
      	(check_effective_target_vect_double): Likewise.
      	(check_effective_target_vect_widen_mult_qi_to_hi): Likewise.
      	(check_effective_target_vect_widen_mult_hi_to_si): Likewise.
      	(check_effective_target_vect_pack_trunc): Likewise.
      	(check_effective_target_vect_unpack): Likewise.
      	(check_effective_target_vect_hw_misalign): Likewise.
      	(check_effective_target_vect_short_mult): Likewise.
      	(check_effective_target_vect_int_mult): Likewise.
      	(check_effective_target_vect_stridedN): Likewise.
      	(check_effective_target_sync_int_long): Likewise.
      	(check_effective_target_sync_char_short): Likewise.
      	(check_vect_support_and_set_flags): Likewise.
      	(check_effective_target_aarch64_tiny): New.
      	(check_effective_target_aarch64_small): New.
      	(check_effective_target_aarch64_large): New.
      	* g++.dg/other/PR23205.C: Enable aarch64.
      	* g++.dg/other/pr23205-2.C: Likewise.
      	* g++.old-deja/g++.abi/ptrmem.C: Likewise.
      	* gcc.c-torture/execute/20101011-1.c: Likewise.
      	* gcc.dg/20020312-2.c: Likewise.
      	* gcc.dg/20040813-1.c: Likewise.
      	* gcc.dg/builtin-apply2.c: Likewise.
      	* gcc.dg/stack-usage-1.c: Likewise.
      
      
      Co-Authored-By: Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
      Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
      Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
      Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
      Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
      Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
      Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
      Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
      Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
      Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>
      
      From-SVN: r192726
      Ian Bolton committed
    • AArch64 [5/10] · 77c4ae24
      2012-10-23  Ian Bolton  <ian.bolton@arm.com>
      	    Jim MacArthur  <jim.macarthur@arm.com>
      	    Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
      	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
      	    Nigel Stephens  <nigel.stephens@arm.com>
      	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
      	    Richard Earnshaw  <rearnsha@arm.com>
      	    Sofiane Naci  <sofiane.naci@arm.com>
      	    Stephen Thomas  <stephen.thomas@arm.com>
      	    Tejas Belagod  <tejas.belagod@arm.com>
      	    Yufeng Zhang  <yufeng.zhang@arm.com>
      
      	* gcc.target/aarch64/aapcs/aapcs64.exp: New file.
      	* gcc.target/aarch64/aapcs/abitest-2.h: New file.
      	* gcc.target/aarch64/aapcs/abitest-common.h: New file.
      	* gcc.target/aarch64/aapcs/abitest.S: New file.
      	* gcc.target/aarch64/aapcs/abitest.h: New file.
      	* gcc.target/aarch64/aapcs/func-ret-1.c: New file.
      	* gcc.target/aarch64/aapcs/func-ret-2.c: New file.
      	* gcc.target/aarch64/aapcs/func-ret-3.c: New file.
      	* gcc.target/aarch64/aapcs/func-ret-3.x: New file.
      	* gcc.target/aarch64/aapcs/func-ret-4.c: New file.
      	* gcc.target/aarch64/aapcs/func-ret-4.x: New file.
      	* gcc.target/aarch64/aapcs/ice_1.c: New file.
      	* gcc.target/aarch64/aapcs/ice_2.c: New file.
      	* gcc.target/aarch64/aapcs/ice_3.c: New file.
      	* gcc.target/aarch64/aapcs/ice_4.c: New file.
      	* gcc.target/aarch64/aapcs/ice_5.c: New file.
      	* gcc.target/aarch64/aapcs/macro-def.h: New file.
      	* gcc.target/aarch64/aapcs/test_1.c: New file.
      	* gcc.target/aarch64/aapcs/test_10.c: New file.
      	* gcc.target/aarch64/aapcs/test_11.c: New file.
      	* gcc.target/aarch64/aapcs/test_12.c: New file.
      	* gcc.target/aarch64/aapcs/test_13.c: New file.
      	* gcc.target/aarch64/aapcs/test_14.c: New file.
      	* gcc.target/aarch64/aapcs/test_15.c: New file.
      	* gcc.target/aarch64/aapcs/test_16.c: New file.
      	* gcc.target/aarch64/aapcs/test_17.c: New file.
      	* gcc.target/aarch64/aapcs/test_18.c: New file.
      	* gcc.target/aarch64/aapcs/test_19.c: New file.
      	* gcc.target/aarch64/aapcs/test_2.c: New file.
      	* gcc.target/aarch64/aapcs/test_20.c: New file.
      	* gcc.target/aarch64/aapcs/test_21.c: New file.
      	* gcc.target/aarch64/aapcs/test_22.c: New file.
      	* gcc.target/aarch64/aapcs/test_23.c: New file.
      	* gcc.target/aarch64/aapcs/test_24.c: New file.
      	* gcc.target/aarch64/aapcs/test_25.c: New file.
      	* gcc.target/aarch64/aapcs/test_26.c: New file.
      	* gcc.target/aarch64/aapcs/test_3.c: New file.
      	* gcc.target/aarch64/aapcs/test_4.c: New file.
      	* gcc.target/aarch64/aapcs/test_5.c: New file.
      	* gcc.target/aarch64/aapcs/test_6.c: New file.
      	* gcc.target/aarch64/aapcs/test_7.c: New file.
      	* gcc.target/aarch64/aapcs/test_8.c: New file.
      	* gcc.target/aarch64/aapcs/test_9.c: New file.
      	* gcc.target/aarch64/aapcs/test_align-1.c: New file.
      	* gcc.target/aarch64/aapcs/test_align-2.c: New file.
      	* gcc.target/aarch64/aapcs/test_align-3.c: New file.
      	* gcc.target/aarch64/aapcs/test_align-4.c: New file.
      	* gcc.target/aarch64/aapcs/test_complex.c: New file.
      	* gcc.target/aarch64/aapcs/test_int128.c: New file.
      	* gcc.target/aarch64/aapcs/test_quad_double.c: New file.
      	* gcc.target/aarch64/aapcs/type-def.h: New file.
      	* gcc.target/aarch64/aapcs/va_arg-1.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-10.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-11.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-12.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-2.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-3.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-4.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-5.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-6.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-7.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-8.c: New file.
      	* gcc.target/aarch64/aapcs/va_arg-9.c: New file.
      	* gcc.target/aarch64/aapcs/validate_memory.h: New file.
      	* gcc.target/aarch64/aarch64.exp: New file.
      	* gcc.target/aarch64/adc-1.c: New file.
      	* gcc.target/aarch64/adc-2.c: New file.
      	* gcc.target/aarch64/asm-1.c: New file.
      	* gcc.target/aarch64/clrsb.c: New file.
      	* gcc.target/aarch64/clz.c: New file.
      	* gcc.target/aarch64/ctz.c: New file.
      	* gcc.target/aarch64/csinc-1.c: New file.
      	* gcc.target/aarch64/csinv-1.c: New file.
      	* gcc.target/aarch64/csneg-1.c: New file.
      	* gcc.target/aarch64/extend.c: New file.
      	* gcc.target/aarch64/fcvt.x: New file.
      	* gcc.target/aarch64/fcvt_double_int.c: New file.
      	* gcc.target/aarch64/fcvt_double_long.c: New file.
      	* gcc.target/aarch64/fcvt_double_uint.c: New file.
      	* gcc.target/aarch64/fcvt_double_ulong.c: New file.
      	* gcc.target/aarch64/fcvt_float_int.c: New file.
      	* gcc.target/aarch64/fcvt_float_long.c: New file.
      	* gcc.target/aarch64/fcvt_float_uint.c: New file.
      	* gcc.target/aarch64/fcvt_float_ulong.c: New file.
      	* gcc.target/aarch64/ffs.c: New file.
      	* gcc.target/aarch64/fmadd.c: New file.
      	* gcc.target/aarch64/fnmadd-fastmath.c: New file.
      	* gcc.target/aarch64/frint.x: New file.
      	* gcc.target/aarch64/frint_double.c: New file.
      	* gcc.target/aarch64/frint_float.c: New file.
      	* gcc.target/aarch64/index.c: New file.
      	* gcc.target/aarch64/mneg-1.c: New file.
      	* gcc.target/aarch64/mneg-2.c: New file.
      	* gcc.target/aarch64/mneg-3.c: New file.
      	* gcc.target/aarch64/mnegl-1.c: New file.
      	* gcc.target/aarch64/mnegl-2.c: New file.
      	* gcc.target/aarch64/narrow_high-intrinsics.c: New file.
      	* gcc.target/aarch64/pic-constantpool1.c: New file.
      	* gcc.target/aarch64/pic-symrefplus.c: New file.
      	* gcc.target/aarch64/predefine_large.c: New file.
      	* gcc.target/aarch64/predefine_small.c: New file.
      	* gcc.target/aarch64/predefine_tiny.c: New file.
      	* gcc.target/aarch64/reload-valid-spoff.c: New file.
      	* gcc.target/aarch64/scalar_intrinsics.c: New file.
      	* gcc.target/aarch64/table-intrinsics.c: New file.
      	* gcc.target/aarch64/tst-1.c: New file.
      	* gcc.target/aarch64/vect-abs-compile.c: New file.
      	* gcc.target/aarch64/vect-abs.c: New file.
      	* gcc.target/aarch64/vect-abs.x: New file.
      	* gcc.target/aarch64/vect-compile.c: New file.
      	* gcc.target/aarch64/vect-faddv-compile.c: New file.
      	* gcc.target/aarch64/vect-faddv.c: New file.
      	* gcc.target/aarch64/vect-faddv.x: New file.
      	* gcc.target/aarch64/vect-fmax-fmin-compile.c: New file.
      	* gcc.target/aarch64/vect-fmax-fmin.c: New file.
      	* gcc.target/aarch64/vect-fmax-fmin.x: New file.
      	* gcc.target/aarch64/vect-fmaxv-fminv-compile.c: New file.
      	* gcc.target/aarch64/vect-fmaxv-fminv.x: New file.
      	* gcc.target/aarch64/vect-fp-compile.c: New file.
      	* gcc.target/aarch64/vect-fp.c: New file.
      	* gcc.target/aarch64/vect-fp.x: New file.
      	* gcc.target/aarch64/vect-mull-compile.c: New file.
      	* gcc.target/aarch64/vect-mull.c: New file.
      	* gcc.target/aarch64/vect-mull.x: New file.
      	* gcc.target/aarch64/vect.c: New file.
      	* gcc.target/aarch64/vect.x: New file.
      	* gcc.target/aarch64/vector_intrinsics.c: New file.
      	* gcc.target/aarch64/vfp-1.c: New file.
      	* gcc.target/aarch64/volatile-bitfields-1.c: New file.
      	* gcc.target/aarch64/volatile-bitfields-2.c: New file.
      	* gcc.target/aarch64/volatile-bitfields-3.c: New file.
      	* g++.dg/abi/aarch64_guard1.C: New file.
      
      
      Co-Authored-By: Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
      Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
      Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
      Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
      Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
      Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
      Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
      Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
      Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
      Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>
      
      From-SVN: r192725
      Ian Bolton committed
    • AArch64 [2/10] · 5c0da018
      2012-10-23  Ian Bolton  <ian.bolton@arm.com>
      	    James Greenhalgh  <james.greenhalgh@arm.com>
      	    Jim MacArthur  <jim.macarthur@arm.com>
      	    Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
      	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
      	    Nigel Stephens  <nigel.stephens@arm.com>
      	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
      	    Richard Earnshaw  <rearnsha@arm.com>
      	    Sofiane Naci  <sofiane.naci@arm.com>
      	    Stephen Thomas  <stephen,thomas@arm.com>
      	    Tejas Belagod  <tejas.belagod@arm.com>
      	    Yufeng Zhang  <yufeng.zhang@arm.com>
      
      	* doc/invoke.texi (AArch64 Options): New.
      	* doc/md.texi (Machine Constraints): Add AArch64.
      
      
      Co-Authored-By: Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
      Co-Authored-By: James Greenhalgh <james.greenhalgh@arm.com>
      Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
      Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
      Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
      Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
      Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
      Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
      Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
      Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
      Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>
      
      From-SVN: r192724
      Ian Bolton committed
    • AArch64 [3/10] · 43e9d192
      2012-10-23  Ian Bolton  <ian.bolton@arm.com>
      	    James Greenhalgh  <james.greenhalgh@arm.com>
      	    Jim MacArthur  <jim.macarthur@arm.com>
      	    Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
      	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
      	    Nigel Stephens  <nigel.stephens@arm.com>
      	    Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
      	    Richard Earnshaw  <rearnsha@arm.com>
      	    Sofiane Naci  <sofiane.naci@arm.com>
      	    Stephen Thomas  <stephen.thomas@arm.com>
      	    Tejas Belagod  <tejas.belagod@arm.com>
      	    Yufeng Zhang  <yufeng.zhang@arm.com>
      
      	* common/config/aarch64/aarch64-common.c: New file.
      	* config/aarch64/aarch64-arches.def: New file.
      	* config/aarch64/aarch64-builtins.c: New file.
      	* config/aarch64/aarch64-cores.def: New file.
      	* config/aarch64/aarch64-elf-raw.h: New file.
      	* config/aarch64/aarch64-elf.h: New file.
      	* config/aarch64/aarch64-generic.md: New file.
      	* config/aarch64/aarch64-linux.h: New file.
      	* config/aarch64/aarch64-modes.def: New file.
      	* config/aarch64/aarch64-option-extensions.def: New file.
      	* config/aarch64/aarch64-opts.h: New file.
      	* config/aarch64/aarch64-protos.h: New file.
      	* config/aarch64/aarch64-simd.md: New file.
      	* config/aarch64/aarch64-tune.md: New file.
      	* config/aarch64/aarch64.c: New file.
      	* config/aarch64/aarch64.h: New file.
      	* config/aarch64/aarch64.md: New file.
      	* config/aarch64/aarch64.opt: New file.
      	* config/aarch64/arm_neon.h: New file.
      	* config/aarch64/constraints.md: New file.
      	* config/aarch64/gentune.sh: New file.
      	* config/aarch64/iterators.md: New file.
      	* config/aarch64/large.md: New file.
      	* config/aarch64/predicates.md: New file.
      	* config/aarch64/small.md: New file.
      	* config/aarch64/sync.md: New file.
      	* config/aarch64/t-aarch64-linux: New file.
      	* config/aarch64/t-aarch64: New file.
      
      
      Co-Authored-By: Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com>
      Co-Authored-By: James Greenhalgh <james.greenhalgh@arm.com>
      Co-Authored-By: Jim MacArthur <jim.macarthur@arm.com>
      Co-Authored-By: Marcus Shawcroft <marcus.shawcroft@arm.com>
      Co-Authored-By: Nigel Stephens <nigel.stephens@arm.com>
      Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
      Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
      Co-Authored-By: Sofiane Naci <sofiane.naci@arm.com>
      Co-Authored-By: Stephen Thomas <stephen.thomas@arm.com>
      Co-Authored-By: Tejas Belagod <tejas.belagod@arm.com>
      Co-Authored-By: Yufeng Zhang <yufeng.zhang@arm.com>
      
      From-SVN: r192723
      Ian Bolton committed
    • re PR c++/54988 (fpmath=sse target pragma causes inlining failure because of… · 0065c7eb
      re PR c++/54988 (fpmath=sse target pragma causes inlining failure because of target specific option mismatch)
      
      	PR c++/54988
      	* decl2.c (cplus_decl_attributes): Don't return early
      	if attributes is NULL.
      
      	* c-c++-common/pr54988.c: New test.
      
      From-SVN: r192722
      Jakub Jelinek committed
    • tree-ssa-operands.h (struct def_optype_d, [...]): Remove. · 4b671e64
      	* tree-ssa-operands.h (struct def_optype_d, def_optype_p): Remove.
      	(ssa_operands.free_defs): Remove.
      	(DEF_OP_PTR, DEF_OP): Remove.
      	(struct ssa_operand_iterator_d): Remove 'defs', add 'flags'
      	members, rename 'phi_stmt' to 'stmt', 'phi_i' to 'i' and 'num_phi'
      	to 'numops'.
      	* gimple.h (gimple_statement_with_ops.def_ops): Remove.
      	(gimple_def_ops, gimple_set_def_ops): Remove.
      	(gimple_vdef_op): Don't take const gimple, adjust.
      	(gimple_asm_input_op, gimple_asm_input_op_ptr,
      	gimple_asm_set_input_op, gimple_asm_output_op,
      	gimple_asm_output_op_ptr, gimple_asm_set_output_op): Adjust asserts,
      	and rewrite to move def operands to front.
      	(gimple_asm_clobber_op, gimple_asm_set_clobber_op,
      	gimple_asm_label_op, gimple_asm_set_label_op): Correct asserts.
      	* tree-ssa-operands.c (build_defs): Remove.
      	(init_ssa_operands): Don't initialize it.
      	(fini_ssa_operands): Don't free it.
      	(cleanup_build_arrays): Don't truncate it.
      	(finalize_ssa_stmt_operands): Don't assert on it.
      	(alloc_def, add_def_op, append_def): Remove.
      	(finalize_ssa_defs): Remove building of def_ops list.
      	(finalize_ssa_uses): Don't mark for SSA renaming here, ...
      	(add_stmt_operand): ... but here, don't call append_def.
      	(get_indirect_ref_operands): Remove recurse_on_base argument.
      	(get_expr_operands): Adjust call to get_indirect_ref_operands.
      	(verify_ssa_operands): Don't check def operands.
      	(free_stmt_operands): Don't free def operands.
      	* gimple.c (gimple_copy): Don't clear def operands.
      	* tree-flow-inline.h (op_iter_next_use): Adjust to explicitely
      	handle def operand.
      	(op_iter_next_tree, op_iter_next_def): Ditto.
      	(clear_and_done_ssa_iter): Clear new fields.
      	(op_iter_init): Adjust to setup new iterator structure.
      	(op_iter_init_phiuse): Adjust.
      
      From-SVN: r192721
      Michael Matz committed