gcc/ChangeLog:

	PR tree-optimization/80397
	* gimple-ssa-sprintf.c (format_integer): Use INTEGRAL_TYPE_P()
	instead of testing for equality to INTEGER_TYPE.

gcc/testsuite/ChangeLog:

	PR tree-optimization/80397
	* gcc.dg/tree-ssa/builtin-sprintf-warn-17.c: New test.

From-SVN: r250106

gcc/cp/ChangeLog:

	* cp-tree.h (cp_operator_id, cp_assignment_operator_id): Document.

From-SVN: r250105

gcc/c-family/ChangeLog:

	PR other/81345
	* c.opt (-Wstringop-overflow): Set defaults in LangEnabledBy.

gcc/testsuite/ChangeLog:

	PR other/81345
	* gcc.dg/pr81345.c: New test.

From-SVN: r250104

	* testsuite/abi/pr42230.cc: Add header for std::free.

From-SVN: r250102

	PR libstdc++/81381
	* include/bits/sstream.tcc (basic_stringbuf::overflow)
	(basic_stringbuf::basic_stringbuf(const __string_type&, ios::mode))
	(basic_stringbuf::str()): Construct new strings with an allocator.
	* testsuite/27_io/basic_stringbuf/cons/81381.cc: New.

From-SVN: r250101

	PR libstdc++/81338
	* include/bits/basic_string.h [_GLIBCXX_USE_CXX11_ABI] (basic_string):
	Declare basic_stringbuf to be a friend.
	* include/bits/sstream.tcc (basic_stringbuf::overflow)
	[_GLIBCXX_USE_CXX11_ABI]: Use unused capacity before reallocating.
	* include/std/sstream (basic_stringbuf::__xfer_bufptrs): Update string
	length to buffer length.
	* testsuite/27_io/basic_stringstream/assign/81338.cc: New.

From-SVN: r250100

gcc/
2017-07-10  Vineet Gupta <vgupta@synopsys.com>

        * config.gcc: Remove uclibc from arc target spec.

libgcc/
2017-07-10  Vineet Gupta <vgupta@synopsys.com>

        * config.host: Remove uclibc from arc target spec.

From-SVN: r250097

LRA doesn't like the 'X' constraint as used in our tests, remove it.

gcc/testsuite
2017-07-10  Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/mulsi3_highpart-1.c: Remove 'X' constraint.
	* gcc.target/arc/mulsi3_highpart-2.c: Likewise.

From-SVN: r250096

This macro is needed to be used with -ffixed-<reg> option, and inline asm.

gcc/
2017-07-10  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.h (ADDITIONAL_REGISTER_NAMES): Define.

From-SVN: r250095

	PR lto/80838
	* lto-wrapper.c (remove_option): New function.
	(merge_and_complain): Merge PIC/PIE options more realistically.

From-SVN: r250094

gcc/
	Better ISR prologues by supporting GASes __gcc_isr pseudo insn.
	PR target/20296
	PR target/81268
	* configure.ac [target=avr]: Add GAS check for -mgcc-isr.
	(HAVE_AS_AVR_MGCCISR_OPTION):  If so, AC_DEFINE it.
	* config.in: Regenerate.
	* configure: Regenerate.
	* doc/extend.texi (AVR Function Attributes) <no_gccisr>: Document it.
	* doc/invoke.texi (AVR Options) <-mgas-isr-prologues>: Document it.
	* config/avr/avr.opt (-mgas-isr-prologues): New option and...
	(TARGET_GASISR_PROLOGUES): ...target mask.
	* common/config/avr/avr-common.c
	(avr_option_optimization_table) [OPT_LEVELS_1_PLUS_NOT_DEBUG]:
	Set -mgas-isr-prologues.
	* config/avr/avr-passes.def (avr_pass_pre_proep): Add
	INSERT_PASS_BEFORE for it.
	* config/avr/avr-protos.h (make_avr_pass_pre_proep): New proto.
	* config/avr/avr.c (avr_option_override)
	[!HAVE_AS_AVR_MGCCISR_OPTION]: Unset TARGET_GASISR_PROLOGUES.
	(avr_no_gccisr_function_p, avr_hregs_split_reg): New static functions.
	(avr_attribute_table) <no_gccisr>: Add new function attribute.
	(avr_set_current_function) <is_no_gccisr>: Init machine field.
	(avr_pass_data_pre_proep, avr_pass_pre_proep): New pass data
	and rtl_opt_pass.
	(make_avr_pass_pre_proep): New function.
	(emit_push_sfr) <treg>: Add argument to function and use it
	instead of TMP_REG.
	(avr_expand_prologue) [machine->gasisr.maybe]: Emit gasisr insn
	and set machine->gasisr.yes.
	(avr_expand_epilogue) [machine->gasisr.yes]: Similar.
	(avr_asm_function_end_prologue) [machine->gasisr.yes]: Add
	__gcc_isr.n_pushed to .L__stack_usage.
	(TARGET_ASM_FINAL_POSTSCAN_INSN): Define to...
	(avr_asm_final_postscan_insn): ...this new static function.
	* config/avr/avr.h (machine_function)
	<is_no_gccisr, use_L__stack_usage>: New fields.
	<gasisr, gasisr.yes, gasisr.maybe, gasisr.regno>: New fields.
	* config/avr/avr.md (UNSPECV_GASISR): Add unspecv enum.
	(GASISR_Prologue, GASISR_Epilogue, GASISR_Done): New define_constants.
	(gasisr, *gasisr): New expander and insn.
	* config/avr/gen-avr-mmcu-specs.c (print_mcu)
	[HAVE_AS_AVR_MGCCISR_OPTION]: Print asm_gccisr spec.
	* config/avr/specs.h (ASM_SPEC) <asm_gccisr>: Add sub spec.

From-SVN: r250093

    
In awk, single quotes within a quoted string do not need escaping.
The existing code causes awk to grumble in the build logs.
    
	* config/arm/parsecpu.awk (gen_comm_data): Do not escape single quotes
	in quoted strings.

(really commit it this time)...

From-SVN: r250092

gcc/
	Move jump-tables out of .text again.
	PR target/81075
	* config/avr/avr.c (ASM_OUTPUT_ADDR_VEC_ELT): Remove function.
	(ASM_OUTPUT_ADDR_VEC): New function.
	(avr_adjust_insn_length) [JUMP_TABLE_DATA_P]: Return 0.
	(avr_final_prescan_insn) [avr_log.insn_addresses]: Dump
	INSN_ADDRESSes as asm comment.
	* config/avr/avr.h (JUMP_TABLES_IN_TEXT_SECTION): Adjust comment.
	(ASM_OUTPUT_ADDR_VEC_ELT): Remove define.
	(ASM_OUTPUT_ADDR_VEC): Define to avr_output_addr_vec.
	* config/avr/avr.md (*tablejump): Adjust comment.
	* config/avr/elf.h (ASM_OUTPUT_BEFORE_CASE_LABEL): Remove.
	* config/avr/avr-log.c (avr_log_set_avr_log) <insn_addresses>:
	New detail.
	* config/avr/avr-protos.h (avr_output_addr_vec_elt): Remove proto.
	(avr_output_addr_vec): New proto.
	(avr_log_t) <insn_addresses>: New field.

From-SVN: r250091

From-SVN: r250090

	PR target/81313
	* gcc.dg/stack-layout-dynamic-1.c (bar): Add 4 additional
	integer argumets to bypass x86_64 outgoing args optimization.

From-SVN: r250086

2017-06-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

	* intrinsics/eoshift2.c (eoshift2):  Use memcpy
	for innermost copy where possible.
	* m4/eoshift1.m4 (eoshift1): Likewise.
	* m4/eoshift3.m4 (eoshift3): Likewise.
	* generated/eoshift1_16.c: Regenerated.
	* generated/eoshift1_4.c: Regenerated.
	* generated/eoshift1_8.c: Regenerated.
	* generated/eoshift3_16.c: Regenerated.
	* generated/eoshift3_4.c: Regenerated.
	* generated/eoshift3_8.c: Regenerated.

2017-06-09  Thomas Koenig  <tkoenig@gcc.gnu.org>

	* gfortran.dg/eoshift_4.f90:  New test.
	* gfortran.dg/eoshift_5.f90:  New test.
	* gfortran.dg/eoshift_6.f90:  New test.

From-SVN: r250085

Since DRAP is needed only if there are outgoing arguments on stack, we
should track outgoing arguments on stack and avoid setting need_drap to
true when there are no outgoing arguments on stack.

gcc/

	PR target/81313
	* config/i386/i386.c (ix86_function_arg_advance): Set
	outgoing_args_on_stack to true if there are outgoing arguments
	on stack.
	(ix86_function_arg): Likewise.
	(ix86_get_drap_rtx): Use DRAP only if there are outgoing
	arguments on stack and ACCUMULATE_OUTGOING_ARGS is false.
	* config/i386/i386.h (machine_function): Add
	outgoing_args_on_stack.

gcc/testsuite/

	PR target/81313
	* gcc.target/i386/pr81313-1.c: New test.
	* gcc.target/i386/pr81313-2.c: Likewise.
	* gcc.target/i386/pr81313-3.c: Likewise.
	* gcc.target/i386/pr81313-4.c: Likewise.
	* gcc.target/i386/pr81313-5.c: Likewise.

From-SVN: r250084

2017-07-09  Dominique d'Humieres  <dominiq@lps.ens.fr>

	PR fortran/81341
	* class.c (class_array_ref_detected): Remove a redundant
	condition.

From-SVN: r250083

2017-07-09  Krister Walfridsson  <krister.walfridsson@gmail.com>

	* config.gcc (*-*-netbsd*): Remove check for NetBSD versions not
	supporting pthreds.
	* config/netbsd.h (NETBSD_LIBGCC_SPEC): Always enable pthreads.

From-SVN: r250081

2017-07-09  Krister Walfridsson  <krister.walfridsson@gmail.com>

	* config.host (*-*-netbsd*): Remove check for aout NetBSD releases.

From-SVN: r250080

From-SVN: r250079

The bug fix here is to build/min-insn-modes.o, the rest are related
clean-ups.

2017-07-08  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* Makefile.in (HOOKS_H, RTL_BASE_H, FUNCTION_H, EXPR_H, REGS_H)
	(REAL_H): Remove $(MACHMODE_H).
	(FIXED_VALUE_H, TREE_CORE_H, CFGLOOP_H): Remove $(MACHMODE_H) and
	double-int.h.
	(CORETYPES_H): Add signop.h, wide-int.h, wide-int-print.h,
	$(MACHMODE_H) and double-int.h.
	(build/min-insn-modes.o): Depend on $(CORETYPES_H) rather than
	$(MACHMODE_H).
	(gengtype-state.o, gengtype.o, build/gengtype.o): Don't depend on
	double-int.h.

From-SVN: r250075

2017-07-08  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/testsuite/
	* gnat.dg/vect15.ads (Sarray): Increase range to 1 .. 5.
	* gnat.dg/vect16.ads (Sarray): Likewise.
	* gnat.dg/vect17.ads (Sarray): Likewise.
	* gnat.dg/vect15.adb (Add): Create a dependence distance of 1.
	* gnat.dg/vect16.adb (Add): Likewise.
	* gnat.dg/vect17.adb (Add): Likewise.

From-SVN: r250074

From-SVN: r250072

2017-07-07  Andrew Pinski  <apinski@cavium.com>

        * config/aarch64/aarch64.c (aarch_macro_fusion_pair_p): Check
        prev_set and curr_set for AARCH64_FUSE_ALU_BRANCH.

From-SVN: r250068

	libgcc/
	* config/rs6000/float128-ifunc.c: Don't include auxv.h.
	(have_ieee_hw_p): Delete function.
	(SW_OR_HW) Use __builtin_cpu_supports().

From-SVN: r250061

gcc/testsuite/ChangeLog:
	PR c++/79300
	* g++.dg/diagnostic/pr79300.C: New test case.

libcpp/ChangeLog:
	PR c++/79300
	* line-map.c (linemap_macro_loc_to_def_point): Preserve range
	information for macro expansions by delaying resolving ad-hoc
	locations until within the loop.

From-SVN: r250058

rs6000.c (rs6000_get_function_versions_dispatcher): Add warning if GCC was not configured to link against a GLIBC that exports the...

[gcc]
2017-07-07  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_get_function_versions_dispatcher):
	Add warning if GCC was not configured to link against a GLIBC that
	exports the hardware capability bits.
	(make_resolver_func): Make resolver function private and not a
	COMDAT function.  Create the name with clone_function_name instead
	of make_unique_name.

[gcc/testsuite]
2017-07-07  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/clone1.c: Add check to make sure the
	__builtin_cpu_supports function is fully supported.
	* gcc.target/powerpc/clone2.c: New runtime test for
	target_clones.

From-SVN: r250055

[gcc]
2017-07-07  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81348
	* config/rs6000/rs6000.md (HI sign_extend splitter): Use the
	correct operand in doing the split.

[gcc/testsuite]
2017-07-07  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81348
	* gcc.target/powerpc/pr81348.c: New test.

From-SVN: r250054

Only run the test if the target supports double precision vectorization.

gcc/testsuite/ChangeLog:

2017-07-07  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* gfortran.dg/vect/pr60510.f: Require vect_double support.

From-SVN: r250053

gcc/testsuite/ChangeLog:

2017-07-07  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/builtins-1-p9-runnable.c: Forgot to add new
	file before doing commit 250051.

From-SVN: r250052

gcc/ChangeLog:

2017-07-07 Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000-c: Add support for built-in function
	vector unsigned short vec_pack_to_short_fp32 (vector float,
						      vector float).
	* config/rs6000/rs6000-builtin.def (CONVERT_4F32_8I16): Add
	BU_P9V_AV_2 and BU_P9V_OVERLOAD_2 definitions.
	* config/rs6000/altivec.h (vec_pack_to_short_fp32): Add define.
	* config/rs6000/altivec.md(UNSPEC_CONVERT_4F32_8I16): Add UNSPEC.
	(convert_4f32_8i16): Add define_expand.
	* doc/extend.texi: Update the built-in documentation file for the
	new built-in function.

gcc/testsuite/ChangeLog:

2017-07-07  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/builtins-1-p9-runnable.c: Add new test
	file for built-ins.

From-SVN: r250051

This patch serie adds support for the SPARC M8 processor to GCC.
The SPARC M8 processor implements the Oracle SPARC Architecture 2017.

- bmask* instructions are put in their own instruction type.  It makes
  little sense to have them in the same category than array
  instructions.

- Similarly, VIS compare instructions are put in their own instruction
  type.  This is to better accommodate subtypes, which are not quite
  the same than the subtypes of `visl' instructions.

- The introduction of a new `subtype' insn attribute in sparc.md
  avoids the need for adjusting the instruction scheduler DFAs for
  previous cpu models every time a new cpu is introduced.

- The full set of SPARC instructions used in sparc.md, and their
  position in the type/subtype hierarchy, is documented in a comment.
  This eases the modification of the DFA schedulers, and the addition
  of new cpus.

- The M7 DFA scheduler is reworked:

  + To use the new type/subtype hierarchy.
  + The v3pipe insn attribute is no longer needed.
  + More accurate latencies for instructions.
  + The C4 core pipeline is documented in a comment in niagara7.md.

- Support for -mcpu=m8 (we are thus suggesting to abandon the niagaraN
  denomination for M8 and later processors.)

- Support for a new VIS level, VIS4B, covering the new VIS
  instructions introduced in OSA2017 and implemented in the M8.  Also
  built-ins.

- A M8 DFA scheduler:

  + Also based on the new type/subtype hierarchy.
  + The functional units in the C5 core are explicitly documented in a
    comment in m8.md.

gcc/ChangeLog:

	* config/sparc/m8.md: New file.
	* config/sparc/sparc.md: Include m8.md.

	* config/sparc/sparc.opt: New option -mvis4b.
	* config/sparc/sparc.c (dump_target_flag_bits): Handle MASK_VIS4B.
	(sparc_option_override): Handle VIS4B.
	(enum sparc_builtins): Define
	SPARC_BUILTIN_DICTUNPACK{8,16,32},
	SPARC_BUILTIN_FPCMP{LE,GT,EQ,NE}{8,16,32}SHL,
	SPARC_BUILTIN_FPCMPU{LE,GT}{8,16,32}SHL,
	SPARC_BUILTIN_FPCMPDE{8,16,32}SHL and
	SPARC_BUILTIN_FPCMPUR{8,16,32}SHL.
	(check_constant_argument): New function.
	(sparc_vis_init_builtins): Define builtins
	__builtin_vis_dictunpack{8,16,32},
	__builtin_vis_fpcmp{le,gt,eq,ne}{8,16,32}shl,
	__builtin_vis_fpcmpu{le,gt}{8,16,32}shl,
	__builtin_vis_fpcmpde{8,16,32}shl and
	__builtin_vis_fpcmpur{8,16,32}shl.
	(sparc_expand_builtin): Check that the constant operands to
	__builtin_vis_fpcmp*shl and _builtin_vis_dictunpack* are indeed
	constant and in range.
	* config/sparc/sparc-c.c (sparc_target_macros): Handle
	TARGET_VIS4B.
	* config/sparc/sparc.h (SPARC_IMM2_P): Define.
	(SPARC_IMM5_P): Likewise.
	* config/sparc/sparc.md (cpu_feature): Add new feagure "vis4b".
	(enabled): Handle vis4b.
	(UNSPEC_DICTUNPACK): New unspec.
	(UNSPEC_FPCMPSHL): Likewise.
	(UNSPEC_FPUCMPSHL): Likewise.
	(UNSPEC_FPCMPDESHL): Likewise.
	(UNSPEC_FPCMPURSHL): Likewise.
	(cpu_feature): New CPU feature `vis4b'.
	(dictunpack{8,16,32}): New insns.
	(FPCSMODE): New mode iterator.
	(fpcscond): New code iterator.
	(fpcsucond): Likewise.
	(fpcmp{le,gt,eq,ne}{8,16,32}{si,di}shl): New insns.
	(fpcmpu{le,gt}{8,16,32}{si,di}shl): Likewise.
	(fpcmpde{8,16,32}{si,di}shl): Likewise.
	(fpcmpur{8,16,32}{si,di}shl): Likewise.
	* config/sparc/constraints.md: Define constraints `q' for unsigned
	2-bit integer constants and `t' for unsigned 5-bit integer
	constants.
	* config/sparc/predicates.md (imm5_operand_dictunpack8): New
	predicate.
	(imm5_operand_dictunpack16): Likewise.
	(imm5_operand_dictunpack32): Likewise.
	(imm2_operand): Likewise.
	* doc/invoke.texi (SPARC Options): Document -mvis4b.
	* doc/extend.texi (SPARC VIS Built-in Functions): Document the
	ditunpack* and fpcmp*shl builtins.

	* config.gcc: Handle m8 in --with-{cpu,tune} options.
	* config.in: Add HAVE_AS_SPARC6 define.
	* config/sparc/driver-sparc.c (cpu_names): Add entry for the SPARC
	M8.
	* config/sparc/sol2.h (CPP_CPU64_DEFAULT_SPEC): Define for
	TARGET_CPU_m8.
	(ASM_CPU32_DEFAUILT_SPEC): Likewise.
	(CPP_CPU_SPEC): Handle m8.
	(ASM_CPU_SPEC): Likewise.
	* config/sparc/sparc-opts.h (enum processor_type): Add
	PROCESSOR_M8.
	* config/sparc/sparc.c (m8_costs): New struct.
	(sparc_option_override): Handle TARGET_CPU_m8.
	(sparc32_initialize_trampoline): Likewise.
	(sparc64_initialize_trampoline): Likewise.
	(sparc_issue_rate): Likewise.
	(sparc_register_move_cost): Likewise.
	* config/sparc/sparc.h (TARGET_CPU_m8): Define.
	(CPP_CPU64_DEFAULT_SPEC): Define for M8.
	(ASM_CPU64_DEFAULT_SPEC): Likewise.
	(CPP_CPU_SPEC): Handle M8.
	(ASM_CPU_SPEC): Likewise.
	(AS_M8_FLAG): Define.
	* config/sparc/sparc.md: Add m8 to the cpu attribute.
	* config/sparc/sparc.opt: New option -mcpu=m8 for sparc targets.
	* configure.ac (HAVE_AS_SPARC6): Check for assembler support for
	M8 instructions.
	* configure: Regenerate.
	* doc/invoke.texi (SPARC Options): Document -mcpu=m8 and
	-mtune=m8.

	* config/sparc/niagara7.md: Rework the DFA scheduler to use insn
	subtypes.
	* config/sparc/sparc.md: Remove the `v3pipe' insn attribute.
	("*movdi_insn_sp32"): Do not set v3pipe.
	("*movsi_insn"): Likewise.
	("*movdi_insn_sp64"): Likewise.
	("*movsf_insn"): Likewise.
	("*movdf_insn_sp32"): Likewise.
	("*movdf_insn_sp64"): Likewise.
	("*zero_extendsidi2_insn_sp64"): Likewise.
	("*sign_extendsidi2_insn"): Likewise.
	("*mov<VM32:mode>_insn"): Likewise.
	("*mov<VM64:mode>_insn_sp64"): Likewise.
	("*mov<VM64:mode>_insn_sp32"): Likewise.
	("<plusminus_insn><VADDSUB:mode>3"): Likewise.
	("<vlop:code><VL:mode>3"): Likewise.
	("*not_<vlop:code><VL:mode>3"): Likewise.
	("*nand<VL:mode>_vis"): Likewise.
	("*<vlnotop:code>_not1<VL:mode>_vis"): Likewise.
	("*<vlnotop:code>_not2<VL:mode>_vis"): Likewise.
	("one_cmpl<VL:mode>2"): Likewise.
	("faligndata<VM64:mode>_vis"): Likewise.
	("alignaddrsi_vis"): Likewise.
	("alignaddrdi_vis"): Likweise.
	("alignaddrlsi_vis"): Likewise.
	("alignaddrldi_vis"): Likewise.
	("fcmp<gcond:code><GCM:gcm_name><P:mode>_vis"): Likewise.
	("bmaskdi_vis"): Likewise.
	("bmasksi_vis"): Likewise.
	("bshuffle<VM64:mode>_vis"): Likewise.
	("cmask8<P:mode>_vis"): Likewise.
	("cmask16<P:mode>_vis"): Likewise.
	("cmask32<P:mode>_vis"): Likewise.
	("pdistn<P:mode>_vis"): Likewise.
	("<vis3_addsub_ss_patname><VASS:mode>3"): Likewise.

	* config/sparc/sparc.md ("subtype"): New insn attribute.
	("*wrgsr_sp64"): Set insn subtype.
	("*rdgsr_sp64"): Likewise.
	("alignaddrsi_vis"): Likewise.
	("alignaddrdi_vis"): Likewise.
	("alignaddrlsi_vis"): Likewise.
	("alignaddrldi_vis"): Likewise.
	("<plusminus_insn><VADDSUB:mode>3"): Likewise.
	("fexpand_vis"): Likewise.
	("fpmerge_vis"): Likewise.
	("faligndata<VM64:mode>_vis"): Likewise.
	("bshuffle<VM64:mode>_vis"): Likewise.
	("cmask8<P:mode>_vis"): Likewise.
	("cmask16<P:mode>_vis"): Likewise.
	("cmask32<P:mode>_vis"): Likewise.
	("fchksm16_vis"): Likewise.
	("v<vis3_shift_patname><GCM:mode>3"): Likewise.
	("fmean16_vis"): Likewise.
	("fp<plusminus_insn>64_vis"): Likewise.
	("<plusminus_insn>v8qi3"): Likewise.
	("<vis3_addsub_ss_patname><VASS:mode>3"): Likewise.
	("<vis4_minmax_patname><VMMAX:mode>3"): Likewise.
	("<vis4_uminmax_patname><VMMAX:mode>3"): Likewise.
	("<vis3_addsub_ss_patname>v8qi3"): Likewise.
	("<vis4_addsub_us_patname><VAUS:mode>3"): Likewise.
	("*movqi_insn"): Likewise.
	("*movhi_insn"): Likewise.
	("*movsi_insn"): Likewise.
	("movsi_pic_gotdata_op"): Likewise.
	("*movdi_insn_sp32"): Likewise.
	("*movdi_insn_sp64"): Likewise.
	("movdi_pic_gotdata_op"): Likewise.
	("*movsf_insn"): Likewise.
	("*movdf_insn_sp32"): Likewise.
	("*movdf_insn_sp64"): Likewise.
	("*zero_extendhisi2_insn"): Likewise.
	("*zero_extendqihi2_insn"): Likewise.
	("*zero_extendqisi2_insn"): Likewise.
	("*zero_extendqidi2_insn"): Likewise.
	("*zero_extendhidi2_insn"): Likewise.
	("*zero_extendsidi2_insn_sp64"): Likewise.
	("ldfsr"): Likewise.
	("prefetch_64"): Likewise.
	("prefetch_32"): Likewise.
	("tie_ld32"): Likewise.
	("tie_ld64"): Likewise.
	("*tldo_ldub_sp32"): Likewise.
	("*tldo_ldub1_sp32"): Likewise.
	("*tldo_ldub2_sp32"): Likewise.
	("*tldo_ldub_sp64"): Likewise.
	("*tldo_ldub1_sp64"): Likewise.
	("*tldo_ldub2_sp64"): Likewise.
	("*tldo_ldub3_sp64"): Likewise.
	("*tldo_lduh_sp32"): Likewise.
	("*tldo_lduh1_sp32"): Likewise.
	("*tldo_lduh_sp64"): Likewise.
	("*tldo_lduh1_sp64"): Likewise.
	("*tldo_lduh2_sp64"): Likewise.
	("*tldo_lduw_sp32"): Likewise.
	("*tldo_lduw_sp64"): Likewise.
	("*tldo_lduw1_sp64"): Likewise.
	("*tldo_ldx_sp64"): Likewise.
	("*mov<VM32:mode>_insn"): Likewise.
	("*mov<VM64:mode>_insn_sp64"): Likewise.
	("*mov<VM64:mode>_insn_sp32"): Likewise.

	* config/sparc/sparc.md ("type"): New insn type viscmp.
	("fcmp<gcond:code><GCM:gcm_name><P:mode>_vis"): Set insn type to
	viscmp.
	("fpcmp<gcond:code>8<P:mode>_vis"): Likewise.
	("fucmp<gcond:code>8<P:mode>_vis"): Likewise.
	("fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis"): Likewise.
	* config/sparc/niagara7.md ("n7_vis_logical_v3pipe"): Handle
	viscmp.
	("n7_vis_logical_11cycle"): Likewise.
	* config/sparc/niagara4.md ("n4_vis_logical"): Likewise.
	* config/sparc/niagara2.md ("niag3_vis": Likewise.
	* config/sparc/niagara.md ("niag_vis"): Likewise.
	* config/sparc/ultra3.md ("us3_fga"): Likewise.
	* config/sparc/ultra1_2.md ("us1_fga_double"): Likewise.

	* config/sparc/sparc.md: New instruction type `bmask'.
	(bmaskdi_vis): Use the `bmask' type.
	(bmasksi_vis): Likewise.
	* config/sparc/ultra3.md (us3_array): Likewise.
	* config/sparc/niagara7.md (n7_array): Likewise.
	* config/sparc/niagara4.md (n4_array): Likewise.
	* config/sparc/niagara2.md (niag2_vis): Likewise.
	(niag3_vis): Likewise.
	* config/sparc/niagara.md (niag_vis): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/sparc/dictunpack.c: New file.
	* gcc.target/sparc/fpcmpdeshl.c: Likewise.
	* gcc.target/sparc/fpcmpshl.c: Likewise.
	* gcc.target/sparc/fpcmpurshl.c: Likewise.
	* gcc.target/sparc/fpcmpushl.c: Likewise.

From-SVN: r250049

	* ipa-comdats.c: Remove optimize check from gate.
	* ipa-fnsummary.c (ipa_fn_summary_generate): do not generate summary
	for functions not optimized.
	(ipa_fn_summary_read): Skip optimize check.
	(ipa_fn_summary_write): Likewise.
	* ipa-inline-analysis.c (do_estimate_growth_1): Check that caller
	is optimized.
	* ipa-inline.c (can_inline_edge_p): Not optimized functions are
	uninlinable.
	(can_inline_edge_p): Check flag_pcc_struct_return for match.
	(check_callers): Give up on caller which is not optimized.
	(inline_small_functions): Likewise.
	(ipa_inline): Do not give up when not optimizing.
	* ipa-visbility.c (function_and_variable_visibility): Do not optimize
	away unoptimizes cdtors.
	(whole_program_function_and_variable_visibility): Do
	ipa_discover_readonly_nonaddressable_vars in LTO mode.
	* ipa.c (process_references): Do not check optimize.
	(symbol_table::remove_unreachable_nodes): Update optimize check.
	(set_writeonly_bit): Update optimize check.
	(pass_ipa_cdtor_merge::gate): Do not check optimize.
	(pass_ipa_single_use::gate): Remove.

From-SVN: r250048

From-SVN: r250047

rs6000.c (union_defs, [...]): Move all code related to p8 swap optimizations to file rs6000-p8swap.c.

2017-07-06  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>

	* config/rs6000/rs6000.c (union_defs, union_uses, insn_is_load_p,
	insn_is_store_p, insn_is_swap_p, const_load_sequence_p, v2df_reduction_p,
	rtx_is_swappable_p, insn_is_swappable_p, chain_contains_only_swaps,
	mark_swaps_for_removal, swap_const_vector_halves, adjust_subreg_index,
	permute_load, permute_store, adjust_extract, adjust_splat,
	adjust_xxpermdi, adjust_concat, adjust_vperm, handle_special_swappables,
	replace_swap_with_copy, dump_swap_insn_table,
	alignment_with_canonical_addr, alignment_mask, find_alignment_op,
	recombine_lvx_pattern, recombine_stvx_pattern,
	recombine_lvx_stvx_patterns, rs6000_analyze_swaps,
	make_pass_analyze_swaps): Move all code related to p8 swap optimizations
	to file rs6000-p8swap.c.
	* config/rs6000/rs6000-p8swap.c: New file.
	* config/rs6000/t-rs6000: Add rule to build rs6000-p8swap.o.
	* config.gcc: Add rs6000-p8swap.o to extra_objs for powerpc*-*-*
	and rs6000*-*-* targets.

From-SVN: r250040

2017-07-06  Harald Anlauf  <anlauf@gmx.de>

	PR fortran/70071
	* array.c (gfc_ref_dimen_size): Handle bad subscript triplets.


2017-07-06  Harald Anlauf  <anlauf@gmx.de>

	PR fortran/70071
	* gfortran.dg/coarray_44.f90: New testcase.

From-SVN: r250039

	PR c++/81204 - parse error with dependent template-name
	* parser.c (cp_parser_lookup_name): Revert previous change.

From-SVN: r250037

gcc/ChangeLog
	* Makefile.in (selftest): Remove dependency on s-selftest-c++.

From-SVN: r250036

	* lto-wrapper.c (merge_and_complain): Do not merge
	fexceptions, fnon_call_exceptions, ftrapv, ffp_contract_, fmath_errno,
	fsigned_zeros, ftrapping_math, fwrapv.
	(append_compiler_options): Do not track these options.
	(append_linker_options): Likewie

From-SVN: r250035