A pasto in this test meant that we needed extra reverse instructions
for big-endian targets.

2020-01-22  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
	* gcc.target/aarch64/sve/sel_3.c (permute_vnx4sf): Take __SVFloat32_t
	rather than __SVFloat16_t

In r279588 I'd for some reason only patched g++.dg/ext/sve-sizeless-2.C,
even though g++.dg/ext/sve-sizeless-1.C has the same problem.

2020-01-22  Richard Sandiford  <richard.sandiford@arm.com>

gcc/testsuite/
	* g++.dg/ext/sve-sizeless-1.C: Don't expect an error for alias
	templates.

We were incorrectly assuming a merge operation is conservative enough
for not explicitely handled operations but we also need to consider
offsetting within fields when field-sensitive analysis applies.

2020-01-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/93381
	* tree-ssa-structalias.c (find_func_aliases): Assume offsetting
	throughout, handle all conversions the same.

	* gcc.dg/torture/pr93381.c: New testcase.

The two patterns that call aarch64_expand_subvti ensure that {low,high}_in1
is a register, while {low,high}_in2 can be a register or immediate.
subdi3_compare1_imm uses the aarch64_plus_immediate predicate for its last
two operands (the value and negated value), but aarch64_expand_subvti calls
it whenever low_in2 is a CONST_INT, which leads to ICEs during vregs pass,
as the emitted insn is not recognized as valid subdi3_compare1_imm.
The following patch fixes that by only using subdi3_compare1_imm if it is ok
to do so, and otherwise force the constant into register and use the
non-immediate version - subdi3_compare1.
Furthermore, previously the code was calling force_reg on high_in2 only if
low_in2 is CONST_INT, on the (reasonable) assumption is that only if low_in2
is a CONST_INT, high_in2 can be non-REG, but with the above changes even in
the else we might have CONST_INT and force_reg doesn't do anything if the
operand is already a REG, so this patch calls it unconditionally.

2020-01-22  Jakub Jelinek  <jakub@redhat.com>

	PR target/93335
	* config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
	gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
	predicate, not whenever it is CONST_INT.  Otherwise, force_reg it.
	Call force_reg on high_in2 unconditionally.

	* gcc.c-torture/compile/pr93335.c: New test.

	PR tree-optimization/92924
	* profile.c (compute_value_histograms): Divide
	all counter values.
	PR tree-optimization/92924
	* libgcov-driver.c (prune_topn_counter): New.
	(prune_counters): Likewise.
	(dump_one_gcov): Prune a run-time counter.
	* libgcov-profiler.c (__gcov_topn_values_profiler_body):
	For a known value, add GCOV_TOPN_VALUES to value.
	Otherwise, decrement all counters by one.

This script is intended to create a new vendor branch.  Doing so is
not completely obvious if you are not familiar with the upstream
structure, so this takes the pain out of getting it right.

It doesn't check out the branch locally, but does set everything up so
that, if you have push enabled for your vendor branches, then

  git push vendors/<vendor> <branch>

will work as expected.

Run the script as

  contrib/git-add-vendor-branch.sh <vendor>/<branch> <start-point>

the <vendor> space must have previously been set up in the way
git-fetch-vendor.sh expects.

    * git-add-vendor-branch.sh: New file.

In AT&T syntax leading $ is special, so if we have identifiers that start
with dollar, we usually fail to assemble it (or assemble incorrectly).
As mentioned in the PR, what works is wrapping the identifiers inside of
parens, like:
	movl	$($a), %eax
	leaq	($a)(,%rdi,4), %rax
	movl	($a)(%rip), %eax
	movl	($a)+16(%rip), %eax
	.globl	$a
	.type	$a, @object
	.size	$a, 72
$a:
	.string	"$a"
	.quad	($a)
(this is x86_64 -fno-pic -O2).  In some places ($a) is not accepted,
like as .globl operand, in .type, .size, so the patch overrides
ASM_OUTPUT_SYMBOL_REF rather than e.g. ASM_OUTPUT_LABELREF.
I didn't want to duplicate what assemble_name is doing (following
transparent aliases), so split assemble_name into two parts; just
mere looking at the first character of a name before calling assemble_name
wouldn't be good enough, a transparent alias could lead from a name
not starting with $ to one starting with it and vice versa.

2020-01-22  Jakub Jelinek  <jakub@redhat.com>

	PR target/91298
	* output.h (assemble_name_resolve): Declare.
	* varasm.c (assemble_name_resolve): New function.
	(assemble_name): Use it.
	* config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.

	* gcc.target/i386/pr91298-1.c: New test.
	* gcc.target/i386/pr91298-2.c: New test.

The PR93329 fix revealed we ICE on !$omp target parallel, this change fixes
that.

2020-01-22  Jakub Jelinek  <jakub@redhat.com>

	* parse.c (parse_omp_structured_block): Handle ST_OMP_TARGET_PARALLEL.
	* trans-openmp.c (gfc_trans_omp_target)
	<case EXEC_OMP_TARGET_PARALLEL>: Call pushlevel first.

	* gfortran.dg/gomp/target-parallel1.f90: New test.
	* gfortran.dg/goacc/pr93329.f90: Enable commented out target parallel
	test.

The omp_code_to_statement function added with the initial OpenACC support
only handled small subset of the OpenMP statements, leading to ICE if
any other OpenMP directive appeared inside of OpenACC directive.

2020-01-22  Jakub Jelinek  <jakub@redhat.com>

	PR fortran/93329
	* openmp.c (omp_code_to_statement): Handle remaining EXEC_OMP_*
	cases.

	* gfortran.dg/goacc/pr93329.f90: New test.

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/214297

gcc/cp/ChangeLog
	* coroutines.cc (finish_co_await_expr): Add error check on return
	value of build_co_await.
	(finish_co_yield_expr): Ditto.

gcc/cp/ChangeLog
         * coroutines.cc (lookup_awaitable_member): Lookup an awaitable member.
         (lookup_promise_method): Emit diagnostic when get NULL_TREE back only.
         (build_co_await): Use lookup_awaitable_member instead of lookup_member.

gcc/testsuite/ChangeLog
         * g++.dg/coroutines/coro1-missing-await-method.C: New test.

These needed updating after the replacement of update_web_docs_svn by
update_web_docs_git.

	* doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
	update_web_docs_git instead of update_web_docs_svn.

The problem here was g:23b88fda was not a complete fix
for supporting tranditional TLS on ILP32.

So the problem here is a couple of things, first __tls_get_addr
call will return a C pointer value so we need to use ptr_mode
when we are creating the call.  Then we need to convert
back that register to the correct mode, either zero extending
it or just creating a move instruction.
Also symbol_ref can either be in SImode or DImode.  So we need to
allow both modes.

Built and tested on aarch64-linux-gnu with no regressions.
Also built a full toolchain (including glibc) defaulting to traditional
TLS that targets ilp32 and lp64.

ChangeLog:
PR target/93119
* config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
as PTR mode. Have operand 1 as being modeless, it can be P mode.
(*tlsgd_small_<mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
<case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
register.  Convert that register back to dest using convert_mode.

Bug 93348 reports an ICE on certain cases of casts of expressions that
may appear only in unevaluated parts of integer constant expressions,
arising from the generation of nested C_MAYBE_CONST_EXPRs.  This patch
fixes it by adding a call to remove_c_maybe_const_expr in the
integer-operands case, as is done in other similar cases.

Bootstrapped with no regressions for x86_64-pc-linux-gnu.

	PR c/93348
gcc/c:
	* c-typeck.c (build_c_cast): Call remove_c_maybe_const_expr on
	argument with integer operands.

gcc/testsuite:
	* gcc.c-torture/compile/pr93348-1.c: New test.

PR analyzer/93352 reports a qsort failure
  "comparator not anti-symmetric: -2147483648, -2147483648)"
within the analyzer on code involving an array access of [0x7fffffff + 1].

The issue is that array_region (which uses int for keys into known
values in the array) uses subtraction to implement int_cmp for sorting
the keys, which isn't going to work for boundary values.

Potentially a wider type should be used, but for now this patch fixes
the ICE by using explicit comparisons rather than subtraction to
implement the qsort callback.

gcc/analyzer/ChangeLog:
	PR analyzer/93352
	* region-model.cc (int_cmp): Rename to...
	(array_region::key_cmp): ...this, using key_t rather than int.
	Rewrite in terms of comparisons rather than subtraction to
	ensure qsort is anti-symmetric when handling extreme values.
	(array_region::walk_for_canonicalization): Update for above
	renaming.
	* region-model.h (array_region::key_cmp): New decl.

gcc/testsuite/ChangeLog:
	PR analyzer/93352
	* gcc.dg/analyzer/pr93352.c: New test.

This is a longstanding issue with lots of duplicates; people are not
interested in a -Wconversion warning about mychar += 1.  So now that warning
depends on -Warith-conversion; otherwise we only warn if operands of the
arithmetic have conversion issues.

	* c.opt (-Warith-conversion): New.
	* c-warn.c (conversion_warning): Recurse for operands of
	operators.  Only warn about the whole expression with
	-Warith-conversion.

It seemed strange to me to warn about sign conversion in
unsafe_conversion_p, when other warnings are in conversion_warning, and the
latter function is the only place that asks the former function to warn.
This change is also necessary for my -Warith-conversion patch.

	* c-common.c (unsafe_conversion_p): Don't warn, return UNSAFE_SIGN.
	* c-warn.c (conversion_warning): Warn about UNSAFE_SIGN.

Found with an rtl checking enabled build and check.  This triggered failures
in the gcc.target/riscv/save-restore* tests.  We are using XINT to access an
XWINT value; INTVAL is the preferred solution.

	gcc/
	* config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
	instead of XINT.

	* gcc.target/cris/asm-v8.S, gcc.target/cris/inasm-v8.c,
	gcc.target/cris/sync-1.c: Apply effective_target_march_option.

Oops.  A few stragglers, same as recent update: differing
-march=... options is an error, noticed with e.g.
"make check RUNTESTFLAGS=--target_board=cris-sim/arch=v10"

Since GNU2 TLS address from glibc run-time is in ptr_mode, we should do
GNU2 TLS address computation in ptr_mode and zero-extend result to Pmode.

gcc/

	PR target/93319
	* config/i386/i386.c (ix86_tls_module_base): Replace Pmode
	with ptr_mode.
	(legitimize_tls_address): Do GNU2 TLS address computation in
	ptr_mode and zero-extend result to Pmode.
	*  config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
	:P with :PTR and Pmode with ptr_mode.
	(*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
	(*tls_dynamic_gnu2_call_64_<mode>): Likewise.
	(*tls_dynamic_gnu2_combine_64_<mode>): Likewise.

gcc/testsuite/

	PR target/93319
	* gcc.target/i386/pr93319-1a.c: Don't include <stdio.h>.
	(test1): Replace printf with __builtin_printf.

For normal captures we usually look through them within unevaluated context,
but that doesn't work here; trying to take the sizeof of the array in the
enclosing scope tries and fails to evaluate a SAVE_EXPR from the enclosing
scope.

	* lambda.c (is_lambda_ignored_entity): Don't look past VLA capture.

We were failing to handle VLA capture in tsubst_lambda_expr; initially
building a DECLTYPE_TYPE for the capture and then tsubsting it doesn't give
the special VLA handling.  So with this patch we call add_capture again for
VLAs.

	* pt.c (tsubst_lambda_expr): Repeat add_capture for VLAs.

gcc/cp
2020-01-21  Iain Sandoe  <iain@sandoe.co.uk>
    Bin Cheng  <bin.cheng@linux.alibaba.com>

* coroutines.cc (coro_promise_type_found_p): Check for NULL return
from complete_type_or_else.
(register_param_uses): Likewise.
(build_co_await): Do not try to use complete_type_or_else for void
types, otherwise for incomplete types, check for NULL return from
complete_type_or_else.

gcc/testsuite
2020-01-21  Bin Cheng  <bin.linux@linux.alibaba.com>

* g++.dg/coroutines/co-await-void_type.C: New test.

As mentioned in the PR, during combine rtx_costs can be called sometimes
even on RTL that has not been validated yet and so can contain even operands
that aren't valid in any instruction.

2020-01-21  Jakub Jelinek  <jakub@redhat.com>

	PR target/93333
	* config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
	the last two operands are CONST_INT_P before using them as such.

	* gcc.c-torture/compile/pr93333.c: New test.

I observed this testcase was failing on nios2-elf.  The more general
regexp was copied from other tests using dg-output.

2020-01-21  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/testsuite/
	* g++.dg/coroutines/torture/mid-suspend-destruction-0.C: Generalize
	line terminators in patterns.

I'd used mode-based element types in the SVE ACLE implementation, but
it turns out that they don't correspond to the <stdint.h> types used by
ILP32 newlib.  GCC already knows what the correct <stdint.h> types are,
I just wasn't using the right interface to find them.

A consequence of this is that ILP32 newlib code needs to cast "int *"
pointers to "int32_t *" before passing them to s32 loads and stores,
since int32_t is defined as "long int" rather than "int".  That matches
the normal C++ overloading behaviour for this target, where passing
"int *" to:

    void f(int32_t *);
    void f(int64_t *);

would be ambiguous.  It also matches the corresponding <arm_neon.h>
behaviour.

2020-01-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
	to get the integer element types.

gcc/testsuite/
	* gcc.target/aarch64/sve/acle/general-c/load_1.c (f1): Cast to
	int32_t * rather than int *.
	* gcc.target/aarch64/sve/acle/general-c/load_2.c (f1): Likewise.
	* gcc.target/aarch64/sve/acle/general-c/load_gather_sv_1.c
	(f1): Likewise.
	* gcc.target/aarch64/sve/acle/general-c/load_gather_sv_2.c
	(f1): Likewise.
	* gcc.target/aarch64/sve/acle/general-c/load_gather_sv_restricted_1.c
	(f1): Likewise.
	* gcc.target/aarch64/sve/acle/general-c/load_replicate_1.c
	(f1): Likewise.
	* gcc.target/aarch64/sve/acle/general-c/store_1.c (f1): Likewise.
	* gcc.target/aarch64/sve/acle/general-c/store_2.c (f1): Likewise.
	* gcc.target/aarch64/sve/acle/general-c/store_scatter_index_1.c
	(f1): Likewise.
	* gcc.target/aarch64/sve/acle/general-c/store_scatter_offset_2.c
	(f1): Likewise.
	* gcc.target/aarch64/sve/acle/general-c/store_scatter_offset_restricted_1.c
	(f1): Likewise.

This long-overdue patch promotes SImode pointers to DImode addresses,
avoiding various ICEs in the existing tests.

2020-01-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve-builtins.h
	(function_expander::convert_to_pmode): Declare.
	* config/aarch64/aarch64-sve-builtins.cc
	(function_expander::convert_to_pmode): New function.
	(function_expander::get_contiguous_base): Use it.
	(function_expander::prepare_gather_address_operands): Likewise.
	* config/aarch64/aarch64-sve-builtins-sve2.cc
	(svwhilerw_svwhilewr_impl::expand): Likewise.

This is a workaround that emits a BTI after the function label if that
is followed by a patch area. We try to remove the BTI that follows the
patch area (this may fail e.g. if the first instruction is a PACIASP).

So before this commit -fpatchable-function-entry=3,1 with bti generates

    .section __patchable_function_entries
    .8byte .LPFE
    .text
  .LPFE:
    nop
  foo:
    nop
    nop
    bti c // or paciasp
    ...

and after this commit

    .section __patchable_function_entries
    .8byte .LPFE
    .text
  .LPFE:
    nop
  foo:
    bti c
    nop
    nop
    // may be paciasp
    ...

and with -fpatchable-function-entry=1 (M=0) the code now is

  foo:
    bti c
    .section __patchable_function_entries
    .8byte .LPFE
    .text
  .LPFE:
    nop
    // may be paciasp
    ...

There is a new bti insn in the middle of the patchable area users need
to be aware of unless M=0 (patch area is after the new bti) or M=N
(patch area is before the label, no new bti). Note: bti is not added to
all functions consistently (it can be turned off per function using a
target attribute or the compiler may detect that the function is never
called indirectly), so if bti is inserted in the middle of a patch area
then user code needs to deal with detecting it.

Tested on aarch64-none-linux-gnu.

gcc/ChangeLog:

	PR target/92424
	* config/aarch64/aarch64.c (aarch64_declare_function_name): Set
	cfun->machine->label_is_assembled.
	(aarch64_print_patchable_function_entry): New.
	(TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
	* config/aarch64/aarch64.h (struct machine_function): New field,
	label_is_assembled.

gcc/testsuite/ChangeLog:

	PR target/92424
	* gcc.target/aarch64/pr92424-1.c: New test.
	* gcc.target/aarch64/pr92424-2.c: New test.
	* gcc.target/aarch64/pr92424-3.c: New test.

gcc/ChangeLog:
	PR ipa/93315
	* ipa-profile.c (ipa_profile): Delete call_sums and set it to
	NULL on exit.

Commit 9ceec73f introduced intrinsics for the AArch64 FP64 matrix
multiply instructions.  These require binutils support for the same
instructions.

This patch adds a DejaGNU test to ensure this binutils support is there
and uses it in the files that need this test.

Testing Done:
Checked on a cross-compiler that:
Tests running for binutils commit e264b5b7a are listed as UNSUPPORTED.
Tests running for binutils commit 26916852e all pass.

gcc/testsuite/ChangeLog:

2020-01-21  Matthew Malcomson  <matthew.malcomson@arm.com>

	* gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c: Use require
	directive.
	* gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c: Likewise.
	* gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c: Likewise.
	* gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c: Likewise.
	* gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c: Likewise.
	* gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c: Likewise.
	* gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c: Likewise.
	* gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c: Likewise.
	* gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c: Likewise.
	* gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c: Likewise.
	* gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c: Likewise.
	* lib/target-supports.exp: Add assembly requirement directive.

This patch fixes ICE causes by call stmt site hash going out of sync.  For
speculative edges it is assumed to contain a direct call so if we are
removing it hashtable needs to be updated.  I realize that the code is ugly
but I will leave cleanup for next stage1.

Bootstrapped/regtested x86_64-linux. This patch makes it possible to build
Firefox again.

	PR lto/93318
	* cgraph.c (cgraph_edge::resolve_speculation,
	cgraph_edge::redirect_call_stmt_to_callee): Fix update of
	call_stmt_site_hash.

The problem in the PR was that make_temporary_var_for_ref_to_temp ran before
determine_visibility, so when we copied the linkage of the reference
variable it had not yet been restricted by its anonymous namespace context,
so the temporary wrongly ended up with TREE_PUBLIC set.  The natural
solution is to run determine_visibility earlier.  But that needs to happen
after maybe_commonize_var increases the linkage of some local variables, and
on targets without weak symbol support, that function does different things
based on the results of check_initializer, which is what calls
make_temporary_var_for_ref_to_temp.  To break this circular dependency I'm
calling maybe_commonize_var early, and then again later if the target
doesn't support weak symbols.

It also occurred to me that make_temporary_var_for_ref_to_temp wasn't
handling DECL_VISIBILITY at all, and verified that we were doing the wrong
thing.  So I've combined the linkage-copying code from there and two other
places.

	* decl2.c (copy_linkage): Factor out of get_guard.
	* call.c (make_temporary_var_for_ref_to_temp): Use it.
	* decl.c (cp_finish_decomp): Use it.
	(cp_finish_decl): determine_visibility sooner.

	* config/rs6000/rs6000.c (common_mode_defined): Remove
	unused variable.

        PR fortran/93309
        * interface.c (gfc_procedure_use): Also check parent namespace for
        'implict none (external)'.
        * symbol.c (gfc_get_namespace): Don't set has_implicit_none_export
        to parent namespace's setting.

        PR fortran/93309
        * gfortran.dg/external_implicit_none_2.f90: New.

We were actually value-numbering two entities with different type
the same rather than just having the same representation in the
hashtable.  The following fixes that by wrapping the value in a
to be inserted VIEW_CONVERT_EXPR.

2020-01-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/92328
	* tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
	type when value-numbering same-sized store by inserting a
	VIEW_CONVERT_EXPR.
	(eliminate_dom_walker::eliminate_stmt): When eliminating
	a redundant store handle bit-reinterpretation of the same value.

	* gcc.dg/torture/pr92328.c: New testcase.

Reported as PR 93321, prepare_block_for_update with some huge
recusive inlining can go past the stack limit. Transforming this
recursive into worklist improves the stack usage here and we no
longer seg fault for the testcase.  Note the order we walk the siblings
change.

ChangeLog:
	PR tree-opt/93321
	* tree-into-ssa.c (prepare_block_for_update_1): Split out from ...
	(prepare_block_for_update): This.  Use a worklist instead of recursing.

2020-01-21  Mihail-Calin Ionescu  <mihail.ionescu@arm.com>

	* gcc/config/arm/arm.c (clear_operation_p):
	Initialise last_regno, skip first iteration
	based on the first_set value and use ints instead
	of the unnecessary HOST_WIDE_INTs.

The following testcase ICEs, because for TFmode the particular subtraction
pattern (*subtf3) is not enabled with the given options.  Using
expand_simple_binop instead of emitting the subtraction by hand just moves
the ICE one insn later, NEG of ABS is not then recognized, etc., but
ultimately the problem is that when rs6000_emit_cmove is called for floating
point operand mode (and earlier condition ensures that in that case
compare_mode is also floating point), the expander makes sure the
operand mode is SFDF, but for the comparison mode nothing checks it, yet
there is just one *fsel* pattern with 2 separate SFDF iterators.

The following patch fixes it by giving up if compare_mode is not SFmode or
DFmode.

2020-01-21  Jakub Jelinek  <jakub@redhat.com>

	PR target/93073
	* config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
	compare_mode other than SFmode or DFmode.

	* gcc.target/powerpc/pr93073.c: New test.