re PR rtl-optimization/71673 (FAIL: c-c++-common/torture/builtin-arith-overflow-p-19.c -O2  (internal compiler error))

	PR rtl-optimization/71673
	* internal-fn.c (expand_arith_overflow_result_store): Use
	OPTAB_LIB_WIDEN instead of OPTAB_DIRECT as last argument to
	expand_simple_binop.

From-SVN: r237815

	PR middle-end/66867
	* builtins.c (expand_ifn_atomic_compare_exchange_into_call,
	expand_ifn_atomic_compare_exchange): New functions.
	* internal-fn.c (expand_ATOMIC_COMPARE_EXCHANGE): New function.
	* tree.h (build_call_expr_internal_loc): Rename to ...
	(build_call_expr_internal_loc_array): ... this.  Fix up type of
	last argument.
	* internal-fn.def (ATOMIC_COMPARE_EXCHANGE): New internal fn.
	* predict.c (expr_expected_value_1): Handle IMAGPART_EXPR of
	ATOMIC_COMPARE_EXCHANGE result.
	* builtins.h (expand_ifn_atomic_compare_exchange): New prototype.
	* gimple-fold.h (optimize_atomic_compare_exchange_p,
	fold_builtin_atomic_compare_exchange): New prototypes.
	* gimple-fold.c (optimize_atomic_compare_exchange_p,
	fold_builtin_atomic_compare_exchange): New functions..
	* tree-ssa.c (execute_update_addresses_taken): If
	optimize_atomic_compare_exchange_p, ignore &var in 2nd argument
	of call when finding addressable vars, and if such var becomes
	non-addressable, call fold_builtin_atomic_compare_exchange.

From-SVN: r237814

The splitter for ashdi3_extswsli_dot for cr0 with memory uses emit_insn
gen_ashdi3_extswsli_dot, which does not work because that emits a scratch,
while the splitter runs after reload so there should be a real register
instead.  We can laboriously fix that up, or emit using
gen_ashdi3_extswsli_dot2 instead.  This patch does the latter.


	PR target/71670
	* config/rs6000/rs6000.md (ashdi3_extswsli_dot): Use
	gen_ashdi3_extswsli_dot2 instead of gen_ashdi3_extswsli_dot.

gcc/testsuite/
	PR target/71670
	* gcc.target/powerpc/pr71670.c: New testcase.

From-SVN: r237813

	* config/rs6000/rs6000.md ('type' attribute): Add
	veclogical,veccmpfx,vecexts,vecmove insn types.
	(*abs<mode>2_fpr, *nabs<mode>2_fpr, *neg<mode>2_fpr, *extendsfdf2_fpr,
	copysign<mode>3_fcpsgn, trunc<mode>df2_internal1, neg<mode>2_internal,
	p8_fmrgow_<mode>, pack<mode>): Change type to fpsimple.
	(*xxsel<mode>, copysign<mode>3_hard, neg<mode>2_hw, abs<mode>2_hw,
	*nabs<mode>2_hw): Change type to vecmove.
	(*and<mode>3_internal, *bool<mode>3_internal, *boolc<mode>3_internal,
	*boolcc<mode>3_internal, *eqv<mode>3_internal,
	*one_cmpl<mode>3_internal, *ieee_128bit_vsx_neg<mode>2_internal,
	*ieee_128bit_vsx_abs<mode>2_internal,
	*ieee_128bit_vsx_nabs<mode>2_internal, extendkftf2, trunctfkf2,
	*ieee128_mfvsrd_64bit, *ieee128_mfvsrd_32bit, *ieee128_mtvsrd_64bit,
	*ieee128_mtvsrd_32bit): Change type to veclogical.
	(mov<mode>_hardfloat, *mov<mode>_hardfloat32, *mov<mode>_hardfloat64,
	*movdi_internal32, *movdi_internal64): Update insn types.
	* config/rs6000/vsx.md (*vsx_le_undo_permute_<mode>,
	vsx_extract_<mode>): Change type to veclogical.
	(*vsx_xxsel<mode>, *vsx_xxsel<mode>_uns): Change type to vecmove.
	(vsx_sign_extend_qi_<mode>, *vsx_sign_extend_hi_<mode>,
	*vsx_sign_extend_si_v2di): Change type to vecexts.
	* config/rs6000/altivec.md (*altivec_mov<mode>, *altivec_movti): Change
	type to veclogical.
	(*altivec_eq<mode>, *altivec_gt<mode>, *altivec_gtu<mode>,
	*altivec_vcmpequ<VI_char>_p, *altivec_vcmpgts<VI_char>_p,
	*altivec_vcmpgtu<VI_char>_p): Change type to veccmpfx.
	(*altivec_vsel<mode>, *altivec_vsel<mode>_uns): Change type to vecmove.
	* config/rs6000/dfp.md (*negdd2_fpr, *absdd2_fpr, *nabsdd2_fpr,
	negtd2, *abstd2_fpr, *nabstd2_fpr): Change type to fpsimple.
	* config/rs6000/40x.md (ppc405-float): Add fpsimple.
	* config/rs6000/440.md (ppc440-fp): Add fpsimple.
	* config/rs6000/476.md (ppc476-fp): Add fpsimple.
	* config/rs6000/601.md (ppc601-fp): Add fpsimple.
	* config/rs6000/603.md (ppc603-fp): Add fpsimple.
	* config/rs6000/6xx.md (ppc604-fp): Add fpsimple.
	* config/rs6000/7xx.md (ppc750-fp): Add fpsimple.
	(ppc7400-vecsimple): Add veclogical, vecmove, veccmpfx.
	* config/rs6000/7450.md (ppc7450-fp): Add fpsimple.
	(ppc7450-vecsimple): Add veclogical, vecmove.
	(ppc7450-veccmp): Add veccmpfx.
	* config/rs6000/8540.md (ppc8540_simple_vector): Add veclogical,
	vecmove.
	(ppc8540_vector_compare): Add veccmpfx.
	* config/rs6000/a2.md (ppca2-fp): Add fpsimple.
	* config/rs6000/cell.md (cell-fp): Add fpsimple.
	(cell-vecsimple): Add veclogical, vecmove.
	(cell-veccmp): Add veccmpfx.
	* config/rs6000/e300c2c3.md (ppce300c3_fp): Add fpsimple.
	* config/rs6000/e6500.md (e6500_vecsimple): Add veclogical, vecmove,
	veccmpfx.
	* config/rs6000/mpc.md (mpccore-fp): Add fpsimple.
	 * config/rs6000/power4.md (power4-fp): Add fpsimple.
	(power4-vecsimple): Add veclogical, vecmove.
	(power4-veccmp): Add veccmpfx.
	* config/rs6000/power5.md (power5-fp): Add fpsimple.
	* config/rs6000/power6.md (power6-fp): Add fpsimple.
	(power6-vecsimple): Add veclogical, vecmove.
	(power6-veccmp): Add veccmpfx.
	* config/rs6000/power7.md (power7-fp): Add fpsimple.
	(power7-vecsimple): Add veclogical, vecmove, veccmpfx.
	* config/rs6000/power8.md (power8-fp): Add fpsimple.
	(power8-vecsimple): Add veclogical, vecmove, veccmpfx.
	* config/rs6000/rs64.md (rs64a-fp): Add fpsimple.
	* config/rs6000/titan.md (titan_fp): Add fpsimple.
	* config/rs6000/xfpu.md (fp-default, fp-addsub-s, fp-addsub-d): Add
	fpsimple.
	* config/rs6000/rs6000.c (rs6000_adjust_cost): Add TYPE_FPSIMPLE.

From-SVN: r237812

gcc/
	PR target/71656
	* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add
	OPTION_MASK_P9_DFORM_VECTOR.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
	disable -mpower9-dform-vector when using reload.
	(quad_address_p): Remove 'gpr_p' argument and all associated code.
	New 'strict' argument.  Update all callers.  Add strict addressing
	support.
	(rs6000_legitimate_offset_address_p): Remove call to
	virtual_stack_registers_memory_p.
	(rs6000_legitimize_reload_address): Add quad address support.
	(rs6000_legitimate_address_p): Move call to quad_address_p above
	call to virtual_stack_registers_memory_p.  Adjust quad_address_p args
	to account for new strict usage.
	(rs6000_output_move_128bit): Adjust quad_address_p args to account
	for new strict usage.
	* config/rs6000/predicates.md (quad_memory_operand): Likewise.

gcc/testsuite/
	PR target/71656
	* gcc.target/powerpc/pr71656-1.c: New test.
	* gcc.target/powerpc/pr71656-2.c: New test.

From-SVN: r237811

From-SVN: r237810

vsx.md (UNSPEC_P9_MEMORY): New unspec to support loading and storing byte/half-word values in the vector...

[gcc]
2016-06-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/vsx.md (UNSPEC_P9_MEMORY): New unspec to support
	loading and storing byte/half-word values in the vector registers.
	(vsx_sign_extend_hi_<mode>): Enable the generator function.
	(p9_lxsi<wd>zx): New insns to load zero-extended bytes and
	half-words on ISA 3.0 to the vector registers.
	(p9_stxsi<wd>zx): New insns to store zero-extended bytes and
	half-words on ISA 3.0 from the vector registers.
	* config/rs6000/rs6000.md (FP_ISA3): New iterator to optimize
	converting char/half-word items to floating point on ISA 3.0.
	(float<QHI:mode><FP_ISA3:mode>2): On ISA 3.0 generate the lxsihzx
	and lxsibzx instructions if we are converting an 8-bit or 16-bit
	item from memory to floating point.
	(float<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
	(floatuns<QHI:mode><FP_ISA3:mode>2): Likewise.
	(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
	(fix_trunc<SFDF:mode><QHI:mode>2): On ISA 3.0 generate the stxsihx
	and stxsibx instructions to store floating point values converted
	to 8 or 16-bit integers.
	(fixuns_trunc<mode>si2): Likewise.

[gcc/testsuite]
2016-06-27  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/p9-fpcvt-1.c: New test to test ISA 3.0 load
	byte/half-word to vector registers and store byte/half-word from
	vector register instructions.
	* gcc.target/powerpc/p9-fpcvt-2.c: Likewise.

From-SVN: r237806

re PR libstdc++/71640 (include/c++/7.0.0/bits/hashtable.h:293:7: error: too many template parameters in template redeclaration)

2016-06-27  François Dumont  <fdumont@gcc.gnu.org>

	PR libstdc++/71640
	* include/bits/hashtable.h: Remove _Unique_keya parameter in _Insert
	friend declaration.

From-SVN: r237803

2016-06-27  Christophe Lyon  <christophe.lyon@linaro.org>

	* gcc.target/aarch64/advsimd-intrinsics/vget_lane.c: Add ifdef
	around fp16 code.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c:
	Add arm_neon_fp16_ok effective target.
	* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c: Likewise.
	* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c: Likewise.

From-SVN: r237798

From-SVN: r237797

	* config/i386/i386.c (ix86_spill_class): Disable condition to
	always return NO_REGS.

From-SVN: r237793

	PR target/70902
	PR target/71453
	PR target/71555
	PR target/71596
	PR target/71657
	* config/i386/i386.c (TARGET_SPILL_CLASS): #if 0 out the definition.
	(ix86_spill_class): Disable to always return NO_REGS.

From-SVN: r237792

	* gcc.dg/predict-12.c: New testcase.

	* predict.c: Include gimple-pretty-print.h
	(predicted_by_loop_heuristics_p): Check also
	PRED_LOOP_EXIT_WITH_RECURSION
	(predict_loops): Find self recursive calls and use special purpose
	predictors for them; dump log about decisions.
	(pass_profile::execute): Dump info about #of iterations.
	* predict.def (PRED_LOOP_EXIT_WITH_RECURSION,
	(PRED_LOOP_GUARD_WITH_RECURSION): New predictors.

From-SVN: r237791

	* config/pa/pa.c (pa_output_indirect_call): Rework to combine
	output_asm_insn calls and shorten long lines.  Output .CALL
	argument descriptor using pa_output_arg_descriptor.  Add various
	inline $$dyncall and other optimizations.
	(pa_attr_length_indirect_call): Adjust ordering and lengths.

From-SVN: r237790

2016-06-25  Jerry DeLisle  <jvdelisle@gcc.gnu.org>

	PR fortran/71649
	* module.c (create_intrinsic_function): Check for NULL values and
	return after giving error.

	PR fortran/71649
	* gfortran.dg/pr71649.f90: New test.

From-SVN: r237789

From-SVN: r237788

From-SVN: r237784

re PR tree-optimization/71643 (internal compiler error: in redirect_eh_edge_1, at tree-eh.c:2318 after r237427)

	PR tree-optimization/71643
	* tree-ssa-tail-merge.c (find_clusters_1): Ignore basic blocks with
	EH preds.

	* tree-ssa-tail-merge.c (deps_ok_for_redirect_from_bb_to_bb): Don't
	leak a bitmap if dep_bb is NULL.

	* g++.dg/opt/pr71643.C: New test.

From-SVN: r237783

	PR tree-optimization/71631
	* tree-ssa-reassoc.c (reassociate_bb): Pass true as last argument
	to rewrite_expr_tree even if negate_result, move new_lhs var
	declaration and initialization earlier, for powi_result set afterwards
	new_lhs to lhs.  For negate_result, use new_lhs instead of tmp
	if new_lhs != lhs, and don't shadow gsi var.

	* gcc.c-torture/execute/pr71631.c: New test.

From-SVN: r237782

	* predict.c (predict_paths_leading_to, predict_paths_leading_to_edge):
	Add in_loop parameter.
	(predict_loops): Add loop guard heuristics.
	* predict.def (PRED_LOOP_GUARD): New heuristics.

	* gcc.dg/predict-11.c: New testcase.
	* gfortran.dg/predict-2.f90: New testcase.

From-SVN: r237781

	* predict.c: Include ipa-utils.h
	(tree_bb_level_prediction): Predict recursive calls.
	(tree_estimate_probability_bb): Skip inexpensive calls for call
	predictor.
	* predict.def (PRED_RECURSIVE_CALL): New.

	* gcc.dg/predict-10.c: New test.

From-SVN: r237780

From-SVN: r237779

gcc/c-common/
	* c-common.c (verify_tree) [COMPOUND_EXPR]: Fix handling on LHS of
	MODIFY_EXPR.
gcc/cp/
	* typeck.c (cp_build_modify_expr): Leave COMPOUND_EXPR on LHS.

From-SVN: r237775

[gcc]

2016-06-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/rs6000-builtin.def (BU_FLOAT128_2): New #define.
	(BU_FLOAT128_1): Likewise.
	(FABSQ): Likewise.
	(COPYSIGNQ): Likewise.
	(RS6000_BUILTIN_NANQ): Likewise.
	(RS6000_BUILTIN_NANSQ): Likewise.
	(RS6000_BUILTIN_INFQ): Likewise.
	(RS6000_BUILTIN_HUGE_VALQ): Likewise.
	* config/rs6000/rs6000.c (rs6000_fold_builtin): New prototype.
	(TARGET_FOLD_BUILTIN): New #define.
	(rs6000_builtin_mask_calculate): Add TARGET_FLOAT128 entry.
	(rs6000_invalid_builtin): Add handling for RS6000_BTM_FLOAT128.
	(rs6000_fold_builtin): New target hook implementation, handling
	folding of 128-bit NaNs and infinities.
	(rs6000_init_builtins): Initialize const_str_type_node; ensure all
	entries are filled in to avoid problems during bootstrap
	self-test; define builtins for 128-bit NaNs and infinities.
	(rs6000_opt_mask): Add entry for float128.
	* config/rs6000/rs6000.h (RS6000_BTM_FLOAT128): New #define.
	(RS6000_BTM_COMMON): Include RS6000_BTM_FLOAT128.
	(rs6000_builtin_type_index): Add RS6000_BTI_const_str.
	(const_str_type_node): New #define.
	* config/rs6000/rs6000.md (copysign<mode>3 for IEEE128): Convert
	to a define_expand that dispatches to either copysign<mode>3_soft
	or copysign<mode>3_hard.
	(copysign<mode>3_hard): Rename from copysign<mode>3.
	(copysign<mode>3_soft): New define_insn.
	* doc/extend.texi: Document new builtins.

[gcc/testsuite]

2016-06-24  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/abs128-1.c: New.
	* gcc.target/powerpc/copysign128-1.c: New.
	* gcc.target/powerpc/inf128-1.c: New.
	* gcc.target/powerpc/nan128-1.c: New.

From-SVN: r237774

	* tree.c (get_target_expr_sfinae): Handle bit-fields.
	(build_target_expr): Call mark_rvalue_use.

From-SVN: r237773

	* cfgloop.c (flow_loop_dump): Cast nit to uint64_t and print it using
	PRIu64 instead of lu.

From-SVN: r237772

	PR debug/71642
	* tree-inline.c (remap_decl): When fixing up DECL_ORIGINAL_TYPE, just
	copy the type name.

From-SVN: r237771

	PR tree-optimization/71647
	* omp-low.c (lower_rec_input_clauses): Convert
	omp_clause_aligned_alignment (c) to size_type_node for the
	last argument of __builtin_assume_aligned.

	* gcc.target/i386/pr71647.c: New test.

From-SVN: r237769

There are extensions to x86-64 psABI:

https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI

and i386 psABI:

https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs

to call tls_get_addr via GOT.  X86 assembler and linker in binutils 2.27
implemented

call *__tls_get_addr@GOTPCREL(%rip)

in 64-bit and

call *___tls_get_addr@GOT(%reg)

in 32-bit to access global and local thread loal variables in shared
library.  We check if 32-bit x86 assembler and linker work with

call *___tls_get_addr@GOT(%reg)

as 32-bit and 64-bit assembler and linker are enabled togther.

In 32-bit, since any integer register except EAX, which is used to pass
parameter to ___tls_get_addr, and ESP, can be used as GOT base, a new
register class, TLS_GOTBASE_REGS, along with a new constraint, Yb, are
added.  They are used to improve register allocation for 32-bit dynamic
TLS patterns.

gcc/

	* configure.ac (calling ___tls_get_addr via GOT): New
	assembler/linker check.
	(HAVE_AS_IX86_TLS_GET_ADDR_GOT): New.  Defined to 1 if 32-bit
	assembler and linker supports calling ___tls_get_addr via GOT.
	Otherise, defined to 0.
	* config.in: Regenerated.
	* configure: Likewise.
	* config/i386/constraints.md (Yb): New constraint.
	* config/i386/i386.h (reg_class): Add TLS_GOTBASE_REGS.
	(REG_CLASS_NAMES): Likewise.
	(REG_CLASS_CONTENTS): Likewise.
	* config/i386/i386.md (*tls_global_dynamic_32_gnu): Replace
	the b constraint with the Yb constraint.  Call ___tls_get_addr
	via GOT for GNU TLS with -fno-plt if HAVE_AS_IX86_TLS_GET_ADDR_GOT
	is 1.
	(*tls_local_dynamic_base_32_gnu): Likewise.
	(*tls_global_dynamic_64_<mode>): Call _tls_get_addr via GOT for
	GNU TLS with -fno-plt if HAVE_AS_IX86_TLS_GET_ADDR_GOT is 1.
	(*tls_local_dynamic_base_64_<mode>): Likewise.

gcc/testsuite/

	* gcc.target/i386/noplt-gd-1.c: New test.
	* gcc.target/i386/noplt-gd-2.c: Likewise.
	* gcc.target/i386/noplt-gd-3.c: Likewise.
	* gcc.target/i386/noplt-ld-1.c: Likewise.
	* gcc.target/i386/noplt-ld-2.c: Likewise.
	* gcc.target/i386/noplt-ld-3.c: Likewise.
	* lib/target-supports.exp
	(check_effective_target_tls_get_addr_via_got): New.

From-SVN: r237765

From-SVN: r237764

	* analyze_brprob.py: Parse and display average number
	of loop iterations.
	* cfgloop.c (flow_loop_dump): Dump average number of loop iterations.
	* cfgloop.h: Change 'struct loop' to 'const struct loop' for a
	few functions.
	* cfgloopanal.c (expected_loop_iterations_unbounded): Set a new
	argument to true if the expected number of iterations is
	loop-based.

From-SVN: r237762

2016-06-24  Uros Bizjak  <ubizjak@gmail.com>

	* gcc.dg/vect/vect-nb-iter-ub-1.c: Remove default vector
	testsuite compile flags.
	* gcc.dg/vect/vect-nb-iter-ub-2.c: Ditto.
	* gcc.dg/vect/vect-nb-iter-ub-3.c: Ditto.

2016-06-24  Uros Bizjak  <ubizjak@gmail.com>

	* g++dg/vect/pr36684.cc: Add dg-do compile.
	* gcc.dg/vect/O3-pr70130.c: Remove dg-do run.
	* gcc.dg/vect/pr70021.c: Ditto.
	* gcc.dg/vect/pr70138-1.c: Ditto.
	* gcc.dg/vect/pr70138-2.c: Ditto.
	* gcc.dg/vect/pr70354-1.c: Ditto.
	* gcc.dg/vect/pr70354-2.c: Ditto.
	* gcc.dg/vect/pr71259.c: Ditto.
	* gcc.dg/vect/pr71416-1.c: Ditto.
	* gcc.dg/vect/slp-43.c: Ditto.
	* gcc.dg/vect/slp-45.c: Ditto.
	* gcc.dg/vect/vect-nb-iter-ub-1.c: Ditto.
	* gcc.dg/vect/vect-nb-iter-ub-2.c: Ditto.
	* gcc.dg/vect/vect-nb-iter-ub-3.c: Ditto.
	* gfortran.dg/vect/pr69980.f90: Ditto.

2016-06-24  Uros Bizjak  <ubizjak@gmail.com>

	* gcc.dg/vect/O3-pr70130.c: Include tree-vect.h and call check_vect.
	* gcc.dg/vect/bb-slp-30.c: Ditto.
	* gcc.dg/vect/costmodel/i386/costmodel-vect-33.c: Ditto.
	* gcc.dg/vect/fast-math-bb-slp-call-3.c: Ditto.
	* gcc.dg/vect/pr45902.c: Ditto.
	* gcc.dg/vect/pr48172.c: Ditto.
	* gcc.dg/vect/pr48377.c: Ditto.
	* gcc.dg/vect/pr49038.c: Ditto.
	* gcc.dg/vect/pr49771.c: Ditto.
	* gcc.dg/vect/pr52091.c: Ditto.
	* gcc.dg/vect/pr53185-2.c: Ditto.
	* gcc.dg/vect/pr56826.c: Ditto.
	* gcc.dg/vect/pr60276.c: Ditto.
	* gcc.dg/vect/pr62021.c: Ditto.
	* gcc.dg/vect/pr63530.c: Ditto.
	* gcc.dg/vect/pr65518.c: Ditto.
	* gcc.dg/vect/pr65947-1.c: Ditto.
	* gcc.dg/vect/pr65947-10.c: Ditto.
	* gcc.dg/vect/pr65947-11.c: Ditto.
	* gcc.dg/vect/pr65947-12.c: Ditto.
	* gcc.dg/vect/pr65947-13.c: Ditto.
	* gcc.dg/vect/pr65947-2.c: Ditto.
	* gcc.dg/vect/pr65947-3.c: Ditto.
	* gcc.dg/vect/pr65947-4.c: Ditto.
	* gcc.dg/vect/pr65947-5.c: Ditto.
	* gcc.dg/vect/pr65947-6.c: Ditto.
	* gcc.dg/vect/pr65947-7.c: Ditto.
	* gcc.dg/vect/pr65947-8.c: Ditto.
	* gcc.dg/vect/pr65947-9.c: Ditto.
	* gcc.dg/vect/pr71416-1.c: Ditto.
	* gcc.dg/vect/pr71439.c: Ditto.
	* gcc.dg/vect/slp-widen-mult-half.c: Ditto.
	* gcc.dg/vect/vect-bswap16.c: Ditto.
	* gcc.dg/vect/vect-bswap32.c: Ditto.
	* gcc.dg/vect/vect-bswap64.c: Ditto.
	* gcc.dg/vect/vect-live-1.c: Ditto.
	* gcc.dg/vect/vect-live-2.c: Ditto.
	* gcc.dg/vect/vect-live-3.c: Ditto.
	* gcc.dg/vect/vect-live-4.c: Ditto.
	* gcc.dg/vect/vect-live-5.c: Ditto.
	* gcc.dg/vect/vect-live-slp-1.c: Ditto.
	* gcc.dg/vect/vect-live-slp-2.c: Ditto.
	* gcc.dg/vect/vect-live-slp-3.c: Ditto.
	* gcc.dg/vect/vect-nb-iter-ub-1.c: Ditto.
	* gcc.dg/vect/vect-nb-iter-ub-2.c: Ditto.
	* gcc.dg/vect/vect-nb-iter-ub-3.c: Ditto.
	* gcc.dg/vect/vect-neg-store-1.c: Ditto.
	* gcc.dg/vect/vect-neg-store-2.c: Ditto.
	* gcc.dg/vect/vect-outer-pr69720.c: Ditto.
	* gcc.dg/vect/vect-reduc-mul_1.c: Ditto.
	* gcc.dg/vect/vect-reduc-mul_2.c: Ditto.
	* gcc.dg/vect/vect-reduc-or_1.c: Ditto.
	* gcc.dg/vect/vect-reduc-or_2.c: Ditto.
	* gcc.dg/vect/vect-widen-mult-const-s16.c: Ditto.
	* gcc.dg/vect/vect-widen-mult-const-u16.c: Ditto.
	* gcc.dg/vect/vect-widen-mult-half-u8.c: Ditto.
	* gcc.dg/vect/vect-widen-mult-half.c: Ditto.

From-SVN: r237761

	* gcc.dg/torture/float128-cmp-invalid.c (main): Use __builtin_nanq.

From-SVN: r237760

	* gcc.dg/vect/tree-vect.h (check_vect): Handle __SSE4_2__.

From-SVN: r237759

	* configure.ac (HAVE_AS_GOTOF_IN_DATA): Use $as_ix86_gas_32_opt to
	assemble for 32bit target.
	(HAVE_AS_IX86_TLSGDPLT): Use $as_ix86_gas_32_opt to assemble
	and $ld_ix86_gld_32_opt to link for 32bit target.
	(HAVE_AS_IX86_TLSLDMPLT): Ditto.
	* configure: Regenerate.

From-SVN: r237758

	* config/arm/arm.c (int_log2): Delete definition and prototype.
	(shift_op): Use exact_log2 instead of int_log2.
	(vfp3_const_double_for_fract_bits): Likewise.

From-SVN: r237757

Since non-PIC noplt works on 32-bit x86 target now with assembler/linker
support, enable non-PIC noplt tests on 32-bit x86 target.  main in
noplt-2.c and noplt-4.c are renamed to bar to avoid stack re-alignment
in main for 32-bit target, which disables tailcall optimization.

	* gcc.target/i386/noplt-1.c: Don't disable for ia32.  Scan for
	ia32 if R_386_GOT32X relocation is supported.
	* gcc.target/i386/noplt-3.c: Likewise.
	* gcc.target/i386/noplt-2.c: Likewise.
	(main): Renamed to ...
	(bar): This.
	* gcc.target/i386/noplt-4.c: Likewise.
	(main): Renamed to ...
	(bar): This.
	* gcc.target/i386/pr67400-3.c: Don't disable for ia32.
	* gcc.target/i386/pr67400-5.c: Likewise.

From-SVN: r237756

	* call.c (magic_varargs_p): Return 3 for __builtin_*_overflow_p.
	(build_over_call): For magic == 3, do no conversion only on 3rd
	argument.

	* c-c++-common/torture/builtin-arith-overflow-p-19.c: Run for C++ too.
	* g++.dg/ext/builtin-arith-overflow-2.C: New test.

From-SVN: r237755

	* internal-fn.c (expand_arith_set_overflow): New function.
	(expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
	Use it.
	(expand_arith_overflow_result_store): Likewise.  Handle precision
	smaller than mode precision.
	* tree-vrp.c (extract_range_basic): For imag part, handle
	properly signed 1-bit precision result.
	* doc/extend.texi (__builtin_add_overflow): Document that last
	argument can't be pointer to enumerated or boolean type.
	(__builtin_add_overflow_p): Document that last argument can't
	have enumerated or boolean type.

	* c-common.c (check_builtin_function_arguments): Require last
	argument of BUILT_IN_*_OVERFLOW_P to have INTEGER_TYPE type.
	Adjust wording of diagnostics for BUILT_IN_*_OVERLFLOW
	if the last argument is pointer to enumerated or boolean type.

	* c-c++-common/builtin-arith-overflow-1.c (generic_wrong_type, f3,
	f4): Adjust expected diagnostics.
	* c-c++-common/torture/builtin-arith-overflow.h (TP): New macro.
	(T): If OVFP is defined, redefine to TP.
	* c-c++-common/torture/builtin-arith-overflow-12.c: Adjust comment.
	* c-c++-common/torture/builtin-arith-overflow-p-1.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-2.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-3.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-4.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-5.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-6.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-7.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-8.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-9.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-10.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-11.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-12.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-13.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-14.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-15.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-16.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-17.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-18.c: New test.
	* c-c++-common/torture/builtin-arith-overflow-p-19.c: New test.
	* g++.dg/ext/builtin-arith-overflow-1.C: Pass 0 instead of C
	as last argument to __builtin_add_overflow_p.

From-SVN: r237754

From-SVN: r237753