From-SVN: r277279

From-SVN: r277278

	* lock-and-run.sh: Check for process existence rather than timeout.

Matthias Klose noted that on less powerful targets, a link might take more
than 5 minutes; he mentions a figure of 3 hours for an LTO link.  So this
patch changes the timeout to a check for whether the locking process still
exists.  If the lock exists in an erroneous state (no pid file or can't
signal the pid) for 30 sec, steal it.

From-SVN: r277277

From-SVN: r277276

2019-10-21  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* expr.c (expand_expr_real_2): Don't widen constant op1 when expanding
	widening multiplication.

From-SVN: r277271

2019-10-21  Kamlesh Kumar  <kamleshbhalui@gmail.com>

        * rtti.c (get_tinfo_decl_dynamic): Do not call
        TYPE_MAIN_VARIANT for function.
        (get_typeid): Likewise.

        * g++.dg/rtti/pr83534.C: New Test.

Reviewed-by: Jason Merrill <jason@redhat.com>

Co-Authored-By: Jason Merrill <jason@redhat.com>

From-SVN: r277270

/cp
2019-10-21  Paolo Carlini  <paolo.carlini@oracle.com>

	* parser.c (cp_parser_class_head): Improve error recovery upon
	extra qualification error.

/testsuite
2019-10-21  Paolo Carlini  <paolo.carlini@oracle.com>

	* g++.dg/parse/qualified2.C: Tighten dg-error directive.
	* g++.old-deja/g++.other/decl5.C: Don't expect redundant error.

From-SVN: r277268

	PR c++/92015
	* constexpr.c (cxx_eval_component_reference, cxx_eval_bit_field_ref):
	Use STRIP_ANY_LOCATION_WRAPPER on CONSTRUCTOR elts.

	* g++.dg/cpp0x/constexpr-92015.C: New test.

From-SVN: r277267

has_value_dependent_address wasn't stripping location wrappers so it
gave the wrong answer for "&x" in the static_assert.  That led us to
thinking that the expression isn't instantiation-dependent, and we
skipped static initialization of A<0>::x.

This patch adds stripping so that has_value_dependent_address gives the
same answer as it used to before the location wrappers addition.

	* pt.c (has_value_dependent_address): Strip location wrappers.

	* g++.dg/cpp0x/constexpr-odr1.C: New test.
	* g++.dg/cpp0x/constexpr-odr2.C: New test.

From-SVN: r277266

	* typeck.c (maybe_warn_about_returning_address_of_local): Avoid
	recursing on null initializer and return false instead.

	* g++.dg/cpp1z/decomp50.C: New test.

From-SVN: r277264

My DImode arithmetic patches introduced a bug on thumb2 where we could
generate a register controlled shift into an ALU operation.  In
fairness the bug was always present, but latent.

As part of cleaning this up (and auditing to ensure I've caught them
all this time) I've gone through all the shift generating patterns in
the MD files and cleaned them up, reducing some duplicate patterns
between the arm and thumb2 descriptions where we can now share the
same pattern.  In some cases we were missing the shift attribute; in
most cases I've eliminated an ugly attribute setting using the fact
that we normally need separate alternatives for shift immediate and
shift reg to simplify the logic.

	* config/arm/iterators.md (t2_binop0): Fix typo in comment.
	* config/arm/arm.md (addsi3_carryin_shift): Simplify selection of the
	type attribute.
	(subsi3_carryin_shift): Separate into register and constant controlled
	alternatives.  Use shift_amount_operand for operand 4.  Set shift
	attribute and simplify type attribute.
	(subsi3_carryin_shift_alt): Likewise.
	(rsbsi3_carryin_shift): Likewise.
	(rsbsi3_carryin_shift_alt): Likewise.
	(andsi_not_shiftsi_si): Enable for TARGET_32BIT.  Separate constant
	and register controlled shifts into distinct alternatives.
	(andsi_not_shiftsi_si_scc_no_reuse): Likewise.
	(andsi_not_shiftsi_si_scc): Likewise.
	(arm_cmpsi_negshiftsi_si): Likewise.
	(not_shiftsi): Remove redundant M constraint from alternative 1.
	(not_shiftsi_compare0): Likewise.
	(arm_cmpsi_insn): Remove redundant alternative 2.
	(cmpsi_shift_swp): Likewise.
	(sub_shiftsi): Likewise.
	(sub_shiftsi_compare0_scratch): Likewise.
	* config/arm/thumb2.md (thumb_andsi_not_shiftsi_si): Delete pattern.
	(thumb2_cmpsi_neg_shiftsi): Likewise.

From-SVN: r277262

2019-10-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/92162
	* tree-vect-loop.c (vect_create_epilog_for_reduction): Lookup
	STMT_VINFO_REDUC_IDX in reduc_info.
	* tree-vect-stmts.c (vectorizable_condition): Likewise.

	* gcc.dg/pr92162.c: New testcase.

From-SVN: r277261

Extend dg-extract-results.sh and dg-extract-results.py to support the
KPASS test result status.  This is required by GDB which uses a copy
of the dg-extract-results.{sh,py} scripts that it tries to keep in
sync with GCC.

ChangeLog:

        * contrib/dg-extract-results.sh: Add support for KPASS.
        * contrib/dg-extract-results.py: Likewise.

From-SVN: r277260

2019-10-21  Richard Biener  <rguenther@suse.de>

	* tree-vectorizer.h (_slp_tree::ops): New member.
	(SLP_TREE_SCALAR_OPS): New.
	(vect_get_slp_defs): Adjust prototype.
	* tree-vect-slp.c (vect_free_slp_tree): Release
	SLP_TREE_SCALAR_OPS.
	(vect_create_new_slp_node): Initialize it.  New overload for
	initializing by an operands array.
	(_slp_oprnd_info::ops): New member.
	(vect_create_oprnd_info): Initialize it.
	(vect_free_oprnd_info): Release it.
	(vect_get_and_check_slp_defs): Populate the operands array.
	Do not swap operands in the IL when not necessary.
	(vect_build_slp_tree_2): Build SLP nodes for invariant operands.
	Record SLP_TREE_SCALAR_OPS for all invariant nodes.  Also
	swap operands in the operands array.  Do not swap operands in
	the IL.
	(vect_slp_rearrange_stmts): Re-arrange SLP_TREE_SCALAR_OPS as well.
	(vect_gather_slp_loads): Fix.
	(vect_detect_hybrid_slp_stmts): Likewise.
	(vect_slp_analyze_node_operations_1): Search for a internal
	def child for computing reduction SLP_TREE_NUMBER_OF_VEC_STMTS.
	(vect_slp_analyze_node_operations): Skip ops-only stmts for
	the def-type push/pop dance.
	(vect_get_constant_vectors): Compute number_of_vectors here.
	Use SLP_TREE_SCALAR_OPS and simplify greatly.
	(vect_get_slp_vect_defs): Use gimple_get_lhs also for PHIs.
	(vect_get_slp_defs): Simplify greatly.
	* tree-vect-loop.c (vectorize_fold_left_reduction): Simplify.
	(vect_transform_reduction): Likewise.
	* tree-vect-stmts.c (vect_get_vec_defs): Simplify.
	(vectorizable_call): Likewise.
	(vectorizable_operation): Likewise.
	(vectorizable_load): Likewise.
	(vectorizable_condition): Likewise.
	(vectorizable_comparison): Likewise.

From-SVN: r277241

2019-10-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/92161
	* tree-vect-loop.c (vect_analyze_loop_2): Reset stmts def-type
	for reductions.

	* gfortran.dg/pr92161.f: New testcase.

From-SVN: r277240

This patch implements the recently published[1] __rndr and __rndrrs
intrinsics used to access the RNG in Armv8.5-A.
The __rndrrs intrinsics can be used to reseed the generator too.
They are guarded by the __ARM_FEATURE_RNG feature macro.
A quirk with these intrinsics is that they store the random number in
their pointer argument and return a status
code if the generation succeeded.

The instructions themselves write the CC flags indicating the success of
the operation that we can then read with a CSET.
Therefore this implementation makes use of the IGNORE indicator to the
builtin expand machinery to avoid generating
the CSET if its result is unused (the CC reg clobbering effect is still
reflected in the pattern).
I've checked that using unspec_volatile prevents undesirable CSEing of
the instructions.

[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics

	* config/aarch64/aarch64.md (UNSPEC_RNDR, UNSPEC_RNDRRS): Define.
	(aarch64_rndr): New define_insn.
	(aarch64_rndrrs): Likewise.
	* config/aarch64/aarch64.h (AARCH64_ISA_RNG): Define.
	(TARGET_RNG): Likewise.
	* config/aarch64/aarch64.c (aarch64_expand_builtin): Use IGNORE
	argument.
	* config/aarch64/aarch64-protos.h (aarch64_general_expand_builtin):
	Add fourth argument in prototype.
	* config/aarch64/aarch64-builtins.c (enum aarch64_builtins):
	Add AARCH64_BUILTIN_RNG_RNDR, AARCH64_BUILTIN_RNG_RNDRRS.
	(aarch64_init_rng_builtins): Define.
	(aarch64_general_init_builtins): Call aarch64_init_rng_builtins.
	(aarch64_expand_rng_builtin): Define.
	(aarch64_general_expand_builtin): Use IGNORE argument, handle
	RNG builtins.
	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
	__ARM_FEATURE_RNG when TARGET_RNG.
	* config/aarch64/arm_acle.h (__rndr, __rndrrs): Define.

	* gcc.target/aarch64/acle/rng_1.c: New test.

From-SVN: r277239

This patch makes sure ensure_base_align only changes alignment if the new
alignment is more restrictive.  It already did this if we were dealing with
symbols, but it now does it for all types of declarations.

gcc/ChangeLog:
2019-10-21  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* tree-vect-stmts (ensure_base_align): Only change alignment if new
	alignment is more restrictive.

From-SVN: r277238

2019-10-21  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	PR tree-optimization/91532
	* gcc.target/aarch64/sve/fmla_2.c: Add dg-scan check for two st1d
	insns.

From-SVN: r277237

	PR testsuite/52641
	* gcc.dg/torture/pr86034.c: Use 32-bit base type for a bitfield of
	width > 16 bits.
	* gcc.dg/torture/pr90972.c [avr]: Add option "-w".
	* gcc.dg/torture/pr87693.c: Same.
	* gcc.dg/torture/pr91178.c: Add dg-require-effective-target size32plus.
	* gcc.dg/torture/pr91178-2.c: Same.
	* gcc.dg/torture/20181024-1.c
	* gcc.dg/torture/pr86554-1.c: Use 32-bit integers.
	* gcc.dg/tree-ssa/pr91091-1.c: Same.

From-SVN: r277236

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vectorizer.h (vec_info::vector_size): New member variable.
	(vect_update_max_nunits): Update comment.
	(current_vector_size): Delete.
	* tree-vect-stmts.c (current_vector_size): Likewise.
	(get_vectype_for_scalar_type): Use vec_info::vector_size instead
	of current_vector_size.
	(get_mask_type_for_scalar_type): Likewise.
	* tree-vectorizer.c (try_vectorize_loop_1): Likewise.
	* tree-vect-loop.c (vect_update_vf_for_slp): Likewise.
	(vect_analyze_loop, vect_halve_mask_nunits): Likewise.
	(vect_double_mask_nunits, vect_transform_loop): Likewise.
	* tree-vect-slp.c (can_duplicate_and_interleave_p): Likewise.
	(vect_make_slp_decision, vect_slp_bb_region): Likewise.

From-SVN: r277235

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vectorizer.h (vect_double_mask_nunits): Take a vec_info.
	* tree-vect-loop.c (vect_double_mask_nunits): Likewise.
	* tree-vect-stmts.c (supportable_narrowing_operation):  Update call
	accordingly.

From-SVN: r277234

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vectorizer.h (vect_halve_mask_nunits): Take a vec_info.
	* tree-vect-loop.c (vect_halve_mask_nunits): Likewise.
	* tree-vect-loop-manip.c (vect_maybe_permute_loop_masks): Update
	call accordingly.
	* tree-vect-stmts.c (supportable_widening_operation): Likewise.

From-SVN: r277233

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-loop-manip.c (vect_maybe_permute_loop_masks): Take
	a loop_vec_info.
	(vect_set_loop_condition_masked): Update call accordingly.

From-SVN: r277232

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vectorizer.h (supportable_narrowing_operation): Take a vec_info.
	* tree-vect-stmts.c (supportable_narrowing_operation): Likewise.
	(simple_integer_narrowing): Update call accordingly.
	(vectorizable_conversion): Likewise.

From-SVN: r277231

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-stmts.c (simple_integer_narrowing): Take a vec_info.
	(vectorizable_call): Update call accordingly.

From-SVN: r277230

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vectorizer.h (can_duplicate_and_interleave_p): Take a vec_info.
	* tree-vect-slp.c (can_duplicate_and_interleave_p): Likewise.
	(duplicate_and_interleave): Update call accordingly.
	* tree-vect-loop.c (vectorizable_reduction): Likewise.

From-SVN: r277229

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vectorizer.h (duplicate_and_interleave): Take a vec_info.
	* tree-vect-slp.c (duplicate_and_interleave): Likewise.
	(vect_get_constant_vectors): Update call accordingly.
	* tree-vect-loop.c (get_initial_defs_for_reduction): Likewise.

From-SVN: r277228

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vectorizer.h (get_vectype_for_scalar_type): Take a vec_info.
	* tree-vect-stmts.c (get_vectype_for_scalar_type): Likewise.
	(vect_prologue_cost_for_slp_op): Update call accordingly.
	(vect_get_vec_def_for_operand, vect_get_gather_scatter_ops)
	(vect_get_strided_load_store_ops, vectorizable_simd_clone_call)
	(vect_supportable_shift, vect_is_simple_cond, vectorizable_comparison)
	(get_mask_type_for_scalar_type): Likewise.
	(vect_get_vector_types_for_stmt): Likewise.
	* tree-vect-data-refs.c (vect_analyze_data_refs): Likewise.
	* tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
	(get_initial_def_for_reduction, build_vect_cond_expr): Likewise.
	* tree-vect-patterns.c (vect_supportable_direct_optab_p): Likewise.
	(vect_split_statement, vect_convert_input): Likewise.
	(vect_recog_widen_op_pattern, vect_recog_pow_pattern): Likewise.
	(vect_recog_over_widening_pattern, vect_recog_mulhs_pattern): Likewise.
	(vect_recog_average_pattern, vect_recog_cast_forwprop_pattern)
	(vect_recog_rotate_pattern, vect_recog_vector_vector_shift_pattern)
	(vect_synth_mult_by_constant, vect_recog_mult_pattern): Likewise.
	(vect_recog_divmod_pattern, vect_recog_mixed_size_cond_pattern)
	(check_bool_pattern, adjust_bool_pattern_cast, adjust_bool_pattern)
	(search_type_for_mask_1, vect_recog_bool_pattern): Likewise.
	(vect_recog_mask_conversion_pattern): Likewise.
	(vect_add_conversion_to_pattern): Likewise.
	(vect_recog_gather_scatter_pattern): Likewise.
	* tree-vect-slp.c (vect_build_slp_tree_2): Likewise.
	(vect_analyze_slp_instance, vect_get_constant_vectors): Likewise.

From-SVN: r277227

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vectorizer.h (get_mask_type_for_scalar_type): Take a vec_info.
	* tree-vect-stmts.c (get_mask_type_for_scalar_type): Likewise.
	(vect_check_load_store_mask): Update call accordingly.
	(vect_get_mask_type_for_stmt): Likewise.
	* tree-vect-patterns.c (check_bool_pattern): Likewise.
	(search_type_for_mask_1, vect_recog_mask_conversion_pattern): Likewise.
	(vect_convert_mask_for_vectype): Likewise.

From-SVN: r277226

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-patterns.c (vect_supportable_direct_optab_p): Take
	a vec_info.
	(vect_recog_dot_prod_pattern): Update call accordingly.
	(vect_recog_sad_pattern, vect_recog_pow_pattern): Likewise.
	(vect_recog_widen_sum_pattern): Likewise.

From-SVN: r277225

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vectorizer.h (vect_supportable_shift): Take a vec_info.
	* tree-vect-stmts.c (vect_supportable_shift): Likewise.
	* tree-vect-patterns.c (vect_synth_mult_by_constant): Update call
	accordingly.

From-SVN: r277224

The increase_alignment pass was using get_vectype_for_scalar_type
to get the preferred vector type for each array element type.
This has the effect of carrying over the vector size chosen by
the first successful call to all subsequent calls, whereas it seems
more natural to treat each array type independently and pick the
"best" vector type for each element type.

2019-10-21  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vectorizer.c (get_vec_alignment_for_array_type): Use
	get_vectype_for_scalar_type_and_size instead of
	get_vectype_for_scalar_type.

From-SVN: r277223

From-SVN: r277221

2019-10-20  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * common.opt (-fcommon): Fix description.

From-SVN: r277217

	* config/i386/i386-protos.h (ix86_pre_reload_split): Declare.
	* config/i386/i386.c (ix86_pre_reload_split): New function.
	* config/i386/i386.md (*fix_trunc<mode>_i387_1, *add<mode>3_eq,
	*add<mode>3_ne, *add<mode>3_eq_0, *add<mode>3_ne_0, *add<mode>3_eq,
	*add<mode>3_ne, *add<mode>3_eq_1, *add<mode>3_eq_0, *add<mode>3_ne_0,
	*anddi3_doubleword, *andndi3_doubleword, *<code>di3_doubleword,
	*one_cmpldi2_doubleword, *ashl<dwi>3_doubleword_mask,
	*ashl<dwi>3_doubleword_mask_1, *ashl<mode>3_mask, *ashl<mode>3_mask_1,
	*<shift_insn><mode>3_mask, *<shift_insn><mode>3_mask_1,
	*<shift_insn><dwi>3_doubleword_mask,
	*<shift_insn><dwi>3_doubleword_mask_1, *<rotate_insn><mode>3_mask,
	*<rotate_insn><mode>3_mask_1, *<btsc><mode>_mask, *<btsc><mode>_mask_1,
	*btr<mode>_mask, *btr<mode>_mask_1, *jcc_bt<mode>, *jcc_bt<mode>_1,
	*jcc_bt<mode>_mask, *popcounthi2_1, frndintxf2_<rounding>,
	*fist<mode>2_<rounding>_1, *<code><mode>3_1, *<code>di3_doubleword):
	Use ix86_pre_reload_split instead of can_create_pseudo_p in condition.
	* config/i386/sse.md (*sse4_1_<code>v8qiv8hi2<mask_name>_2,
	*avx2_<code>v8qiv8si2<mask_name>_2,
	*sse4_1_<code>v4qiv4si2<mask_name>_2,
	*sse4_1_<code>v4hiv4si2<mask_name>_2,
	*avx512f_<code>v8qiv8di2<mask_name>_2,
	*avx2_<code>v4qiv4di2<mask_name>_2, *avx2_<code>v4hiv4di2<mask_name>_2,
	*sse4_1_<code>v2hiv2di2<mask_name>_2,
	*sse4_1_<code>v2siv2di2<mask_name>_2, sse4_2_pcmpestr,
	sse4_2_pcmpistr): Likewise.

From-SVN: r277216

	* doc/install.texi (Configuration, --enable-objc-gc): hboehm.info
	now defaults to https.

From-SVN: r277215

	* tree-ssa-alias.c (nonoverlapping_refs_since_match_p): Do not
	skip non-zero array accesses.

	* gcc.c-torture/execute/alias-access-path-2.c: New testcase.
	* gcc.dg/tree-ssa/alias-access-path-11.c: xfail.

From-SVN: r277214

After the previous patch, it seems more natural to apply the
PARAM_SLP_MAX_INSNS_IN_BB threshold as soon as we know what
the region is, rather than delaying it to vect_slp_analyze_bb_1.
(But rather than carve out the biggest region possible and then
reject it, wouldn't it be better to stop when the region gets
too big, to at least give us a chance of vectorising something?)

It also seems more natural for vect_slp_bb_region to create the
bb_vec_info itself rather than (a) having to pass bits of data down
for the initialisation and (b) forcing vect_slp_analyze_bb_1 to free
on every failure return.

2019-10-20  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-slp.c (vect_slp_analyze_bb_1): Take a bb_vec_info
	and return a boolean success value.  Move the allocation and
	initialization of the bb_vec_info to...
	(vect_slp_bb_region): ...here.  Update call accordingly.
	(vect_slp_bb): Apply PARAM_SLP_MAX_INSNS_IN_BB here rather
	than in vect_slp_analyze_bb_1.

From-SVN: r277211

If the first attempt at applying BB SLP to a region fails, the main loop
in vect_slp_bb recomputes the region's bounds and datarefs for the next
vector size.  AFAICT this isn't needed any more; we should be able
to reuse the datarefs from the first attempt instead.

2019-10-20  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* tree-vect-slp.c (vect_slp_analyze_bb_1): Call save_datarefs
	when processing the given datarefs for the first time and
	check_datarefs subsequently.
	(vect_slp_bb_region): New function, split out of...
	(vect_slp_bb): ...here.  Don't recompute the region bounds and
	dataref sets when retrying with a different vector size.

From-SVN: r277210

From-SVN: r277209