* search.c (binfo_direct_p): New.
	* name-lookup.c (do_class_using_decl): Use it.

From-SVN: r249797

    
    This test is not yet run, but it will be soon.
    
    Reviewed-on: https://go-review.googlesource.com/47038

From-SVN: r249795

    
    The tests are misc/cgo tests that are not currently run but will be
    run soon.
    
    Reviewed-on: https://go-review.googlesource.com/47037

From-SVN: r249794

gcc/testsuite/ChangeLog:

2017-06-29  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/builtins-3-vec_reve-runnable.c (dg-options,
	dg-skip-if): Add -mvsx -mcpu=power7.

From-SVN: r249792

	* cp-tree.h (THIS_NAME, IN_CHARGE_NAME, VTBL_PTR_TYPE,
	VTABLE_DELTA_NAME, VTABLE_PFN_NAME): Delete.
	* decl.c (initialize_predefined_identifiers): Name cdtor special
	names consistently.  Use literals for above deleted defines.
	(cxx_init_decl_processing): Use literal for vtbl_ptr_type name,

From-SVN: r249791

	* lex.c (maybe_add_lang_type_raw): Exit early, rather than use a
	flag.

From-SVN: r249790

	* call.c (check_dtor_name): Use constructor_name for enums too.
	(build_new_method_call_1): Use constructor_name for cdtors and
	show ~ for dtor.
	* class.c (build_self_reference): Use TYPE_NAME to get name of
	self reference.
	* name-lookup (constructor_name): Use DECL_NAME directly.
	(constructor_name_p): Reimplement.
	(push_class_level_binding_1): Use TYPE_NAME directly.

From-SVN: r249789

	* class.c (finish_struct): Use OVL_P.
	(get_vfield_name): Measure constructor_name length.
	* cp-tree.h (SET_CLASS_TYPE_P): Add RECORD_OR_UNION_CHECK.
	(NON_UNION_CLASS_TYPE_P): Check RECORD_TYPE up front.
	* cxx-pretty-print.c (is_destructor_name): Delete.
	(pp_cxx_unqualified_id): Remove bogus destructor name checking.
	* decl.c (grokfndecl): Move cheap checks first when looking for
	implicit extern cness.

From-SVN: r249788

	* parser.c (cp_parser_direct_declarator): Reorder if to avoid
	indentation. Remove unnecessary assignment of constructor name.

From-SVN: r249787

	* call.c (name_as_c_string): Move CONST_CAST to return.
	(build_new_method_call_1): Remove unneeded bracing.
	* class.c (include_empty_classes): Unbreak line.
	* constraint.cc (tsubst_check_constraint): Add space.
	* cp-tree.h (lang_decl_ns): Add comment.
	(PTRMEM_CST_MEMBER): Break line.
	* decl.c (grokfndecl): Add blank lines. Unbreak some others.
	(grokdeclarator): Remove lines, move declaration to first use.
	* decl2.c (decl_needed_p): Fix indentation.
	(c_parse_final_cleanups): Remove blank line.
	* method.c (implicitly_declare_fn): Move declaration to first use.
	* search.c (current_scope): Add blank lines.

From-SVN: r249786

tree-vect-loop.c (vect_analyze_scalar_cycles_1): Do not add reduction chains to LOOP_VINFO_REDUCTIONS.

2017-06-29  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.c (vect_analyze_scalar_cycles_1): Do not add
	reduction chains to LOOP_VINFO_REDUCTIONS.
	* tree-vect-slp.c (vect_analyze_slp): Continue looking for
	SLP reductions after processing reduction chains.

	* gcc.dg/vect/slp-reduc-8.c: New testcase.

From-SVN: r249785

	gcc/
	* builtins.c (fold_builtin_FUNCTION): Use
	lang_hooks.decl_printable_name.

	gcc/cp/
	* g++.dg/cpp1y/builtin_FUNCTION.C: New.

From-SVN: r249784

gcc/
	PR middle-end/81194
	* cfgexpand.c (expand_gimple_stmt_1): Handle switch statements
	with only one label.
	* stmt.c (expand_case): Assert NCASES is greater than one.

gcc/testsuite/
	PR middle-end/81194
	* g++.dg/pr81194.C: New test.

From-SVN: r249783

The testcase in

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80565

is passing now.  Check in the testcase and resolve it as fixed.

	PR ipa/80565
	* gcc.dg/torture/pr80565.c: New file.

From-SVN: r249782

2017-06-29  Richard Biener  <rguenther@suse.de>

	* tree-cfg.c (group_case_labels_stmt): Return whether we changed
	anything.
	(group_case_labels): Likewise.
	(find_taken_edge): Push sanity checking on val to workers...
	(find_taken_edge_cond_expr): ... here
	(find_taken_edge_switch_expr): ... and here, handle cases
	with just a default label.
	* tree-cfg.h (group_case_labels_stmt): Adjust prototype.
	(group_case_labels): Likewise.
	* tree-cfgcleanup.c (execute_cleanup_cfg_post_optimizing): When
	group_case_labels does anything cleanup the CFG again.

From-SVN: r249780

	PR tree-optimization/81196
	* tree-ssa-loop-niter.c (number_of_iterations_cond): Handle loop
	exit condition comparing two IVs.

	gcc/testsuite
	* gcc.dg/vect/pr81196.c: New.

From-SVN: r249778

My patch yesterday accidentally missed a hunk that added the
update to the tail entry of the autogenerated data structure
produced by parsecpu.awk.  This causes native bootstraps to
fail.

This patch adds back the missing hunk.

2017-06-29  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/parsecpu.awk (gen_comm_data): Add initializer for
	profile to the dummy entry at the end of the list of architectures.
	* config/arm/arm-cpu-cdata.h: Regenerated.

From-SVN: r249777

	Fix date on prevfious ChangeLog entry.

From-SVN: r249775

re PR target/70119 (AArch64 should take advantage of implicit truncation of variable shift amount without defining SHIFT_COUNT_TRUNCATED)

2017-06-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
	    Michael Collison <michael.collison@arm.com>

	PR target/70119
	* config/aarch64/aarch64.md (*aarch64_<optab>_reg_<mode>3_mask1):
	New pattern.
	(*aarch64_reg_<mode>3_neg_mask2): New pattern.
	(*aarch64_reg_<mode>3_minus_mask): New pattern.
	(*aarch64_<optab>_reg_di3_mask2): New pattern.
	* config/aarch64/aarch64.c (aarch64_rtx_costs): Account for cost
	of shift when the shift amount is masked with constant equal to
	the size of the mode.
	* config/aarch64/predicates.md (subreg_lowpart_operator): New
	predicate.


2017-06-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
	    Michael Collison <michael.collison@arm.com>

	PR target/70119
	* gcc.target/aarch64/var_shift_mask_1.c: New test.

Co-Authored-By: Michael Collison <michael.collison@arm.com>

From-SVN: r249774

2017-06-29  Martin Liska  <mliska@suse.cz>

	* config/i386/i386.opt: Change range from [1,5] to [0,5].

From-SVN: r249773

re PR ipa/80565 (ICE at -O2 and -O3 in 32-bit mode (not 64-bit) on x86_64-linux-gnu (in edge_badness, at ipa-inline.c:1028))

2017-06-29  Yury Gribov  <tetra2005@gmail.com>

	PR bootstrap/80565
        * ipa-cp.c (allocate_and_init_ipcp_value): Add initialization
	code.
        * ipa-inline.h
	(edge_growth_cache_entry::edge_growth_cache_entry): New
	function.
        (reset_edge_growth_cache): Update to use constructor.

From-SVN: r249771

From-SVN: r249769

We unnecessarily align data to 8 byte alignments even when -Os is
specified. This brings the logic in the AArch64 backend more in line
with the ARM backend and helps gain some image size in a few
places. Caught by an internal report on the size of rodata sections
being high with aarch64 gcc.

* config/aarch64/aarch64.h (AARCH64_EXPAND_ALIGNMENT): New.
  (DATA_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT.
  (LOCAL_ALIGNMENT): Update to use AARCH64_EXPAND_ALIGNMENT.

Bootstrapped and regression tested on aarch64-none-linux-gnu with no
regressions.

From-SVN: r249764

	* decl.c (build_typename_type): No longer static.
	* tree.c (strip_typedefs): Use it instead of make_typename_type.

From-SVN: r249760

	(_mm256_permutexvar_epi32, _mm256_permutex_epi64): New intrinsics.

testsuite/ChangeLog:

	* gcc.target/i386/avx512vl-vpermd-1.c (_mm256_permutexvar_epi32):
	Test new intrinsic.
	* gcc.target/i386/avx512vl-vpermq-imm-1.c (_mm256_permutex_epi64):
	Ditto.
	* gcc.target/i386/avx512vl-vpermq-var-1.c (_mm256_permutexvar_epi64):
	Ditto.
	* gcc.target/i386/avx512f-vpermd-2.c: Do not check for AVX512F_LEN.
	* gcc.target/i386/avx512f-vpermq-imm-2.c: Ditto.
	* gcc.target/i386/avx512f-vpermq-var-2.c: Ditto.

From-SVN: r249759

	* pt.c (maybe_instantiate_noexcept): Check for recursion.

From-SVN: r249757

	* pt.c (convert_template_argument): Keep the TYPE_PACK_EXPANSION.

From-SVN: r249756

	* pt.c (unify_pack_expansion): Use PACK_EXPANSION_EXTRA_ARGS.

From-SVN: r249755

	* parser.c (cp_parser_class_head): Handle ::template.

From-SVN: r249754

	* pt.c (resolve_typename_type): Fix TEMPLATE_ID_EXPR handling.

From-SVN: r249753

	* parser.c (cp_parser_template_name): Handle dependent object type.
	(cp_parser_nested_name_specifier_opt): Make template_keyword_p a
	parameter.
	(cp_parser_id_expression): Pass it.
	(cp_parser_diagnose_invalid_type_name): Handle TEMPLATE_ID_EXPR.

From-SVN: r249752

	* parser.c (cp_parser_template_id): Use the range location on the
	TEMPLATE_ID_EXPR.

From-SVN: r249751

	* parser.c (cp_parser_lookup_name): Disqualify function templates
	after lookup.

From-SVN: r249750

Current multiarch directory name is always *-linux-gnu* on linux,
this patch configures different names for uclibc and musl targets.

2017-06-28  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* config.gcc (*-linux-musl*): Add t-musl tmake_file.
	(*-linux-uclibc*): Add t-uclibc tmake_file.
	* config/t-musl: New.
	* config/t-uclibc: New.

From-SVN: r249745

Conditions checked for ARM targets in vector-related effective targets
are inconsistent:

* sometimes arm*-*-* is checked
* sometimes Neon is checked
* sometimes arm_neon_ok and sometimes arm_neon is used for neon check
* sometimes check_effective_target_* is used, sometimes
* is-effective-target

This patch consolidate all of these check into using is-effective-target
arm_neon and when little endian was checked, the check is kept.

2017-06-28  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * lib/target-supports.exp (check_effective_target_vect_int): Replace
    current ARM check by ARM NEON's availability check.
    (check_effective_target_vect_intfloat_cvt): Likewise.
    (check_effective_target_vect_uintfloat_cvt): Likewise.
    (check_effective_target_vect_floatint_cvt): Likewise.
    (check_effective_target_vect_floatuint_cvt): Likewise.
    (check_effective_target_vect_shift): Likewise.
    (check_effective_target_whole_vector_shift): Likewise.
    (check_effective_target_vect_bswap): Likewise.
    (check_effective_target_vect_shift_char): Likewise.
    (check_effective_target_vect_long): Likewise.
    (check_effective_target_vect_float): Likewise.
    (check_effective_target_vect_perm): Likewise.
    (check_effective_target_vect_perm_byte): Likewise.
    (check_effective_target_vect_perm_short): Likewise.
    (check_effective_target_vect_widen_sum_hi_to_si_pattern): Likewise.
    (check_effective_target_vect_widen_sum_qi_to_hi): Likewise.
    (check_effective_target_vect_widen_mult_qi_to_hi): Likewise.
    (check_effective_target_vect_widen_mult_hi_to_si): Likewise.
    (check_effective_target_vect_widen_mult_qi_to_hi_pattern): Likewise.
    (check_effective_target_vect_widen_mult_hi_to_si_pattern): Likewise.
    (check_effective_target_vect_widen_shift): Likewise.
    (check_effective_target_vect_extract_even_odd): Likewise.
    (check_effective_target_vect_interleave): Likewise.
    (check_effective_target_vect_multiple_sizes): Likewise.
    (check_effective_target_vect64): Likewise.
    (check_effective_target_vect_max_reduc): Likewise.

From-SVN: r249744

ACLE explicitly states that when targetting the common subset of
ARMv7-A, ARMv7-R and ARMv7-M, the __ARM_ARCH_PROFILE macro should not
be set.  We currently set it to 'M' which is clearly erroneous.

The logic for creating this is very convoluted and also somewhat
fragile, so I've taken the opportunity to use the new CPU and
architecture definition infrastructure to record the profile for each
architecture explicitly rather than try to reconstruct it from other
data.  I think this results in a much more robust solution.

2017-06-28  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/parsecpu.awk (profile): Parse new keyword in an arch
	context.
	(gen_comm_data): Emit architectural setting of arch_prof.
	* config/arm/arm-cpus.in (armv6-m, armv6s-m, armv7-a, armv7ve): Set the
	profile.
	(armv7-r, armv7-m, armv7e-m, armv8-a, armv8.1-a, armv8.2-a): Likewise.
	(armv8-m.base, armv8-m.main): Likewise.
	* arm-protos.h (arm_build_target): Add profile field.
	(arch_option): Likewise.
	* config/arm/arm.c (arm_configure_build_target): Copy the profile to
	the active target.
	* config/arm/arm.h (TARGET_ARM_ARCH_PROFILE): Use
	arm_active_target.profile.

From-SVN: r249743

2017-06-28  Richard Biener  <rguenther@suse.de>

	PR middle-end/81227
	* fold-const.c (negate_expr_p): Use TYPE_UNSIGNED, not
	TYPE_OVERFLOW_WRAPS.
	* match.pd (negate_expr_p): Likewise.
	* tree-ssa-reassoc.c (optimize_range_tests_diff): Use
	fold_build2, not fold_binary.

	* gcc.dg/pr81227.c: New testcase.

From-SVN: r249742

This patch fixes a failure in gcc.target/aarch64/reload-valid-spoff.c 
triggered by https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01367.html.

In ILP32 all memory accesses must have Pmode as the base address, but
aarch64_expand_mov_immediate wasn't emitting a conversion in one case.
Besides fixing this add an assert that flags any MEM operands that are
not Pmode.

    gcc/
	* config/aarch64/aarch64 (aarch64_expand_mov_immediate):
	Convert memory address to Pmode.
	(aarch64_print_operand): Assert MEM operands are always Pmode.

From-SVN: r249741

The aarch_forward_to_shift_is_not_shifted_reg bypass always returns true
on AArch64 shifted instructions.  This causes the bypass to activate in
too many cases, resulting in slower execution on Cortex-A53 like reported
in PR79665.

This patch uses the arm_no_early_alu_shift_dep condition instead which
improves the example in PR79665 by ~7%.  Given it is no longer used,
remove aarch_forward_to_shift_is_not_shifted_reg.  Also remove an
unnecessary REG_P check.

    gcc/
	PR target/79665
	* config/arm/aarch-common.c (arm_no_early_alu_shift_dep):
	Remove redundant if.
	(aarch_forward_to_shift_is_not_shifted_reg): Remove.
	* config/arm/aarch-common-protos.h
	(aarch_forward_to_shift_is_not_shifted_re): Remove.
	* config/arm/cortex-a53.md: Use arm_no_early_alu_shift_dep in bypass.

From-SVN: r249740

[gcc]
2017-06-28  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR ipa/81238
	* multiple_target.c (create_dispatcher_calls): Set the default
	clone to be static, not public.

[gcc/testsuite]
2017-06-28  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/81193
	* lib/target-supports.exp
	(check_ppc_cpu_supports_hw_available): New test to make sure
	__builtin_cpu_supports works on power7 and newer.

From-SVN: r249737