Skip to content

R
riscv-gcc-1
Switch branch/tag
  1. 03 Jun, 2019 21 commits
    • Rename variables and cleanup comments. · 7cfe71d1 
      2019-06-03  François Dumont  <fdumont@gcc.gnu.org>

	Rename variables and cleanup comments.
	* include/bits/hashtable_policy.h
	* include/bits/hashtable.h

From-SVN: r271876
      François Dumont committed
    • enum-1.c: Add -fno-eliminate-unused-debug-symbols on AIX. · dff0e6f3 
              * gcc.dg/debug/enum-1.c: Add -fno-eliminate-unused-debug-symbols
        on AIX.
        * g++.dg/debug/enum-1.C: Same.

From-SVN: r271873
      David Edelsohn committed
    • Fix PR64242 - Longjmp expansion incorrect · 511ed59d 
      Improve the fix for PR64242.  Various optimizations can change a memory
reference into a frame access.  Given there are multiple virtual frame pointers
which may be replaced by multiple hard frame pointers, there are no checks for
writes to the various frame pointers.  So updates to a frame pointer tends to
generate incorrect code.  Improve the previous fix to also add clobbers of
several frame pointers and add a scheduling barrier.  This should work in most
cases until GCC supports a generic "don't optimize across this instruction"
feature.

Bootstrap OK. Testcase passes on AArch64 and x86-64.  Inspected x86, Arm,
Thumb-1 and Thumb-2 assembler which looks correct. 

    gcc/
	PR middle-end/64242
	* builtins.c (expand_builtin_longjmp): Add frame clobbers and schedule
	block.
	(expand_builtin_nonlocal_goto): Likewise.

    testsuite/
	PR middle-end/64242
	* gcc.c-torture/execute/pr64242.c: Update test.

From-SVN: r271870
      Wilco Dijkstra committed
    • aarch64: emit .variant_pcs for aarch64_vector_pcs symbol references · b07fc91c 
      A dynamic linker with lazy binding support may need to handle vector PCS
function symbols specially, so an ELF symbol table marking was
introduced for such symbols.

Function symbol references and definitions that follow the vector PCS
are marked in the generated assembly with .variant_pcs and then the
STO_AARCH64_VARIANT_PCS st_other flag is set on the symbol in the object
file.  The marking is propagated to the dynamic symbol table by the
static linker so a dynamic linker can handle such symbols specially.

For this to work, the assembler, the static linker and the dynamic
linker has to be updated on a system.  Old assembler does not support
the new .variant_pcs directive, so a toolchain with old binutils won't
be able to compile code that references vector PCS symbols.

gcc/ChangeLog:

	* config/aarch64/aarch64-protos.h (aarch64_asm_output_alias): Declare.
	(aarch64_asm_output_external): Declare.
	* config/aarch64/aarch64.c (aarch64_asm_output_variant_pcs): New.
	(aarch64_declare_function_name): Call aarch64_asm_output_variant_pcs.
	(aarch64_asm_output_alias): New.
	(aarch64_asm_output_external): New.
	* config/aarch64/aarch64.h (ASM_OUTPUT_DEF_FROM_DECLS): Define.
	(ASM_OUTPUT_EXTERNAL): Define.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/pcs_attribute-2.c: New test.
	* gcc.target/aarch64/torture/simd-abi-4.c: Check .variant_pcs support.
	* lib/target-supports.exp (check_effective_target_aarch64_variant_pcs):
	New.

From-SVN: r271869
      Szabolcs Nagy committed
    • Corrections for C++2a library status table · bf5824f9 
      	* doc/xml/manual/status_cxx2020.xml: Add missing row for P0920R2.
	Fix bgcolor for P0340R3.
	* doc/html/*: Regenerate.

From-SVN: r271868
      Jonathan Wakely committed
    • PR libstdc++/90686 update C++2a library status docs · 512a80ec 
      	PR libstdc++/90686
	* doc/xml/manual/status_cxx2014.xml: Document what's missing from
	<experimental/memory_resource>.
	* doc/xml/manual/status_cxx2020.xml: Document status of P1285R0,
	P0339R6, P0340R3, P1164R1 and P1357R1.
	* doc/html/*: Regenerate.

From-SVN: r271867
      Jonathan Wakely committed
    • Enforce allocator::value_type consistency for containers in C++2a · ebaf3659 
      In previous standards it is undefined for a container and its allocator
to have a different value_type. Libstdc++ has traditionally allowed it
as an extension, automatically rebinding the allocator to the
container's value_type. Since GCC 8.1 that extension has been disabled
for C++11 and later when __STRICT_ANSI__ is defined (i.e. for
-std=c++11, -std=c++14, -std=c++17 and -std=c++2a).

Since the acceptance of P1463R1 into the C++2a draft an incorrect
allocator::value_type now requires a diagnostic. This patch implements
that by enabling the static_assert for -std=gnu++2a as well.

	* doc/xml/manual/status_cxx2020.xml: Document P1463R1 status.
	* include/bits/forward_list.h [__cplusplus > 201703]: Enable
	allocator::value_type assertion for C++2a.
	* include/bits/hashtable.h: Likewise.
	* include/bits/stl_deque.h: Likewise.
	* include/bits/stl_list.h: Likewise.
	* include/bits/stl_map.h: Likewise.
	* include/bits/stl_multimap.h: Likewise.
	* include/bits/stl_multiset.h: Likewise.
	* include/bits/stl_set.h: Likewise.
	* include/bits/stl_vector.h: Likewise.
	* testsuite/23_containers/deque/48101-3_neg.cc: New test.
	* testsuite/23_containers/forward_list/48101-3_neg.cc: New test.
	* testsuite/23_containers/list/48101-3_neg.cc: New test.
	* testsuite/23_containers/map/48101-3_neg.cc: New test.
	* testsuite/23_containers/multimap/48101-3_neg.cc: New test.
	* testsuite/23_containers/multiset/48101-3_neg.cc: New test.
	* testsuite/23_containers/set/48101-3_neg.cc: New test.
	* testsuite/23_containers/unordered_map/48101-3_neg.cc: New test.
	* testsuite/23_containers/unordered_multimap/48101-3_neg.cc: New test.
	* testsuite/23_containers/unordered_multiset/48101-3_neg.cc: New test.
	* testsuite/23_containers/unordered_set/48101-3_neg.cc: New test.
	* testsuite/23_containers/vector/48101-3_neg.cc: New test.

From-SVN: r271866
      Jonathan Wakely committed
    • tree-vrp.h (value_range_base::nonzero_p): New. · f2b00d2b 
      	* tree-vrp.h (value_range_base::nonzero_p): New.
	(value_range_base::set_nonnull): Rename to...
	(value_range_base::set_nonzero): ...this.
	(value_range_base::set_null): Rename to...
	(value_range_base::set_zero): ...this.
	(value_range::set_nonnull): Remove.
	(value_range::set_null): Remove.
	* tree-vrp.c (range_is_null): Remove.
	(range_is_nonnull): Remove.
	(extract_range_from_binary_expr): Use value_range_base::*zero_p
	instead of range_is_*null.
	(extract_range_from_unary_expr): Same.
	(value_range_base::set_nonnull): Rename to...
	(value_range_base::set_nonzero): ...this.
	(value_range::set_nonnull): Remove.
	(value_range_base::set_null): Rename to...
	(value_range_base::set_zero): ...this.
	(value_range::set_null): Remove.
	(extract_range_from_binary_expr): Rename set_*null uses to
	set_*zero.
	(extract_range_from_unary_expr): Same.
	(union_helper): Same.
	* vr-values.c (get_value_range): Use set_*zero instead of
	set_*null.
	(vr_values::extract_range_from_binary_expr): Same.
	(vr_values::extract_range_basic): Same.

From-SVN: r271865
      Aldy Hernandez committed
    • Fix alignment option parser (PR90684) · 49f3f450 
      Fix the alignment option parser to always allow up to 4 alignments.
Now -falign-functions=16:8:8:8 no longer reports an error.

    gcc/
	PR driver/90684
	* opts.c (parse_and_check_align_values): Allow 4 alignment values.
M    gcc/ChangeLog
M    gcc/opts.c

From-SVN: r271864
      Wilco Dijkstra committed
    • [AArch64] Emit TARGET_DOTPROD-specific sequence for <us>sadv16qi · 72215009 
      Wilco pointed out that when the Dot Product instructions are available we can use them
to generate an even more efficient expansion for the [us]sadv16qi optab.
Instead of the current:
        uabdl2  v0.8h, v1.16b, v2.16b
        uabal   v0.8h, v1.8b, v2.8b
        uadalp  v3.4s, v0.8h

we can generate:
      (1)  mov    v4.16b, 1
      (2)  uabd    v0.16b, v1.16b, v2.16b
      (3)  udot    v3.4s, v0.16b, v4.16b

Instruction (1) can be CSEd across multiple such expansions and even hoisted outside of loops,
so when this sequence appears frequently back-to-back (like in x264_r) we essentially only have 2 instructions
per sum. Also, the UDOT instruction does the byte-to-word accumulation in one step, which allows us to use
the much simpler UABD instruction before it.

This makes it a shorter and lower-latency sequence overall for targets that support it.

	* config/aarch64/iterators.md (MAX_OPP): New code attr.
	* config/aarch64/aarch64-simd.md (*aarch64_<su>abd<mode>_3): Rename to...
	(aarch64_<su>abd<mode>_3): ... This.
	(<sur>sadv16qi): Add TARGET_DOTPROD expansion.

	* gcc.target/aarch64/ssadv16qi.c: Add +nodotprod to pragma.
	* gcc.target/aarch64/usadv16qi.c: Likewise.
	* gcc.target/aarch64/ssadv16qi-dotprod.c: New test.
	* gcc.target/aarch64/usadv16qi-dotprod.c: Likewise.

From-SVN: r271863
      Kyrylo Tkachov committed
    • target-supports.exp (add_options_for_aarch64_sve): New procedure. · c89503d9 
      2019-06-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	* lib/target-supports.exp (add_options_for_aarch64_sve): New procedure.
	(aarch64_sve_hw_bits): Call add_options_for_aarch64_sve.
	(check_effective_target_aarch64_sve_hw): Likewise.

From-SVN: r271862
      Prathamesh Kulkarni committed
    • Remove Java Trees from GENERIC manual. · 3fa97a0b 
      2019-06-03  Martin Liska  <mliska@suse.cz>

	* doc/generic.texi: Remove Java Trees.

From-SVN: r271861
      Martin Liska committed
    • tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original full reference… · 1be54209 
      tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original full reference tree and record in ref->ref.

2019-06-03  Richard Biener  <rguenther@suse.de>

	* tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original
	full reference tree and record in ref->ref.
	(vn_reference_lookup_3): Pass in original ref to
	ao_ref_init_from_vn_reference.
	(vn_reference_lookup): Likewise.
	* tree-ssa-sccvn.h (ao_ref_init_from_vn_reference): Adjust prototype.
	* tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p):
	Handle non-decl bases in the original reference.

	* gcc.dg/tree-ssa/alias-access-path-1.c: Scan fre1.

From-SVN: r271860
      Richard Biener committed
    • Fix typo in index comparison of CONSTRUCTOR. · 4c76ebd0 
      2019-06-03  Martin Liska  <mliska@suse.cz>

	* fold-const.c (operand_equal_p): Fix typo as compare_tree_int
	returns 0 when operands are equal.

From-SVN: r271859
      Martin Liska committed
    • re PR tree-optimization/90716 (gcc generates wrong debug information at -O2) · efb34006 
      2019-06-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/90716
	* tree-loop-distribution.c (destroy_loop): Process blocks in
	correct order.

	* gcc.dg/guality/pr90716.c: New testcase.

From-SVN: r271858
      Richard Biener committed
    • re PR target/88837 ([SVE] Poor vector construction code in VL-specific mode) · 3a0afad0 
      2019-06-03  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	PR target/88837
	* vector-builder.h (vector_builder::count_dups): New method.
	* config/aarch64/aarch64-protos.h (aarch64_expand_sve_vector_init):
	Declare prototype.
	* config/aarch64/aarch64/sve.md (aarch64_sve_rev64<mode>): Use @.
	(vec_init<mode><Vel>): New pattern.
	* config/aarch64/aarch64.c (emit_insr): New function.
	(aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
	(aarch64_sve_expand_vector_init_insert_elems): Likewise.
	(aarch64_sve_expand_vector_init_handle_trailing_same_elem): Likewise.
	(aarch64_sve_expand_vector_init): Define two overloaded functions.

testsuite/
	* gcc.target/aarch64/sve/init_1.c: New test.
	* gcc.target/aarch64/sve/init_1_run.c: Likewise.
	* gcc.target/aarch64/sve/init_2.c: Likewise.
	* gcc.target/aarch64/sve/init_2_run.c: Likewise.
	* gcc.target/aarch64/sve/init_3.c: Likewise.
	* gcc.target/aarch64/sve/init_3_run.c: Likewise.
	* gcc.target/aarch64/sve/init_4.c: Likewise.
	* gcc.target/aarch64/sve/init_4_run.c: Likewise.
	* gcc.target/aarch64/sve/init_5.c: Likewise.
	* gcc.target/aarch64/sve/init_5_run.c: Likewise.
	* gcc.target/aarch64/sve/init_6.c: Likewise.
	* gcc.target/aarch64/sve/init_6_run.c: Likewise.
	* gcc.target/aarch64/sve/init_7.c: Likewise.
	* gcc.target/aarch64/sve/init_7_run.c: Likewise.
	* gcc.target/aarch64/sve/init_8.c: Likewise.
	* gcc.target/aarch64/sve/init_8_run.c: Likewise.
	* gcc.target/aarch64/sve/init_9.c: Likewise.
	* gcc.target/aarch64/sve/init_9_run.c: Likewise.
	* gcc.target/aarch64/sve/init_10.c: Likewise.
	* gcc.target/aarch64/sve/init_10_run.c: Likewise.
	* gcc.target/aarch64/sve/init_11.c: Likewise.
	* gcc.target/aarch64/sve/init_11_run.c: Likewise.
	* gcc.target/aarch64/sve/init_12.c: Likewise.
	* gcc.target/aarch64/sve/init_12_run.c: Likewise.

From-SVN: r271857
      Prathamesh Kulkarni committed
    • Fix ICE in vect_slp_analyze_node_operations_1 · bcde3345 
      This patch fixes bug 90681.  It was caused by trying to SLP vectorize a non
groupped load.  We've fixed it by tweaking a bit the implementation: mark
masked loads as not vectorizable, but support them as an special case.  Then
the detect them in the test for normal non-groupped loads that was already
there.

From-SVN: r271856
      Alejandro Martinez committed
    • re PR testsuite/90713 (FAIL: gcc.dg/gimplefe-40.c (internal compiler error)) · 961dce6b 
      2019-06-03  Richard Biener  <rguenther@suse.de>

	PR testsuite/90713
	* gcc.dg/gimplefe-40.c: Add -maltivec for powerpc.

From-SVN: r271855
      Richard Biener committed
    • Make debug(edge) more verbose. · 6eb3cadb 
      2019-06-03  Martin Liska  <mliska@suse.cz>

	* cfg.c (debug): Use TDF_DETAILS for debug and
	print edge info only once.

From-SVN: r271854
      Martin Liska committed
    • re PR target/89750 (Wrong code for _mm_comi_round_ss) · 467e9f38 
      2019-05-06  H.J. Lu  <hongjiu.lu@intel.com>
	    Hongtao Liu  <hongtao.liu@intel.com>

	PR target/89750
	PR target/86444
	* config/i386/i386-expand.c (ix86_expand_sse_comi_round):
	Modified, original implementation isn't correct.

2019-05-06  H.J. Lu  <hongjiu.lu@intel.com>
	    Hongtao Liu  <hongtao.liu@intel.com>

	PR target/89750
	PR target/86444
	* gcc.target/i386/avx512f-vcomisd-2.c: New.
	* gcc.target/i386/avx512f-vcomisd-2.c: Likewise.

Co-Authored-By: Hongtao Liu <hongtao.liu@intel.com>

From-SVN: r271853
      H.J. Lu committed
    • Daily bump. · 4bd04267 
      From-SVN: r271852
      GCC Administrator committed
  3. 02 Jun, 2019 2 commits
    • re PR fortran/90539 (481.wrf slowdown by 25% on Intel Kaby with -Ofast… · 5d9c602d 
      re PR fortran/90539 (481.wrf slowdown by 25% on Intel Kaby with -Ofast -march=native starting with r271377)

2019-06-02  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/90539
	* trans-expr.c (gfc_conv_subref_array_arg): If the size of the
	expression can be determined to be one, treat it as contiguous.
	Set likelyhood of presence of an actual argument according to
	PRED_FORTRAN_ABSENT_DUMMY and likelyhood of being contiguous
	according to PRED_FORTRAN_CONTIGUOUS.

2019-06-02  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/90539
	* predict.def (PRED_FORTRAN_CONTIGUOUS): New predictor.

2019-06-02  Thomas Koenig  <tkoenig@gcc.gnu.org>

	PR fortran/90539
	* gfortran.dg/internal_pack_24.f90: New test.

From-SVN: r271844
      Thomas Koenig committed
    • Daily bump. · 5efdd6ee 
      From-SVN: r271843
      GCC Administrator committed
  5. 01 Jun, 2019 6 commits
  7. 31 May, 2019 11 commits