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  1. 03 Sep, 2019 19 commits
    • Implement TARGET_HANDLE_GENERIC_ATTRIBUTE · 7a4418a5 
      gcc/ChangeLog:

2019-09-03  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* config/msp430/msp430.c (TARGET_HANDLE_GENERIC_ATTRIBUTE): Define.
	(msp430_handle_generic_attribute): New function.
	* doc/tm.texi: Regenerate.
	* doc/tm.texi.in: Add TARGET_HANDLE_GENERIC_ATTRIBUTE.
	* hooks.c (hook_tree_treeptr_tree_tree_int_boolptr_null): New.
	* hooks.h (hook_tree_treeptr_tree_tree_int_boolptr_null): New.
	* target.def: Define new hook TARGET_HANDLE_GENERIC_ATTRIBUTE.

gcc/c-family/ChangeLog:

2019-09-03  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

	* c-attribs.c (handle_section_attribute): Call the
	handle_generic_attribute target hook after performing target
	independent processing.
	(handle_noinit_attribute): Likewise.

From-SVN: r275355
      Jozef Lawrynowicz committed
    • re PR tree-optimization/91504 (Inlining misses some logical operation folding) · 52792faa 
      	PR tree-optimization/91504
	* match.pd: Add ((~a & b) ^a) --> (a | b).

        PR tree-optimization/91504
	gcc.dg/tree-ssa/pr91504.c: New test.

From-SVN: r275354
      Kamlesh Kumar committed
    • rust-demangle.c (unescape): Remove. · 42bf58bb 
      	* rust-demangle.c (unescape): Remove.
	(parse_lower_hex_nibble): New function.
	(parse_legacy_escape): New function.
	(is_prefixed_hash): Use parse_lower_hex_nibble.
	(looks_like_rust): Use parse_legacy_escape.
	(rust_demangle_sym): Use parse_legacy_escape.
	* testsuite/rust-demangle-expected: Add 'llv$u6d$' test.

From-SVN: r275353
      Eduard-Mihai Burtescu committed
    • c-cppbuiltin.c (builtin_define_with_hex_fp_value): Always expand when using -fgo-dump-spec. · 5f76ab15 
      	* c-cppbuiltin.c (builtin_define_with_hex_fp_value): Always expand
	when using -fgo-dump-spec.

From-SVN: r275352
      Ian Lance Taylor committed
    • re PR target/91604 (ICE in extract_insn at recog.c:2310 since r272323) · deeedbad 
      	PR target/91604
	* config/i386/i386-expand.c (split_double_mode): If there is more than
	one MEM operand and they are rtx_equal_p, reuse lo_half/hi_half from
	already split matching MEM operand instead of calling adjust_address
	again.

	* gcc.target/i386/pr91604.c: New test.

From-SVN: r275344
      Jakub Jelinek committed
    • Remove Cell Broadband Engine SPU targets · 2f2aeda9 
      From-SVN: r275343
      Ulrich Weigand committed
    • re PR middle-end/91603 (Unaligned access in expand_assignment) · 93439218 
      2019-09-03  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR middle-end/91603
        PR middle-end/91612
        PR middle-end/91613
        * expr.c (expand_expr_real_1): Handle unaligned decl_rtl
        and SSA_NAME referring to CONSTANT_P correctly.

testsuite:
2019-09-03  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        PR middle-end/91603
        * testsuite/gcc.target/arm/pr91603.c: New test.

From-SVN: r275342
      Bernd Edlinger committed
    • re PR other/79543 (Inappropriate "ld --version" checking) · c6c2d1bc 
      2019-09-03  Chung-Lin Tang <cltang@codesourcery.com>

	libatomic/
	PR other/79543
	* acinclude.m4 (LIBAT_CHECK_LINKER_FEATURES): Fix GNU ld --version
	scanning to conform to the GNU Coding Standards.
	* configure: Regenerate.

	libffi/
	PR other/79543
	* acinclude.m4 (LIBAT_CHECK_LINKER_FEATURES): Fix GNU ld --version
	scanning to conform to the GNU Coding Standards.
	* configure: Regenerate.

	libgomp/
	PR other/79543
	* acinclude.m4 (LIBGOMP_CHECK_LINKER_FEATURES): Fix GNU ld --version
	scanning to conform to the GNU Coding Standards.
	* configure: Regenerate.

	libitm/
	PR other/79543
	* acinclude.m4 (LIBITM_CHECK_LINKER_FEATURES): Fix GNU ld --version
	scanning to conform to the GNU Coding Standards.
	* configure: Regenerate.

	libstdc++-v3/
	PR other/79543
	* acinclude.m4 (GLIBCXX_CHECK_LINKER_FEATURES): Fix GNU ld --version
	scanning to conform to the GNU Coding Standards.
	* configure: Regenerate.

From-SVN: r275341
      Chung-Lin Tang committed
    • tree-ssa-sccvn.h (vn_nary_op_lookup): Remove. · c8d34912 
      2019-09-03  Richard Biener  <rguenther@suse.de>

	* tree-ssa-sccvn.h (vn_nary_op_lookup): Remove.
	(vn_nary_op_insert): Likewise.
	* tree-ssa-sccvn.c (init_vn_nary_op_from_op): Remove.
	(vn_nary_op_lookup): Likewise.
	(vn_nary_op_insert): Likewise.

From-SVN: r275338
      Richard Biener committed
    • S/390: Commit forgotten test for r275336 · 70b766b2 
      gcc/testsuite/ChangeLog:

2019-09-03  Ilya Leoshkevich  <iii@linux.ibm.com>

	* gcc.target/s390/sigfpe-eh.c: Forgotten test.

From-SVN: r275337
      Ilya Leoshkevich committed
    • S/390: Fix failing RTL check in s390_canonicalize_comparison · 837ee1e0 
      The new sigfpe-eh.c fails with

    internal compiler error: RTL check: expected elt 0 type 'e' or 'u', have 'w' (rtx const_int)

This is most likely due to a typo: XEXP (*op1, 0) was used, when
XEXP (*op0, 1) was intended.  This did not cause any user-visible
problems, because reversed_comparison_code_parts ignores the
respective argument, and the release compiler is built without RTL
checks.

gcc/ChangeLog:

2019-09-03  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/s390.c (s390_canonicalize_comparison): Use XEXP
	(*op0, 1) instead of XEXP (*op1, 0).

gcc/testsuite/ChangeLog:

2019-09-03  Ilya Leoshkevich  <iii@linux.ibm.com>

	* gcc.target/s390/sigfpe-eh.c: New test.

From-SVN: r275336
      Ilya Leoshkevich committed
    • [AArch64] Add support for __jcvt intrinsic · e1d5d19e 
      This patch implements the __jcvt ACLE intrinsic [1] that maps down to the FJCVTZS [2] instruction from Armv8.3-a.
No fancy mode iterators or nothing. Just a single builtin, UNSPEC and define_insn and the associate plumbing.
This patch also defines __ARM_FEATURE_JCVT to indicate when the intrinsic is available.

[1] https://developer.arm.com/docs/101028/latest/data-processing-intrinsics
[2] https://developer.arm.com/docs/ddi0596/latest/simd-and-floating-point-instructions-alphabetic-order/fjcvtzs-floating-point-javascript-convert-to-signed-fixed-point-rounding-toward-zero

	* config/aarch64/aarch64.md (UNSPEC_FJCVTZS): Define.
	(aarch64_fjcvtzs): New define_insn.
	* config/aarch64/aarch64.h (TARGET_JSCVT): Define.
	* config/aarch64/aarch64-builtins.c (aarch64_builtins):
	Add AARCH64_JSCVT.
	(aarch64_init_builtins): Initialize __builtin_aarch64_jcvtzs.
	(aarch64_expand_builtin): Handle AARCH64_JSCVT.
	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
	__ARM_FEATURE_JCVT where appropriate.
	* config/aarch64/arm_acle.h (__jcvt): Define.

	* gcc.target/aarch64/acle/jcvt_1.c: New test.

From-SVN: r275335
      Kyrylo Tkachov committed
    • [AArch64] Implement ACLE intrinsics for FRINT[32,64][Z,X] · 10bd1d96 
      This patch implements the ACLE intrinsics to access the FRINT[32,64][Z,X] scalar[1] and vector[2][3] instructions
from Armv8.5-a. These are enabled when the __ARM_FEATURE_FRINT macro is defined.

They're added in a fairly standard way through builtins and unspecs at the RTL level.

	* config/aarch64/aarch64.md ("unspec"): Add UNSPEC_FRINT32Z,
	UNSPEC_FRINT32X, UNSPEC_FRINT64Z, UNSPEC_FRINT64X.
	(aarch64_<frintnzs_op><mode>): New define_insn.
	* config/aarch64/aarch64.h (TARGET_FRINT): Define.
	* config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
	__ARM_FEATURE_FRINT when appropriate.
	* config/aarch64/aarch64-simd-builtins.def: Add builtins for frint32z,
	frint32x, frint64z, frint64x.
	* config/aarch64/arm_acle.h (__rint32zf, __rint32z, __rint64zf,
	__rint64z, __rint32xf, __rint32x, __rint64xf, __rint64x): Define.
	* config/aarch64/arm_neon.h (vrnd32z_f32, vrnd32zq_f32, vrnd32z_f64,
	vrnd32zq_f64, vrnd32x_f32, vrnd32xq_f32, vrnd32x_f64, vrnd32xq_f64,
	vrnd64z_f32, vrnd64zq_f32, vrnd64z_f64, vrnd64zq_f64, vrnd64x_f32,
	vrnd64xq_f32, vrnd64x_f64, vrnd64xq_f64): Define.
	* config/aarch64/iterators.md (VSFDF): Define.
	(FRINTNZX): Likewise.
	(frintnzs_op): Likewise.

	* gcc.target/aarch64/acle/rintnzx_1.c: New test.
	* gcc.target/aarch64/simd/vrndnzx_1.c: Likewise.

From-SVN: r275334
      Kyrylo Tkachov committed
    • [AArch64] Add support for missing CPUs · e0664b7a 
      This patch adds '-mcpu' options for following CPUs:
Cortex-A77, Cortex-A76AE, Cortex-A65, Cortex-A65AE, and Cortex-A34.

Related specifications are as following:
https://developer.arm.com/ip-products/processors/cortex-a

Bootstraped/regtested for aarch64-none-linux-gnu.

2019-09-03  Dennis Zhang  <dennis.zhang@arm.com>

	* config/aarch64/aarch64-cores.def (AARCH64_CORE): New entries
	for Cortex-A77, Cortex-A76AE, Cortex-A65, Cortex-A65AE, and
	Cortex-A34.
	* config/aarch64/aarch64-tune.md: Regenerated.
	* doc/invoke.texi: Document the new processors.

From-SVN: r275333
      Dennis Zhang committed
    • libphobos.exp (libphobos_init): Add multi-lib libgcc dirs to the ld_library_path var. · bca30736 
      2019-09-03  Bernd Edlinger  <bernd.edlinger@hotmail.de>

        * testsuite/lib/libphobos.exp (libphobos_init): Add multi-lib libgcc 
        dirs to the ld_library_path var.

From-SVN: r275332
      Bernd Edlinger committed
    • [AArch64] Add Linux hwcap strings for some extensions · 75f93536 
      This patch adds feature strings for some of the extensions. This string is what is read from /proc/cpuinfo on Linux systems
and used during -march=native detection.

The strings are taken from the kernel source tree at:
https://github.com/torvalds/linux/blob/master/arch/arm64/kernel/cpuinfo.c#L45


	* config/aarch64/aarch64-option-extensions.def (sb): Add feature
	string.
	(ssbs): Likewise.
	(sve2): Likewise.
	(sve2-sm4): Likewise.
	(sveaes): Likewise.
	(svesha3): Likewise.
	(svebitperm): Likewise.

From-SVN: r275331
      Kyrylo Tkachov committed
    • re PR tree-optimization/91597 (GCC miscompiles a branch depending on a pointer tag) · 3729852e 
      	PR tree-optimization/91597
	* tree-vrp.c (extract_range_from_binary_expr): Remove unsafe
	BIT_AND_EXPR optimization for pointers, even if both operand
	ranges don't include NULL, the result can be NULL.

	* gcc.c-torture/execute/pr91597.c: New test.

Co-Authored-By: Richard Biener <rguenther@suse.de>

From-SVN: r275330
      Jakub Jelinek committed
    • [x86 testsuite] preserve full register across main · e4a8d4a7 
      This test uses a call-saved register as a global variable.  It
attempts to preserve its value across main, but only the lower int
part is preserved, which is not good enough for x86_64, when the
runtime that calls main() happens to hold something in the chosen
register that is not a zero-extension from the 32-bit value, and
rightfully expects the full register to remain unchanged when main()
returns.


for  gcc/testsuite/ChangeLog

	* gcc.target/i386/20020616-1.c: Preserve full register across
	main.

From-SVN: r275329
      Alexandre Oliva committed
    • Daily bump. · 97d6a7c8 
      From-SVN: r275328
      GCC Administrator committed
  3. 02 Sep, 2019 17 commits
  5. 01 Sep, 2019 4 commits