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  1. 13 May, 2018 5 commits
    • gfortran.h: Remove prototype. · 798a67a4 
      2018-05-13  Steven G. Kargl  <kargl@gcc.gnu.org>

	* gfortran.h: Remove prototype.
	* symbol.c (gfc_new_undo_checkpoint): Remove unused function.

From-SVN: r260210
      Steven G. Kargl committed
    • re PR libstdc++/80165 (Constexpr tuple of variant doesn't work) · 456dbc72 
      PR libstdc++/80165
* testsuite/20_util/variant/80165.cc: New.

From-SVN: r260209
      Ville Voutilainen committed
    • [NDS32] Implment n10 pipeline. · 2f2ebf95 
      gcc/
	* config.gcc (nds32*-*-*): Check that n10/d10 are valid to --with-cpu.
	* config/nds32/nds32-n10.md: New file.
	* config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N10.
	* config/nds32/nds32-pipelines-auxiliary.c: Implementation for n10
	pipeline.
	* config/nds32/nds32-protos.h: More declarations for n10 pipeline.
	* config/nds32/nds32-utils.c: More implementations for n10 pipeline.
	* config/nds32/nds32.md (pipeline_model): Add n10.
	* config/nds32/nds32.opt (mcpu): Support n10 pipeline cpus.
	* config/nds32/pipelines.md: Include n10 settings.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>

From-SVN: r260207
      Kito Cheng committed
    • [NDS32] Add DSP extension instructions. · 7c32ef41 
      gcc/
	* config.gcc (nds32be-*-*): Handle --with-ext-dsp.
	* config/nds32/constants.md (unspec_element, unspec_volatile_element):
	Add enum values for DSP extension instructions.
	* config/nds32/constraints.md (Iu06, IU06, CVp5, CVs5, CVs2, CVhi):
	New constraints.
	* config/nds32/iterators.md (shifts, shiftrt, sat_plus, all_plus,
	sat_minus, all_minus, plus_minus, extend, sumax, sumin, sumin_max):
	New code iterators.
	(su, zs, uk, opcode, add_rsub, add_sub): New code attributes.
	* config/nds32/nds32-dspext.md: New file for DSP implementation.
	* config/nds32/nds32-intrinsic.c: Implementation of DSP extension.
	* config/nds32/nds32-intrinsic.md: Likewise.
	* config/nds32/nds32_intrinsic.h: Likewise.
	* config/nds32/nds32-md-auxiliary.c: Likewise.
	* config/nds32/nds32-memory-manipulation.c: Consider DSP extension.
	* config/nds32/nds32-predicates.c (const_vector_to_hwint): New.
	(nds32_valid_CVp5_p, nds32_valid_CVs5_p): New.
	(nds32_valid_CVs2_p, nds32_valid_CVhi_p): New.
	* config/nds32/nds32-protos.h: New declarations for DSP extension.
	* config/nds32/nds32-utils.c (extract_mac_non_acc_rtx): New case
	TYPE_DMAC in switch statement.
	* config/nds32/nds32.c: New checking and implementation for DSP
	extension instructions.
	* config/nds32/nds32.h: Likewise.
	* config/nds32/nds32.md: Likewise.
	* config/nds32/nds32.opt (mhw-abs, mext-dsp): New options.
	* config/nds32/predicates.md: Implement new predicates for DSP
	extension.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>

From-SVN: r260206
      Monk Chiang committed
    • Daily bump. · ab22e6ce 
      From-SVN: r260205
      GCC Administrator committed
  3. 12 May, 2018 1 commit
  5. 11 May, 2018 15 commits
    • rs6000.md (mov<mode>_softfloat, FMOVE32): Reformat alternatives and attributes… · 43842b39 
      rs6000.md (mov<mode>_softfloat, FMOVE32): Reformat alternatives and attributes so it is easier to identify which...

2018-05-11  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.md (mov<mode>_softfloat, FMOVE32):
	Reformat alternatives and attributes so it is easier to identify
	which constraints/attributes go with which instruction.
	(mov<mode>_hardfloat32, FMOVE64): Likewise.
	(mov<mode>_softfloat32, FMOVE64): Likewise.
	(mov<mode>_hardfloat64, FMOVE64): Likewise.
	(mov<mode>_softfloat64, FMOVE64): Likewise.

From-SVN: r260190
      Michael Meissner committed
    • re PR fortran/85542 (ICE in check_inquiry, at fortran/expr.c:2426) · 8132af9d 
      2018-05-11  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/85542
	* expr.c (check_inquiry): Avoid NULL pointer dereference.
 
2018-05-11  Steven G. Kargl  <kargl@gcc.gnu.org>

	PR fortran/85542
	* gfortran.dg/pr85542.f90: New test.

From-SVN: r260182
      Steven G. Kargl committed
    • ...and actually resture the *new* testcase. · b5f52fb1 
      From-SVN: r260172
      Edward Smith-Rowland committed
    • Restore the testcase that was clobbered by the recent PR83140 patches. · 841c9597 
      	* libstdc++-v3/testsuite/tr1/5_numerical_facilities/special_functions
	/02_assoc_legendre/check_value.cc

From-SVN: r260168
      Edward Smith-Rowland committed
    • extend.texi (PowerPC Built-in Functions): Rename this subsection. · 528b874b 
      gcc/ChangeLog:

2018-05-11  Kelvin Nilsen  <kelvin@gcc.gnu.org>

	* doc/extend.texi (PowerPC Built-in Functions): Rename this
	subsection.
	(Basic PowerPC Built-in Functions): The new name of the
	subsection previously known as "PowerPC Built-in Functions".
	(Basic PowerPC Built-in Functions Available on all Configurations):
	New subsubsection.
	(Basic PowerPC Built-in Functions Available on ISA 2.05): Likewise.
	(Basic PowerPC Built-in Functions Available on ISA 2.06): Likewise.
	(Basic PowerPC Built-in Functions Available on ISA 2.07): Likewise.
	(Basic PowerPC Built-in Functions Available on ISA 3.0): Likewise.

From-SVN: r260167
      Kelvin Nilsen committed
    • Check is_single_const in intersect_with_plats · 063c5529 
      2018-05-11  Martin Jambor  <mjambor@suse.cz>

	PR ipa/85655
	* ipa-cp.c (intersect_with_plats): Check that the lattice contains
	single const.

testsuite/
	* g++.dg/lto/pr85655_0.C: New test.

From-SVN: r260165
      Martin Jambor committed
    • [arm] PR target/85733 Restore be8 linking behaviour for ARMv6-M and products… · b901c875 
      [arm] PR target/85733 Restore be8 linking behaviour for ARMv6-M and products deriving from its capabilities

My patch last year to automate passing the be8 flag to the linker had
a nasty flaw in that I forgot entirely that the ARMv6-M architecture
did not derive its capabilities directly from the ARMv6 capability
list, but was a new group of capabilities (since it needs to leave out
the ARM -- notm -- feature bit).  The feature list defined was thus
missing the be8 bit.  Furthermore, any product derived from that
feature group consequently lacked the be8 feature as well and this
included all ARMv7 and ARMv8 parts.

The fix is embarrassingly simple...

	PR target/85733
	* config/arm/arm-cpus.in (fgroup ARMv6m): Add be8 feature.

From-SVN: r260162
      Richard Earnshaw committed
    • i386-common.c (OPTION_MASK_ISA_WAITPKG_SET, [...]): New defines. · 55f31ed1 
      2018-05-11  Sebastian Peryt  <sebastian.peryt@intel.com>

gcc/

        * common/config/i386/i386-common.c (OPTION_MASK_ISA_WAITPKG_SET,
        OPTION_MASK_ISA_WAITPKG_UNSET): New defines.
        (ix86_handle_option): Handle -mwaitpkg.
        * config.gcc: New header.
        * config/i386/cpuid.h (bit_WAITPKG): New bit.
        * config/i386/driver-i386.c (host_detect_local_cpu): Detect -mwaitpkg.
        * config/i386/i386-builtin-types.def ((UINT8, UNSIGNED, UINT64)): New
        function type.
        * config/i386/i386-c.c (ix86_target_macros_internal): Handle
        OPTION_MASK_ISA_WAITPKG.
        * config/i386/i386.c (ix86_target_string): Add -mwaitpkg.
        (ix86_option_override_internal): Add PTA_WAITPKG.
        (ix86_valid_target_attribute_inner_p): Add -mwaitpkg.
        (enum ix86_builtins): Add IX86_BUILTIN_UMONITOR, IX86_BUILTIN_UMWAIT,
        IX86_BUILTIN_TPAUSE.
        (ix86_init_mmx_sse_builtins): Define __builtin_ia32_umonitor,
        __builtin_ia32_umwait and __builtin_ia32_tpause.
        (ix86_expand_builtin): Expand IX86_BUILTIN_UMONITOR,
        IX86_BUILTIN_UMWAIT, IX86_BUILTIN_TPAUSE.
        * config/i386/i386.h (TARGET_WAITPKG, TARGET_WAITPKG_P): New.
        * config/i386/i386.md (UNSPECV_UMWAIT, UNSPECV_UMONITOR,
        UNSPECV_TPAUSE): New.
        (umwait, umwait_rex64, umonitor_<mode>, tpause, tpause_rex64): New.
        * config/i386/i386.opt: Add -mwaitpkg.
        * config/i386/waitpkgintrin.h: New file.
        * config/i386/x86intrin.h: New header.
        * doc/invoke.texi: Add -mwaitpkg.

gcc/testsuite/

        * gcc.target/i386/tpause-1.c: New test.
        * gcc.target/i386/umonitor-1.c: New test.

From-SVN: r260161
      Sebastian Peryt committed
    • [arm] PR target/85606 prefer armv6s-m for armv6-m parts · c40a8be8 
      When Arm introduced ARMv6-M there were two variants, ARMv6-M and
ARMv6S-M.  The two differed only in support for the SVC instruction.
Later on SVC was then made a mandatory part of ARMv6-M and the
ARMv6S-M name was dropped.  GCC and GAS, however still recognize both
names and at least some versions of GAS still distinguish between the
two.

To address this, this patch changes the architecture for the ARMv6-m
cortex parts (m0, m0plus, m1 and the variants will small multiply
units) to use the ARMv6S-M name in conjunction with the assembler.
This avoids problems with them rejecting code that was previously
accepted with older versions of GCC where we did not pass an explicit
architecture string through to the compiler when using -mcpu on the
command line.

	PR target/85606
	* config/arm/arm-cpus.in: Add comment that ARMv6-m and ARMv6S-m are now
	equivalent.
	(cortex-m0): Use armv6s-m isa.
	(cortex-m0plus): Likewise.
	(cortex-m1): Likewise.
	(cortex-m0.small-multiply): Likewise.
	(cortex-m0plus.small-multiply): Likewise.
	(cortex-m1.small-multiply): Likewise.

From-SVN: r260157
      Richard Earnshaw committed
    • re PR c/85696 (OpenMP with variably modified and default(none) won't compile) · 1c9ee609 
      	PR c/85696
	* c-omp.c (c_omp_predetermined_sharing): Return
	OMP_CLAUSE_DEFAULT_SHARED for artificial vars with integral type.

	* cp-tree.h (cxx_omp_predetermined_sharing_1): New prototype.
	* cp-gimplify.c (cxx_omp_predetermined_sharing): New wrapper around
	cxx_omp_predetermined_sharing_1.  Rename old function to ...
	(cxx_omp_predetermined_sharing_1): ... this.
	* semantics.c (finish_omp_clauses): Use cxx_omp_predetermined_sharing_1
	instead of cxx_omp_predetermined_sharing.

	* c-c++-common/gomp/pr85696.c: New test.

From-SVN: r260156
      Jakub Jelinek committed
    • re PR tree-optimization/85692 (Two source permute not used for vector initialization) · 5a599c46 
      	PR tree-optimization/85692
	* tree-ssa-forwprop.c (simplify_vector_constructor): Try two
	source permute as well.

	* gcc.target/i386/pr85692.c: New test.

Co-Authored-By: Jakub Jelinek <jakub@redhat.com>

From-SVN: r260155
      Allan Sandfeld Jensen committed
    • Support LLVM style of no_sanitize attribute (PR sanitizer/85556). · 19916065 
      2018-05-11  Martin Liska  <mliska@suse.cz>

        PR sanitizer/85556
	* doc/extend.texi: Document LLVM style format for no_sanitize
	attribute.
2018-05-11  Martin Liska  <mliska@suse.cz>

        PR sanitizer/85556
	* c-attribs.c (handle_no_sanitize_attribute): Iterate all
	TREE_LIST values.
2018-05-11  Martin Liska  <mliska@suse.cz>

        PR sanitizer/85556
	* c-c++-common/ubsan/attrib-6.c: New test.

From-SVN: r260154
      Martin Liska committed
    • decl.c (cp_finish_decl): Don't instantiate auto variable. · 683be2f7 
      	* decl.c (cp_finish_decl): Don't instantiate auto variable.

	(check_static_variable_definition): Allow auto.
	* constexpr.c (ensure_literal_type_for_constexpr_object): Likewise.

From-SVN: r260150
      Jason Merrill committed
    • correct changelog! · 3a2e98ce 
      2018-05-10  Edward Smith-Rowland  <3dw4rd@verizon.net>

	PR libstdc++/83140 - assoc_legendre returns negated value when m is odd
	* include/tr1/legendre_function.tcc (__assoc_legendre_p): Add __phase
	argument defaulted to +1.  Doxy comments on same.
	* testsuite/special_functions/02_assoc_legendre/
	check_value.cc: Regen.
	* testsuite/tr1/5_numerical_facilities/special_functions/
	02_assoc_legendre/check_value.cc: Regen.

From-SVN: r260149
      Edward Smith-Rowland committed
    • Daily bump. · af2d2ed1 
      From-SVN: r260147
      GCC Administrator committed
  7. 10 May, 2018 19 commits