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  1. 27 Oct, 2017 25 commits
  3. 26 Oct, 2017 15 commits
    • Protect more algorithms from overloaded comma operators · d67be443 
      	* include/bits/stl_algo.h (__find_if_not_n, generate_n): Cast to void
	to ensure overloaded comma not used.
	* include/bits/stl_algobase.h (__fill_n_a, equal): Likewise.
	* include/bits/stl_uninitialized.h (__uninitialized_fill_n)
	(__uninitialized_fill_n_a, __uninitialized_default_n_1)
	(__uninitialized_default_n_a, __uninitialized_copy_n)
	(__uninitialized_copy_n_pair): Likewise
	* testsuite/20_util/specialized_algorithms/memory_management_tools/1.cc:
	Use test iterator wrappers with overloaded comma operator.
	* testsuite/25_algorithms/fill_n/1.cc: Likewise.
	* testsuite/25_algorithms/generate_n/1.cc: New test.
	* testsuite/25_algorithms/stable_partition/1.cc: New test.
	* testsuite/util/testsuite_iterators.h (operator,): Add deleted
	non-member comma operator with iterator wrappers as right operand.

From-SVN: r254128
      Jonathan Wakely committed
    • compiler: explicitly convert between type aliases · e1b76fde 
          
    Otherwise we can get a crash in the backend.
    
    Test case is https://golang.org/cl/73790.
    
    Reviewed-on: https://go-review.googlesource.com/73810

From-SVN: r254126
      Ian Lance Taylor committed
    • constraints.md ("S"): Match r0rel_constant_p too. · 1cef1159 
      2017-10-26  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* config/nios2/constraints.md ("S"): Match r0rel_constant_p too.
	* config/nios2/nios2-protos.h (r0rel_constant_p): Declare.
	* config/nios2/nios2.c: (nios2_r0rel_sec_regex): New.
	(nios2_option_overide): Initialize it.  Don't allow R0-relative 
	addressing with PIC.
	(nios2_rtx_costs): Handle r0rel_constant_p like gprel_constant_p.
	(nios2_symbolic_constant_p): Likewise.
	(nios2_legitimate_address_p): Likewise.
	(nios2_r0rel_section_name_p): New.
	(nios2_symbol_ref_in_r0rel_data_p): New.
	(nios2_emit_move_sequence): Handle r0rel_constant_p.
	(r0rel_constant_p): New.
	(nios2_print_operand_address): Handle r0rel_constant_p.
	(nios2_cdx_narrow_form_p): Likewise.
	* config/nios2/nios2.opt (mr0rel-sec=): New option.
	* doc/invoke.texi (Option Summary): Add -mr0rel-sec.
	(Nios II Options): Document -mr0rel-sec.

	gcc/testsuite/
	* gcc.target/nios2/gpopt-r0rel-sec.c: New.

From-SVN: r254124
      Sandra Loosemore committed
    • nios2.c: Include xregex.h. · de10fca0 
      2017-10-26  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* config/nios2/nios2.c: Include xregex.h.
	(nios2_gprel_sec_regex): New.
	(nios2_option_overide): Initialize it.  Don't allow GP-relative 
	addressing with PIC.
	(nios2_small_section_name_p): Check for regex match.
	* config/nios2/nios2.opt (mgprel-sec=): New option.
	* doc/invoke.texi (Option Summary): Add -mgprel-sec.
	(Nios II Options): Document -mgprel-sec.

	gcc/testsuite/
	* gcc.target/nios2/gpopt-gprel-sec.c: New.

From-SVN: r254123
      Sandra Loosemore committed
    • Fix hyphenation build-time path and install-time path. · 31498bee 
      	gcc/
	* doc/invoke.texi (-fdebug-prefix-map): Expand documentation.

From-SVN: r254122
      Jim Wilson committed
    • Add some usage info -fdebug-prefix-map= docs. · 1cf6c17b 
      	gcc/
	* doc/invoke.texi (-fdebug-prefix-map): Expand documentation.

From-SVN: r254121
      James E Wilson committed
    • Fix unsharing of GIMPLE_OMP_{SINGLE,TARGET,TEAMS} in gimple_copy · 8a866b82 
      2017-10-26  Tom de Vries  <tom@codesourcery.com>

	PR tree-optimization/82707
	* gimple.c (gimple_copy): Fix unsharing of
	GIMPLE_OMP_{SINGLE,TARGET,TEAMS}.

From-SVN: r254120
      Tom de Vries committed
    • Adding missing CMP* intrinsics · 7e23f4a6 
      gcc/
	* config/i386/avx512fintrin.h (_mm512_cmpeq_pd_mask,
	_mm512_cmple_pd_mask, _mm512_cmplt_pd_mask,
	_mm512_cmpneq_pd_mask, _mm512_cmpnle_pd_mask,
	_mm512_cmpnlt_pd_mask, _mm512_cmpord_pd_mask,
	_mm512_cmpunord_pd_mask, _mm512_mask_cmpeq_pd_mask,
	_mm512_mask_cmple_pd_mask, _mm512_mask_cmplt_pd_mask,
	_mm512_mask_cmpneq_pd_mask, _mm512_mask_cmpnle_pd_mask,
	_mm512_mask_cmpnlt_pd_mask, _mm512_mask_cmpord_pd_mask,
	_mm512_mask_cmpunord_pd_mask, _mm512_cmpeq_ps_mask,
	_mm512_cmple_ps_mask, _mm512_cmplt_ps_mask,
	_mm512_cmpneq_ps_mask, _mm512_cmpnle_ps_mask,
	_mm512_cmpnlt_ps_mask, _mm512_cmpord_ps_mask,
	_mm512_cmpunord_ps_mask, _mm512_mask_cmpeq_ps_mask,
	_mm512_mask_cmple_ps_mask, _mm512_mask_cmplt_ps_mask,
	_mm512_mask_cmpneq_ps_mask, _mm512_mask_cmpnle_ps_mask,
	_mm512_mask_cmpnlt_ps_mask, _mm512_mask_cmpord_ps_mask,
	_mm512_mask_cmpunord_ps_mask): New intrinsics.
gcc/testsuite/
	* gcc.target/i386/avx512f-vcmpps-1.c (_mm512_cmpeq_ps_mask,
	_mm512_cmple_ps_mask, _mm512_cmplt_ps_mask,
	_mm512_cmpneq_ps_mask, _mm512_cmpnle_ps_mask,
	_mm512_cmpnlt_ps_mask, _mm512_cmpord_ps_mask,
	_mm512_cmpunord_ps_mask, _mm512_mask_cmpeq_ps_mask,
	_mm512_mask_cmple_ps_mask, _mm512_mask_cmplt_ps_mask,
	_mm512_mask_cmpneq_ps_mask, _mm512_mask_cmpnle_ps_mask,
	_mm512_mask_cmpnlt_ps_mask, _mm512_mask_cmpord_ps_mask,
	_mm512_mask_cmpunord_ps_mask): Test new intrinsics.
	* gcc.target/i386/avx512f-vcmpps-2.c (_mm512_cmpeq_ps_mask,
	_mm512_cmple_ps_mask, _mm512_cmplt_ps_mask,
	_mm512_cmpneq_ps_mask, _mm512_cmpnle_ps_mask,
	_mm512_cmpnlt_ps_mask, _mm512_cmpord_ps_mask,
	_mm512_cmpunord_ps_mask, _mm512_mask_cmpeq_ps_mask,
	_mm512_mask_cmple_ps_mask, _mm512_mask_cmplt_ps_mask,
	_mm512_mask_cmpneq_ps_mask, _mm512_mask_cmpnle_ps_mask,
	_mm512_mask_cmpnlt_ps_mask, _mm512_mask_cmpord_ps_mask,
	_mm512_mask_cmpunord_ps_mask): Test new intrinsics.
	* gcc.target/i386/avx512f-vcmppd-1.c (_mm512_cmpeq_pd_mask,
	_mm512_cmple_pd_mask, _mm512_cmplt_pd_mask,
	_mm512_cmpneq_pd_mask, _mm512_cmpnle_pd_mask,
	_mm512_cmpnlt_pd_mask, _mm512_cmpord_pd_mask,
	_mm512_cmpunord_pd_mask, _mm512_mask_cmpeq_pd_mask,
	_mm512_mask_cmple_pd_mask, _mm512_mask_cmplt_pd_mask,
	_mm512_mask_cmpneq_pd_mask, _mm512_mask_cmpnle_pd_mask,
	_mm512_mask_cmpnlt_pd_mask, _mm512_mask_cmpord_pd_mask,
	_mm512_mask_cmpunord_pd_mask): Test new intrinsics.
	* gcc.target/i386/avx512f-vcmppd-2.c (_mm512_cmpeq_pd_mask,
	_mm512_cmple_pd_mask, _mm512_cmplt_pd_mask,
	_mm512_cmpneq_pd_mask, _mm512_cmpnle_pd_mask,
	_mm512_cmpnlt_pd_mask, _mm512_cmpord_pd_mask,
	_mm512_cmpunord_pd_mask, _mm512_mask_cmpeq_pd_mask,
	_mm512_mask_cmple_pd_mask, _mm512_mask_cmplt_pd_mask,
	_mm512_mask_cmpneq_pd_mask, _mm512_mask_cmpnle_pd_mask,
	_mm512_mask_cmpnlt_pd_mask, _mm512_mask_cmpord_pd_mask,
	_mm512_mask_cmpunord_pd_mask): Test new intrinsics.

From-SVN: r254118
      Olga Makhotina committed
    • aix.h (TARGET_IEEEQUAD_DEFAULT): Set long double default to IBM. · 73b0ac0b 
      [gcc]
2017-10-26  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/aix.h (TARGET_IEEEQUAD_DEFAULT): Set long double
	default to IBM.
	* config/rs6000/darwin.h (TARGET_IEEEQUAD_DEFAULT): Likewise.
	* config/rs6000/rs6000.opt (-mabi=ieeelongdouble): Move the
	warning to rs6000.c.  Remove the Undocumented flag, since it has
	been documented.
	(-mabi=ibmlongdouble): Likewise.
	* config/rs6000/rs6000.c (TARGET_IEEEQUAD_DEFAULT): If it is not
	already set, set the default format for long double.
	(rs6000_debug_reg_global): Print whether long double is IBM or
	IEEE.
	(rs6000_option_override_internal): Rework setting long double
	format.  Only warn if the user is changing the long double default
	and they did not use -Wno-psabi.
	* doc/invoke.texi (PowerPC options): Update the documentation for
	-mabi=ieeelongdouble and -mabi=ibmlongdouble.

From-SVN: r254116
      Michael Meissner committed
    • Add wider_subreg_mode helper functions · bd5a2c67 
      This patch adds helper functions that say which of the two modes
involved in a subreg is the larger, preferring the outer mode in
the event of a tie.  It also converts IRA and reload to track modes
instead of byte sizes, since this is slightly more convenient when
variable-sized modes are added later.

2017-10-26  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* rtl.h (wider_subreg_mode): New function.
	* ira.h (ira_sort_regnos_for_alter_reg): Take a machine_mode *
	rather than an unsigned int *.
	* ira-color.c (regno_max_ref_width): Replace with...
	(regno_max_ref_mode): ...this new variable.
	(coalesced_pseudo_reg_slot_compare): Update accordingly.
	Use wider_subreg_mode.
	(ira_sort_regnos_for_alter_reg): Likewise.  Take a machine_mode *
	rather than an unsigned int *.
	* lra-constraints.c (uses_hard_regs_p): Use wider_subreg_mode.
	(process_alt_operands): Likewise.
	(invariant_p): Likewise.
	* lra-spills.c (assign_mem_slot): Likewise.
	(add_pseudo_to_slot): Likewise.
	* lra.c (collect_non_operand_hard_regs): Likewise.
	(add_regs_to_insn_regno_info): Likewise.
	* reload1.c (regno_max_ref_width): Replace with...
	(regno_max_ref_mode): ...this new variable.
	(reload): Update accordingly.  Update call to
	ira_sort_regnos_for_alter_reg.
	(alter_reg): Update to use regno_max_ref_mode.  Call wider_subreg_mode.
	(init_eliminable_invariants): Update to use regno_max_ref_mode.
	(scan_paradoxical_subregs): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254115
      Richard Sandiford committed
    • Introduce emit_frame_chain · 204d2c03 
      The current frame code combines the separate concepts of a frame chain
(saving old FP,LR in a record and pointing new FP to it) and a frame
pointer used to access locals.  Add emit_frame_chain to the aarch64_frame
descriptor and use it in the prolog and epilog code.  For now just
initialize it as before, so generated code is identical.

Also correctly set EXIT_IGNORE_STACK.  The current AArch64 epilog code 
restores SP from FP if alloca is used.  If a frame pointer is used but
there is no alloca, SP must remain valid for the epilog to work correctly.

    gcc/
	* config/aarch64/aarch64.h (EXIT_IGNORE_STACK): Set if alloca is used.
	(aarch64_frame): Add emit_frame_chain boolean.
	* config/aarch64/aarch64.c (aarch64_frame_pointer_required)
	Move eh_return case to aarch64_layout_frame.
	(aarch64_layout_frame): Initialize emit_frame_chain.
	(aarch64_expand_prologue): Use emit_frame_chain.

From-SVN: r254114
      Wilco Dijkstra committed
    • Deduction guides for associative containers, debug mode deduction guide fixes. · 957f5fea 
      * include/bits/stl_iterator.h (__iter_key_t)
(__iter_val_t, __iter_to_alloc_t): New.
* include/bits/stl_map.h: Add deduction guides.
* include/bits/stl_multimap.h: Likewise.
* include/bits/stl_multiset.h: Likewise.
* include/bits/stl_set.h: Likewise.
* include/bits/unordered_map.h: Likewise.
* include/bits/unordered_set.h: Likewise.
* include/debug/deque: Likewise.
* include/debug/forward_list: Likewise.
* include/debug/list: Likewise.
* include/debug/map.h: Likewise.
* include/debug/multimap.h: Likewise.
* include/debug/multiset.h: Likewise.
* include/debug/set.h: Likewise.
* include/debug/unordered_map: Likewise.
* include/debug/unordered_set: Likewise.
* include/debug/vector: Likewise.
* testsuite/23_containers/map/cons/deduction.cc: New.
* testsuite/23_containers/multimap/cons/deduction.cc: Likewise.
* testsuite/23_containers/multiset/cons/deduction.cc: Likewise.
* testsuite/23_containers/set/cons/deduction.cc: Likewise.
* testsuite/23_containers/unordered_map/cons/deduction.cc: Likewise.
* testsuite/23_containers/unordered_multimap/cons/deduction.cc:
Likewise.
* testsuite/23_containers/unordered_multiset/cons/deduction.cc:
Likewise.
* testsuite/23_containers/unordered_set/cons/deduction.cc: Likewise.

From-SVN: r254113
      Ville Voutilainen committed
    • Simplify frame layout for stack probing · 1f7bffd0 
      This patch makes some changes to the frame layout in order to simplify
stack probing.  We want to use the save of LR as a probe in any non-leaf
function.  With shrinkwrapping we may only save LR before a call, so it
is useful to define a fixed location in the callee-saves. So force LR at
the bottom of the callee-saves even with -fomit-frame-pointer.

Also remove a rarely used frame layout that saves the callee-saves first
with -fomit-frame-pointer.  Doing so allows the store of LR to be used as
a valid stack probe in all frames.

    gcc/
	* config/aarch64/aarch64.c (aarch64_layout_frame):
        Ensure LR is always stored at the bottom of the callee-saves.
        Remove rarely used frame layout which saves callee-saves at top of
        frame, so the store of LR can be used as a valid probe in all cases.

From-SVN: r254112
      Wilco Dijkstra committed
    • Improve addressing of TI/TFmode · 37e4d57b 
      In https://gcc.gnu.org/ml/gcc-patches/2017-06/msg01125.html Jiong
pointed out some addressing inefficiencies due to a recent change in
regcprop (https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00775.html).

This patch improves aarch64_legitimize_address_displacement to split
unaligned offsets of TImode and TFmode accesses.  The resulting code
is better and no longer relies on the original regcprop optimization.

For the test we now produce:

	add	x1, sp, 4
	stp	xzr, xzr, [x1, 24]

rather than:

        mov     x1, sp
        add     x1, x1, 28
        stp     xzr, xzr, [x1]

    gcc/
	* config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
	Improve unaligned TImode/TFmode base/offset split.

    testsuite/
	* gcc.target/aarch64/ldp_stp_unaligned_2.c: New file.

From-SVN: r254111
      Wilco Dijkstra committed
    • Make more use of df_read_modify_subreg_p · 9eaf97d6 
      This patch uses df_read_modify_subreg_p to check whether writing
to a subreg would preserve some of the existing contents.

This has the effect of putting more emphasis on the
REGMODE_NATURAL_SIZE-based definition of whether something can be
partially modified, instead of using UNITS_PER_WORD unconditionally.
This becomes important for SVE, where UNITS_PER_WORD has no
significance for subregs of multi-register LD2/ST2, LD3/ST3 and
LD4/ST4 tuples.

2017-10-26  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* caller-save.c (mark_referenced_regs):  Use read_modify_subreg_p.
	* combine.c (find_single_use_1): Likewise.
	(expand_field_assignment): Likewise.
	(move_deaths): Likewise.
	* lra-constraints.c (simplify_operand_subreg): Likewise.
	(curr_insn_transform): Likewise.
	* lra.c (collect_non_operand_hard_regs): Likewise.
	(add_regs_to_insn_regno_info): Likewise.
	* rtlanal.c (reg_referenced_p): Likewise.
	(covers_regno_no_parallel_p): Likewise.

Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>

From-SVN: r254110
      Richard Sandiford committed